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Fixed merge conflict.
author MrJuneJune <me@mrjunejune.com>
date Fri, 23 Jan 2026 22:38:59 -0800
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1 |// Low-level VM code for MIPS64 CPUs.
2 |// Bytecode interpreter, fast functions and helper functions.
3 |// Copyright (C) 2005-2023 Mike Pall. See Copyright Notice in luajit.h
4 |//
5 |// Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com.
6 |// Sponsored by Cisco Systems, Inc.
7 |
8 |.arch mips64
9 |.section code_op, code_sub
10 |
11 |.actionlist build_actionlist
12 |.globals GLOB_
13 |.globalnames globnames
14 |.externnames extnames
15 |
16 |// Note: The ragged indentation of the instructions is intentional.
17 |// The starting columns indicate data dependencies.
18 |
19 |//-----------------------------------------------------------------------
20 |
21 |// Fixed register assignments for the interpreter.
22 |// Don't use: r0 = 0, r26/r27 = reserved, r28 = gp, r29 = sp, r31 = ra
23 |
24 |.macro .FPU, a, b
25 |.if FPU
26 | a, b
27 |.endif
28 |.endmacro
29 |
30 |// The following must be C callee-save (but BASE is often refetched).
31 |.define BASE, r16 // Base of current Lua stack frame.
32 |.define KBASE, r17 // Constants of current Lua function.
33 |.define PC, r18 // Next PC.
34 |.define DISPATCH, r19 // Opcode dispatch table.
35 |.define LREG, r20 // Register holding lua_State (also in SAVE_L).
36 |.define MULTRES, r21 // Size of multi-result: (nresults+1)*8.
37 |
38 |.define JGL, r30 // On-trace: global_State + 32768.
39 |
40 |// Constants for type-comparisons, stores and conversions. C callee-save.
41 |.define TISNIL, r30
42 |.define TISNUM, r22
43 |.if FPU
44 |.define TOBIT, f30 // 2^52 + 2^51.
45 |.endif
46 |
47 |// The following temporaries are not saved across C calls, except for RA.
48 |.define RA, r23 // Callee-save.
49 |.define RB, r8
50 |.define RC, r9
51 |.define RD, r10
52 |.define INS, r11
53 |
54 |.define AT, r1 // Assembler temporary.
55 |.define TMP0, r12
56 |.define TMP1, r13
57 |.define TMP2, r14
58 |.define TMP3, r15
59 |
60 |// MIPS n64 calling convention.
61 |.define CFUNCADDR, r25
62 |.define CARG1, r4
63 |.define CARG2, r5
64 |.define CARG3, r6
65 |.define CARG4, r7
66 |.define CARG5, r8
67 |.define CARG6, r9
68 |.define CARG7, r10
69 |.define CARG8, r11
70 |
71 |.define CRET1, r2
72 |.define CRET2, r3
73 |
74 |.if FPU
75 |.define FARG1, f12
76 |.define FARG2, f13
77 |.define FARG3, f14
78 |.define FARG4, f15
79 |.define FARG5, f16
80 |.define FARG6, f17
81 |.define FARG7, f18
82 |.define FARG8, f19
83 |
84 |.define FRET1, f0
85 |.define FRET2, f2
86 |
87 |.define FTMP0, f20
88 |.define FTMP1, f21
89 |.define FTMP2, f22
90 |.endif
91 |
92 |// Stack layout while in interpreter. Must match with lj_frame.h.
93 |.if FPU // MIPS64 hard-float.
94 |
95 |.define CFRAME_SPACE, 192 // Delta for sp.
96 |
97 |//----- 16 byte aligned, <-- sp entering interpreter
98 |.define SAVE_ERRF, 188(sp) // 32 bit values.
99 |.define SAVE_NRES, 184(sp)
100 |.define SAVE_CFRAME, 176(sp) // 64 bit values.
101 |.define SAVE_L, 168(sp)
102 |.define SAVE_PC, 160(sp)
103 |//----- 16 byte aligned
104 |.define SAVE_GPR_, 80 // .. 80+10*8: 64 bit GPR saves.
105 |.define SAVE_FPR_, 16 // .. 16+8*8: 64 bit FPR saves.
106 |
107 |.else // MIPS64 soft-float
108 |
109 |.define CFRAME_SPACE, 128 // Delta for sp.
110 |
111 |//----- 16 byte aligned, <-- sp entering interpreter
112 |.define SAVE_ERRF, 124(sp) // 32 bit values.
113 |.define SAVE_NRES, 120(sp)
114 |.define SAVE_CFRAME, 112(sp) // 64 bit values.
115 |.define SAVE_L, 104(sp)
116 |.define SAVE_PC, 96(sp)
117 |//----- 16 byte aligned
118 |.define SAVE_GPR_, 16 // .. 16+10*8: 64 bit GPR saves.
119 |
120 |.endif
121 |
122 |.define TMPX, 8(sp) // Unused by interpreter, temp for JIT code.
123 |.define TMPD, 0(sp)
124 |//----- 16 byte aligned
125 |
126 |.define TMPD_OFS, 0
127 |
128 |.define SAVE_MULTRES, TMPD
129 |
130 |//-----------------------------------------------------------------------
131 |
132 |.macro saveregs
133 | daddiu sp, sp, -CFRAME_SPACE
134 | sd ra, SAVE_GPR_+9*8(sp)
135 | sd r30, SAVE_GPR_+8*8(sp)
136 | .FPU sdc1 f31, SAVE_FPR_+7*8(sp)
137 | sd r23, SAVE_GPR_+7*8(sp)
138 | .FPU sdc1 f30, SAVE_FPR_+6*8(sp)
139 | sd r22, SAVE_GPR_+6*8(sp)
140 | .FPU sdc1 f29, SAVE_FPR_+5*8(sp)
141 | sd r21, SAVE_GPR_+5*8(sp)
142 | .FPU sdc1 f28, SAVE_FPR_+4*8(sp)
143 | sd r20, SAVE_GPR_+4*8(sp)
144 | .FPU sdc1 f27, SAVE_FPR_+3*8(sp)
145 | sd r19, SAVE_GPR_+3*8(sp)
146 | .FPU sdc1 f26, SAVE_FPR_+2*8(sp)
147 | sd r18, SAVE_GPR_+2*8(sp)
148 | .FPU sdc1 f25, SAVE_FPR_+1*8(sp)
149 | sd r17, SAVE_GPR_+1*8(sp)
150 | .FPU sdc1 f24, SAVE_FPR_+0*8(sp)
151 | sd r16, SAVE_GPR_+0*8(sp)
152 |.endmacro
153 |
154 |.macro restoreregs_ret
155 | ld ra, SAVE_GPR_+9*8(sp)
156 | ld r30, SAVE_GPR_+8*8(sp)
157 | ld r23, SAVE_GPR_+7*8(sp)
158 | .FPU ldc1 f31, SAVE_FPR_+7*8(sp)
159 | ld r22, SAVE_GPR_+6*8(sp)
160 | .FPU ldc1 f30, SAVE_FPR_+6*8(sp)
161 | ld r21, SAVE_GPR_+5*8(sp)
162 | .FPU ldc1 f29, SAVE_FPR_+5*8(sp)
163 | ld r20, SAVE_GPR_+4*8(sp)
164 | .FPU ldc1 f28, SAVE_FPR_+4*8(sp)
165 | ld r19, SAVE_GPR_+3*8(sp)
166 | .FPU ldc1 f27, SAVE_FPR_+3*8(sp)
167 | ld r18, SAVE_GPR_+2*8(sp)
168 | .FPU ldc1 f26, SAVE_FPR_+2*8(sp)
169 | ld r17, SAVE_GPR_+1*8(sp)
170 | .FPU ldc1 f25, SAVE_FPR_+1*8(sp)
171 | ld r16, SAVE_GPR_+0*8(sp)
172 | .FPU ldc1 f24, SAVE_FPR_+0*8(sp)
173 | jr ra
174 | daddiu sp, sp, CFRAME_SPACE
175 |.endmacro
176 |
177 |// Type definitions. Some of these are only used for documentation.
178 |.type L, lua_State, LREG
179 |.type GL, global_State
180 |.type TVALUE, TValue
181 |.type GCOBJ, GCobj
182 |.type STR, GCstr
183 |.type TAB, GCtab
184 |.type LFUNC, GCfuncL
185 |.type CFUNC, GCfuncC
186 |.type PROTO, GCproto
187 |.type UPVAL, GCupval
188 |.type NODE, Node
189 |.type NARGS8, int
190 |.type TRACE, GCtrace
191 |.type SBUF, SBuf
192 |
193 |//-----------------------------------------------------------------------
194 |
195 |// Trap for not-yet-implemented parts.
196 |.macro NYI; .long 0xec1cf0f0; .endmacro
197 |
198 |// Macros to mark delay slots.
199 |.macro ., a; a; .endmacro
200 |.macro ., a,b; a,b; .endmacro
201 |.macro ., a,b,c; a,b,c; .endmacro
202 |.macro ., a,b,c,d; a,b,c,d; .endmacro
203 |
204 |.define FRAME_PC, -8
205 |.define FRAME_FUNC, -16
206 |
207 |//-----------------------------------------------------------------------
208 |
209 |// Endian-specific defines.
210 |.if ENDIAN_LE
211 |.define HI, 4
212 |.define LO, 0
213 |.define OFS_RD, 2
214 |.define OFS_RA, 1
215 |.define OFS_OP, 0
216 |.else
217 |.define HI, 0
218 |.define LO, 4
219 |.define OFS_RD, 0
220 |.define OFS_RA, 2
221 |.define OFS_OP, 3
222 |.endif
223 |
224 |// Instruction decode.
225 |.macro decode_OP1, dst, ins; andi dst, ins, 0xff; .endmacro
226 |.macro decode_OP8a, dst, ins; andi dst, ins, 0xff; .endmacro
227 |.macro decode_OP8b, dst; sll dst, dst, 3; .endmacro
228 |.macro decode_RC8a, dst, ins; srl dst, ins, 13; .endmacro
229 |.macro decode_RC8b, dst; andi dst, dst, 0x7f8; .endmacro
230 |.macro decode_RD4b, dst; sll dst, dst, 2; .endmacro
231 |.macro decode_RA8a, dst, ins; srl dst, ins, 5; .endmacro
232 |.macro decode_RA8b, dst; andi dst, dst, 0x7f8; .endmacro
233 |.macro decode_RB8a, dst, ins; srl dst, ins, 21; .endmacro
234 |.macro decode_RB8b, dst; andi dst, dst, 0x7f8; .endmacro
235 |.macro decode_RD8a, dst, ins; srl dst, ins, 16; .endmacro
236 |.macro decode_RD8b, dst; sll dst, dst, 3; .endmacro
237 |.macro decode_RDtoRC8, dst, src; andi dst, src, 0x7f8; .endmacro
238 |
239 |// Instruction fetch.
240 |.macro ins_NEXT1
241 | lw INS, 0(PC)
242 | daddiu PC, PC, 4
243 |.endmacro
244 |// Instruction decode+dispatch.
245 |.macro ins_NEXT2
246 | decode_OP8a TMP1, INS
247 | decode_OP8b TMP1
248 | daddu TMP0, DISPATCH, TMP1
249 | decode_RD8a RD, INS
250 | ld AT, 0(TMP0)
251 | decode_RA8a RA, INS
252 | decode_RD8b RD
253 | jr AT
254 | decode_RA8b RA
255 |.endmacro
256 |.macro ins_NEXT
257 | ins_NEXT1
258 | ins_NEXT2
259 |.endmacro
260 |
261 |// Instruction footer.
262 |.if 1
263 | // Replicated dispatch. Less unpredictable branches, but higher I-Cache use.
264 | .define ins_next, ins_NEXT
265 | .define ins_next_, ins_NEXT
266 | .define ins_next1, ins_NEXT1
267 | .define ins_next2, ins_NEXT2
268 |.else
269 | // Common dispatch. Lower I-Cache use, only one (very) unpredictable branch.
270 | // Affects only certain kinds of benchmarks (and only with -j off).
271 | .macro ins_next
272 | b ->ins_next
273 | .endmacro
274 | .macro ins_next1
275 | .endmacro
276 | .macro ins_next2
277 | b ->ins_next
278 | .endmacro
279 | .macro ins_next_
280 | ->ins_next:
281 | ins_NEXT
282 | .endmacro
283 |.endif
284 |
285 |// Call decode and dispatch.
286 |.macro ins_callt
287 | // BASE = new base, RB = LFUNC/CFUNC, RC = nargs*8, FRAME_PC(BASE) = PC
288 | ld PC, LFUNC:RB->pc
289 | lw INS, 0(PC)
290 | daddiu PC, PC, 4
291 | decode_OP8a TMP1, INS
292 | decode_RA8a RA, INS
293 | decode_OP8b TMP1
294 | decode_RA8b RA
295 | daddu TMP0, DISPATCH, TMP1
296 | ld TMP0, 0(TMP0)
297 | jr TMP0
298 | daddu RA, RA, BASE
299 |.endmacro
300 |
301 |.macro ins_call
302 | // BASE = new base, RB = LFUNC/CFUNC, RC = nargs*8, PC = caller PC
303 | sd PC, FRAME_PC(BASE)
304 | ins_callt
305 |.endmacro
306 |
307 |//-----------------------------------------------------------------------
308 |
309 |.macro branch_RD
310 | srl TMP0, RD, 1
311 | lui AT, (-(BCBIAS_J*4 >> 16) & 65535)
312 | addu TMP0, TMP0, AT
313 | daddu PC, PC, TMP0
314 |.endmacro
315 |
316 |// Assumes DISPATCH is relative to GL.
317 #define DISPATCH_GL(field) (GG_DISP2G + (int)offsetof(global_State, field))
318 #define DISPATCH_J(field) (GG_DISP2J + (int)offsetof(jit_State, field))
319 #define GG_DISP2GOT (GG_OFS(got) - GG_OFS(dispatch))
320 #define DISPATCH_GOT(name) (GG_DISP2GOT + sizeof(void*)*LJ_GOT_##name)
321 |
322 #define PC2PROTO(field) ((int)offsetof(GCproto, field)-(int)sizeof(GCproto))
323 |
324 |.macro load_got, func
325 | ld CFUNCADDR, DISPATCH_GOT(func)(DISPATCH)
326 |.endmacro
327 |// Much faster. Sadly, there's no easy way to force the required code layout.
328 |// .macro call_intern, func; bal extern func; .endmacro
329 |.macro call_intern, func; jalr CFUNCADDR; .endmacro
330 |.macro call_extern; jalr CFUNCADDR; .endmacro
331 |.macro jmp_extern; jr CFUNCADDR; .endmacro
332 |
333 |.macro hotcheck, delta, target
334 | dsrl TMP1, PC, 1
335 | andi TMP1, TMP1, 126
336 | daddu TMP1, TMP1, DISPATCH
337 | lhu TMP2, GG_DISP2HOT(TMP1)
338 | addiu TMP2, TMP2, -delta
339 | bltz TMP2, target
340 |. sh TMP2, GG_DISP2HOT(TMP1)
341 |.endmacro
342 |
343 |.macro hotloop
344 | hotcheck HOTCOUNT_LOOP, ->vm_hotloop
345 |.endmacro
346 |
347 |.macro hotcall
348 | hotcheck HOTCOUNT_CALL, ->vm_hotcall
349 |.endmacro
350 |
351 |// Set current VM state. Uses TMP0.
352 |.macro li_vmstate, st; li TMP0, ~LJ_VMST_..st; .endmacro
353 |.macro st_vmstate; sw TMP0, DISPATCH_GL(vmstate)(DISPATCH); .endmacro
354 |
355 |// Move table write barrier back. Overwrites mark and tmp.
356 |.macro barrierback, tab, mark, tmp, target
357 | ld tmp, DISPATCH_GL(gc.grayagain)(DISPATCH)
358 | andi mark, mark, ~LJ_GC_BLACK & 255 // black2gray(tab)
359 | sd tab, DISPATCH_GL(gc.grayagain)(DISPATCH)
360 | sb mark, tab->marked
361 | b target
362 |. sd tmp, tab->gclist
363 |.endmacro
364 |
365 |// Clear type tag. Isolate lowest 14+32+1=47 bits of reg.
366 |.macro cleartp, reg; dextm reg, reg, 0, 14; .endmacro
367 |.macro cleartp, dst, reg; dextm dst, reg, 0, 14; .endmacro
368 |
369 |// Set type tag: Merge 17 type bits into bits [15+32=47, 31+32+1=64) of dst.
370 |.macro settp, dst, tp; dinsu dst, tp, 15, 31; .endmacro
371 |
372 |// Extract (negative) type tag.
373 |.macro gettp, dst, src; dsra dst, src, 47; .endmacro
374 |
375 |// Macros to check the TValue type and extract the GCobj. Branch on failure.
376 |.macro checktp, reg, tp, target
377 | gettp AT, reg
378 | daddiu AT, AT, tp
379 | bnez AT, target
380 |. cleartp reg
381 |.endmacro
382 |.macro checktp, dst, reg, tp, target
383 | gettp AT, reg
384 | daddiu AT, AT, tp
385 | bnez AT, target
386 |. cleartp dst, reg
387 |.endmacro
388 |.macro checkstr, reg, target; checktp reg, -LJ_TSTR, target; .endmacro
389 |.macro checktab, reg, target; checktp reg, -LJ_TTAB, target; .endmacro
390 |.macro checkfunc, reg, target; checktp reg, -LJ_TFUNC, target; .endmacro
391 |.macro checkint, reg, target // Caveat: has delay slot!
392 | gettp AT, reg
393 | bne AT, TISNUM, target
394 |.endmacro
395 |.macro checknum, reg, target // Caveat: has delay slot!
396 | gettp AT, reg
397 | sltiu AT, AT, LJ_TISNUM
398 | beqz AT, target
399 |.endmacro
400 |
401 |.macro mov_false, reg
402 | lu reg, 0x8000
403 | dsll reg, reg, 32
404 | not reg, reg
405 |.endmacro
406 |.macro mov_true, reg
407 | li reg, 0x0001
408 | dsll reg, reg, 48
409 | not reg, reg
410 |.endmacro
411 |
412 |//-----------------------------------------------------------------------
413
414 /* Generate subroutines used by opcodes and other parts of the VM. */
415 /* The .code_sub section should be last to help static branch prediction. */
416 static void build_subroutines(BuildCtx *ctx)
417 {
418 |.code_sub
419 |
420 |//-----------------------------------------------------------------------
421 |//-- Return handling ----------------------------------------------------
422 |//-----------------------------------------------------------------------
423 |
424 |->vm_returnp:
425 | // See vm_return. Also: TMP2 = previous base.
426 | andi AT, PC, FRAME_P
427 | beqz AT, ->cont_dispatch
428 |
429 | // Return from pcall or xpcall fast func.
430 |. mov_true TMP1
431 | ld PC, FRAME_PC(TMP2) // Fetch PC of previous frame.
432 | move BASE, TMP2 // Restore caller base.
433 | // Prepending may overwrite the pcall frame, so do it at the end.
434 | sd TMP1, -8(RA) // Prepend true to results.
435 | daddiu RA, RA, -8
436 |
437 |->vm_returnc:
438 | addiu RD, RD, 8 // RD = (nresults+1)*8.
439 | andi TMP0, PC, FRAME_TYPE
440 | beqz RD, ->vm_unwind_c_eh
441 |. li CRET1, LUA_YIELD
442 | beqz TMP0, ->BC_RET_Z // Handle regular return to Lua.
443 |. move MULTRES, RD
444 |
445 |->vm_return:
446 | // BASE = base, RA = resultptr, RD/MULTRES = (nresults+1)*8, PC = return
447 | // TMP0 = PC & FRAME_TYPE
448 | li TMP2, -8
449 | xori AT, TMP0, FRAME_C
450 | and TMP2, PC, TMP2
451 | bnez AT, ->vm_returnp
452 | dsubu TMP2, BASE, TMP2 // TMP2 = previous base.
453 |
454 | addiu TMP1, RD, -8
455 | sd TMP2, L->base
456 | li_vmstate C
457 | lw TMP2, SAVE_NRES
458 | daddiu BASE, BASE, -16
459 | st_vmstate
460 | beqz TMP1, >2
461 |. sll TMP2, TMP2, 3
462 |1:
463 | addiu TMP1, TMP1, -8
464 | ld CRET1, 0(RA)
465 | daddiu RA, RA, 8
466 | sd CRET1, 0(BASE)
467 | bnez TMP1, <1
468 |. daddiu BASE, BASE, 8
469 |
470 |2:
471 | bne TMP2, RD, >6
472 |3:
473 |. sd BASE, L->top // Store new top.
474 |
475 |->vm_leave_cp:
476 | ld TMP0, SAVE_CFRAME // Restore previous C frame.
477 | move CRET1, r0 // Ok return status for vm_pcall.
478 | sd TMP0, L->cframe
479 |
480 |->vm_leave_unw:
481 | restoreregs_ret
482 |
483 |6:
484 | ld TMP1, L->maxstack
485 | slt AT, TMP2, RD
486 | bnez AT, >7 // Less results wanted?
487 | // More results wanted. Check stack size and fill up results with nil.
488 |. slt AT, BASE, TMP1
489 | beqz AT, >8
490 |. nop
491 | sd TISNIL, 0(BASE)
492 | addiu RD, RD, 8
493 | b <2
494 |. daddiu BASE, BASE, 8
495 |
496 |7: // Less results wanted.
497 | subu TMP0, RD, TMP2
498 | dsubu TMP0, BASE, TMP0 // Either keep top or shrink it.
499 |.if MIPSR6
500 | selnez TMP0, TMP0, TMP2 // LUA_MULTRET+1 case?
501 | seleqz BASE, BASE, TMP2
502 | b <3
503 |. or BASE, BASE, TMP0
504 |.else
505 | b <3
506 |. movn BASE, TMP0, TMP2 // LUA_MULTRET+1 case?
507 |.endif
508 |
509 |8: // Corner case: need to grow stack for filling up results.
510 | // This can happen if:
511 | // - A C function grows the stack (a lot).
512 | // - The GC shrinks the stack in between.
513 | // - A return back from a lua_call() with (high) nresults adjustment.
514 | load_got lj_state_growstack
515 | move MULTRES, RD
516 | srl CARG2, TMP2, 3
517 | call_intern lj_state_growstack // (lua_State *L, int n)
518 |. move CARG1, L
519 | lw TMP2, SAVE_NRES
520 | ld BASE, L->top // Need the (realloced) L->top in BASE.
521 | move RD, MULTRES
522 | b <2
523 |. sll TMP2, TMP2, 3
524 |
525 |->vm_unwind_c: // Unwind C stack, return from vm_pcall.
526 | // (void *cframe, int errcode)
527 | move sp, CARG1
528 | move CRET1, CARG2
529 |->vm_unwind_c_eh: // Landing pad for external unwinder.
530 | ld L, SAVE_L
531 | li TMP0, ~LJ_VMST_C
532 | ld GL:TMP1, L->glref
533 | b ->vm_leave_unw
534 |. sw TMP0, GL:TMP1->vmstate
535 |
536 |->vm_unwind_ff: // Unwind C stack, return from ff pcall.
537 | // (void *cframe)
538 | li AT, -4
539 | and sp, CARG1, AT
540 |->vm_unwind_ff_eh: // Landing pad for external unwinder.
541 | ld L, SAVE_L
542 | .FPU lui TMP3, 0x59c0 // TOBIT = 2^52 + 2^51 (float).
543 | li TISNIL, LJ_TNIL
544 | li TISNUM, LJ_TISNUM
545 | ld BASE, L->base
546 | ld DISPATCH, L->glref // Setup pointer to dispatch table.
547 | .FPU mtc1 TMP3, TOBIT
548 | mov_false TMP1
549 | li_vmstate INTERP
550 | ld PC, FRAME_PC(BASE) // Fetch PC of previous frame.
551 | .FPU cvt.d.s TOBIT, TOBIT
552 | daddiu RA, BASE, -8 // Results start at BASE-8.
553 | daddiu DISPATCH, DISPATCH, GG_G2DISP
554 | sd TMP1, 0(RA) // Prepend false to error message.
555 | st_vmstate
556 | b ->vm_returnc
557 |. li RD, 16 // 2 results: false + error message.
558 |
559 |->vm_unwind_stub: // Jump to exit stub from unwinder.
560 | jr CARG1
561 |. move ra, CARG2
562 |
563 |//-----------------------------------------------------------------------
564 |//-- Grow stack for calls -----------------------------------------------
565 |//-----------------------------------------------------------------------
566 |
567 |->vm_growstack_c: // Grow stack for C function.
568 | b >2
569 |. li CARG2, LUA_MINSTACK
570 |
571 |->vm_growstack_l: // Grow stack for Lua function.
572 | // BASE = new base, RA = BASE+framesize*8, RC = nargs*8, PC = first PC
573 | daddu RC, BASE, RC
574 | dsubu RA, RA, BASE
575 | sd BASE, L->base
576 | daddiu PC, PC, 4 // Must point after first instruction.
577 | sd RC, L->top
578 | srl CARG2, RA, 3
579 |2:
580 | // L->base = new base, L->top = top
581 | load_got lj_state_growstack
582 | sd PC, SAVE_PC
583 | call_intern lj_state_growstack // (lua_State *L, int n)
584 |. move CARG1, L
585 | ld BASE, L->base
586 | ld RC, L->top
587 | ld LFUNC:RB, FRAME_FUNC(BASE)
588 | dsubu RC, RC, BASE
589 | cleartp LFUNC:RB
590 | // BASE = new base, RB = LFUNC/CFUNC, RC = nargs*8, FRAME_PC(BASE) = PC
591 | ins_callt // Just retry the call.
592 |
593 |//-----------------------------------------------------------------------
594 |//-- Entry points into the assembler VM ---------------------------------
595 |//-----------------------------------------------------------------------
596 |
597 |->vm_resume: // Setup C frame and resume thread.
598 | // (lua_State *L, TValue *base, int nres1 = 0, ptrdiff_t ef = 0)
599 | saveregs
600 | move L, CARG1
601 | ld DISPATCH, L->glref // Setup pointer to dispatch table.
602 | move BASE, CARG2
603 | lbu TMP1, L->status
604 | sd L, SAVE_L
605 | li PC, FRAME_CP
606 | daddiu TMP0, sp, CFRAME_RESUME
607 | daddiu DISPATCH, DISPATCH, GG_G2DISP
608 | sw r0, SAVE_NRES
609 | sw r0, SAVE_ERRF
610 | sd CARG1, SAVE_PC // Any value outside of bytecode is ok.
611 | sd r0, SAVE_CFRAME
612 | beqz TMP1, >3
613 |. sd TMP0, L->cframe
614 |
615 | // Resume after yield (like a return).
616 | sd L, DISPATCH_GL(cur_L)(DISPATCH)
617 | move RA, BASE
618 | ld BASE, L->base
619 | ld TMP1, L->top
620 | ld PC, FRAME_PC(BASE)
621 | .FPU lui TMP3, 0x59c0 // TOBIT = 2^52 + 2^51 (float).
622 | dsubu RD, TMP1, BASE
623 | .FPU mtc1 TMP3, TOBIT
624 | sb r0, L->status
625 | .FPU cvt.d.s TOBIT, TOBIT
626 | li_vmstate INTERP
627 | daddiu RD, RD, 8
628 | st_vmstate
629 | move MULTRES, RD
630 | andi TMP0, PC, FRAME_TYPE
631 | li TISNIL, LJ_TNIL
632 | beqz TMP0, ->BC_RET_Z
633 |. li TISNUM, LJ_TISNUM
634 | b ->vm_return
635 |. nop
636 |
637 |->vm_pcall: // Setup protected C frame and enter VM.
638 | // (lua_State *L, TValue *base, int nres1, ptrdiff_t ef)
639 | saveregs
640 | sw CARG4, SAVE_ERRF
641 | b >1
642 |. li PC, FRAME_CP
643 |
644 |->vm_call: // Setup C frame and enter VM.
645 | // (lua_State *L, TValue *base, int nres1)
646 | saveregs
647 | li PC, FRAME_C
648 |
649 |1: // Entry point for vm_pcall above (PC = ftype).
650 | ld TMP1, L:CARG1->cframe
651 | move L, CARG1
652 | sw CARG3, SAVE_NRES
653 | ld DISPATCH, L->glref // Setup pointer to dispatch table.
654 | sd CARG1, SAVE_L
655 | move BASE, CARG2
656 | daddiu DISPATCH, DISPATCH, GG_G2DISP
657 | sd CARG1, SAVE_PC // Any value outside of bytecode is ok.
658 | sd TMP1, SAVE_CFRAME
659 | sd sp, L->cframe // Add our C frame to cframe chain.
660 |
661 |3: // Entry point for vm_cpcall/vm_resume (BASE = base, PC = ftype).
662 | sd L, DISPATCH_GL(cur_L)(DISPATCH)
663 | ld TMP2, L->base // TMP2 = old base (used in vmeta_call).
664 | .FPU lui TMP3, 0x59c0 // TOBIT = 2^52 + 2^51 (float).
665 | ld TMP1, L->top
666 | .FPU mtc1 TMP3, TOBIT
667 | daddu PC, PC, BASE
668 | dsubu NARGS8:RC, TMP1, BASE
669 | li TISNUM, LJ_TISNUM
670 | dsubu PC, PC, TMP2 // PC = frame delta + frame type
671 | .FPU cvt.d.s TOBIT, TOBIT
672 | li_vmstate INTERP
673 | li TISNIL, LJ_TNIL
674 | st_vmstate
675 |
676 |->vm_call_dispatch:
677 | // TMP2 = old base, BASE = new base, RC = nargs*8, PC = caller PC
678 | ld LFUNC:RB, FRAME_FUNC(BASE)
679 | checkfunc LFUNC:RB, ->vmeta_call
680 |
681 |->vm_call_dispatch_f:
682 | ins_call
683 | // BASE = new base, RB = func, RC = nargs*8, PC = caller PC
684 |
685 |->vm_cpcall: // Setup protected C frame, call C.
686 | // (lua_State *L, lua_CFunction func, void *ud, lua_CPFunction cp)
687 | saveregs
688 | move L, CARG1
689 | ld TMP0, L:CARG1->stack
690 | sd CARG1, SAVE_L
691 | ld TMP1, L->top
692 | ld DISPATCH, L->glref // Setup pointer to dispatch table.
693 | sd CARG1, SAVE_PC // Any value outside of bytecode is ok.
694 | dsubu TMP0, TMP0, TMP1 // Compute -savestack(L, L->top).
695 | ld TMP1, L->cframe
696 | daddiu DISPATCH, DISPATCH, GG_G2DISP
697 | sw TMP0, SAVE_NRES // Neg. delta means cframe w/o frame.
698 | sw r0, SAVE_ERRF // No error function.
699 | sd TMP1, SAVE_CFRAME
700 | sd sp, L->cframe // Add our C frame to cframe chain.
701 | sd L, DISPATCH_GL(cur_L)(DISPATCH)
702 | jalr CARG4 // (lua_State *L, lua_CFunction func, void *ud)
703 |. move CFUNCADDR, CARG4
704 | move BASE, CRET1
705 | bnez CRET1, <3 // Else continue with the call.
706 |. li PC, FRAME_CP
707 | b ->vm_leave_cp // No base? Just remove C frame.
708 |. nop
709 |
710 |//-----------------------------------------------------------------------
711 |//-- Metamethod handling ------------------------------------------------
712 |//-----------------------------------------------------------------------
713 |
714 |// The lj_meta_* functions (except for lj_meta_cat) don't reallocate the
715 |// stack, so BASE doesn't need to be reloaded across these calls.
716 |
717 |//-- Continuation dispatch ----------------------------------------------
718 |
719 |->cont_dispatch:
720 | // BASE = meta base, RA = resultptr, RD = (nresults+1)*8
721 | ld TMP0, -32(BASE) // Continuation.
722 | move RB, BASE
723 | move BASE, TMP2 // Restore caller BASE.
724 | ld LFUNC:TMP1, FRAME_FUNC(TMP2)
725 |.if FFI
726 | sltiu AT, TMP0, 2
727 |.endif
728 | ld PC, -24(RB) // Restore PC from [cont|PC].
729 | cleartp LFUNC:TMP1
730 | daddu TMP2, RA, RD
731 |.if FFI
732 | bnez AT, >1
733 |.endif
734 |. sd TISNIL, -8(TMP2) // Ensure one valid arg.
735 | ld TMP1, LFUNC:TMP1->pc
736 | // BASE = base, RA = resultptr, RB = meta base
737 | jr TMP0 // Jump to continuation.
738 |. ld KBASE, PC2PROTO(k)(TMP1)
739 |
740 |.if FFI
741 |1:
742 | bnez TMP0, ->cont_ffi_callback // cont = 1: return from FFI callback.
743 | // cont = 0: tailcall from C function.
744 |. daddiu TMP1, RB, -32
745 | b ->vm_call_tail
746 |. dsubu RC, TMP1, BASE
747 |.endif
748 |
749 |->cont_cat: // RA = resultptr, RB = meta base
750 | lw INS, -4(PC)
751 | daddiu CARG2, RB, -32
752 | ld CRET1, 0(RA)
753 | decode_RB8a MULTRES, INS
754 | decode_RA8a RA, INS
755 | decode_RB8b MULTRES
756 | decode_RA8b RA
757 | daddu TMP1, BASE, MULTRES
758 | sd BASE, L->base
759 | dsubu CARG3, CARG2, TMP1
760 | bne TMP1, CARG2, ->BC_CAT_Z
761 |. sd CRET1, 0(CARG2)
762 | daddu RA, BASE, RA
763 | b ->cont_nop
764 |. sd CRET1, 0(RA)
765 |
766 |//-- Table indexing metamethods -----------------------------------------
767 |
768 |->vmeta_tgets1:
769 | daddiu CARG3, DISPATCH, DISPATCH_GL(tmptv)
770 | li TMP0, LJ_TSTR
771 | settp STR:RC, TMP0
772 | b >1
773 |. sd STR:RC, 0(CARG3)
774 |
775 |->vmeta_tgets:
776 | daddiu CARG2, DISPATCH, DISPATCH_GL(tmptv)
777 | li TMP0, LJ_TTAB
778 | li TMP1, LJ_TSTR
779 | settp TAB:RB, TMP0
780 | daddiu CARG3, DISPATCH, DISPATCH_GL(tmptv2)
781 | sd TAB:RB, 0(CARG2)
782 | settp STR:RC, TMP1
783 | b >1
784 |. sd STR:RC, 0(CARG3)
785 |
786 |->vmeta_tgetb: // TMP0 = index
787 | daddiu CARG3, DISPATCH, DISPATCH_GL(tmptv)
788 | settp TMP0, TISNUM
789 | sd TMP0, 0(CARG3)
790 |
791 |->vmeta_tgetv:
792 |1:
793 | load_got lj_meta_tget
794 | sd BASE, L->base
795 | sd PC, SAVE_PC
796 | call_intern lj_meta_tget // (lua_State *L, TValue *o, TValue *k)
797 |. move CARG1, L
798 | // Returns TValue * (finished) or NULL (metamethod).
799 | beqz CRET1, >3
800 |. daddiu TMP1, BASE, -FRAME_CONT
801 | ld CARG1, 0(CRET1)
802 | ins_next1
803 | sd CARG1, 0(RA)
804 | ins_next2
805 |
806 |3: // Call __index metamethod.
807 | // BASE = base, L->top = new base, stack = cont/func/t/k
808 | ld BASE, L->top
809 | sd PC, -24(BASE) // [cont|PC]
810 | dsubu PC, BASE, TMP1
811 | ld LFUNC:RB, FRAME_FUNC(BASE) // Guaranteed to be a function here.
812 | cleartp LFUNC:RB
813 | b ->vm_call_dispatch_f
814 |. li NARGS8:RC, 16 // 2 args for func(t, k).
815 |
816 |->vmeta_tgetr:
817 | load_got lj_tab_getinth
818 | call_intern lj_tab_getinth // (GCtab *t, int32_t key)
819 |. nop
820 | // Returns cTValue * or NULL.
821 | beqz CRET1, ->BC_TGETR_Z
822 |. move CARG2, TISNIL
823 | b ->BC_TGETR_Z
824 |. ld CARG2, 0(CRET1)
825 |
826 |//-----------------------------------------------------------------------
827 |
828 |->vmeta_tsets1:
829 | daddiu CARG3, DISPATCH, DISPATCH_GL(tmptv)
830 | li TMP0, LJ_TSTR
831 | settp STR:RC, TMP0
832 | b >1
833 |. sd STR:RC, 0(CARG3)
834 |
835 |->vmeta_tsets:
836 | daddiu CARG2, DISPATCH, DISPATCH_GL(tmptv)
837 | li TMP0, LJ_TTAB
838 | li TMP1, LJ_TSTR
839 | settp TAB:RB, TMP0
840 | daddiu CARG3, DISPATCH, DISPATCH_GL(tmptv2)
841 | sd TAB:RB, 0(CARG2)
842 | settp STR:RC, TMP1
843 | b >1
844 |. sd STR:RC, 0(CARG3)
845 |
846 |->vmeta_tsetb: // TMP0 = index
847 | daddiu CARG3, DISPATCH, DISPATCH_GL(tmptv)
848 | settp TMP0, TISNUM
849 | sd TMP0, 0(CARG3)
850 |
851 |->vmeta_tsetv:
852 |1:
853 | load_got lj_meta_tset
854 | sd BASE, L->base
855 | sd PC, SAVE_PC
856 | call_intern lj_meta_tset // (lua_State *L, TValue *o, TValue *k)
857 |. move CARG1, L
858 | // Returns TValue * (finished) or NULL (metamethod).
859 | beqz CRET1, >3
860 |. ld CARG1, 0(RA)
861 | // NOBARRIER: lj_meta_tset ensures the table is not black.
862 | ins_next1
863 | sd CARG1, 0(CRET1)
864 | ins_next2
865 |
866 |3: // Call __newindex metamethod.
867 | // BASE = base, L->top = new base, stack = cont/func/t/k/(v)
868 | daddiu TMP1, BASE, -FRAME_CONT
869 | ld BASE, L->top
870 | sd PC, -24(BASE) // [cont|PC]
871 | dsubu PC, BASE, TMP1
872 | ld LFUNC:RB, FRAME_FUNC(BASE) // Guaranteed to be a function here.
873 | cleartp LFUNC:RB
874 | sd CARG1, 16(BASE) // Copy value to third argument.
875 | b ->vm_call_dispatch_f
876 |. li NARGS8:RC, 24 // 3 args for func(t, k, v)
877 |
878 |->vmeta_tsetr:
879 | load_got lj_tab_setinth
880 | sd BASE, L->base
881 | sd PC, SAVE_PC
882 | call_intern lj_tab_setinth // (lua_State *L, GCtab *t, int32_t key)
883 |. move CARG1, L
884 | // Returns TValue *.
885 | b ->BC_TSETR_Z
886 |. nop
887 |
888 |//-- Comparison metamethods ---------------------------------------------
889 |
890 |->vmeta_comp:
891 | // RA/RD point to o1/o2.
892 | move CARG2, RA
893 | move CARG3, RD
894 | load_got lj_meta_comp
895 | daddiu PC, PC, -4
896 | sd BASE, L->base
897 | sd PC, SAVE_PC
898 | decode_OP1 CARG4, INS
899 | call_intern lj_meta_comp // (lua_State *L, TValue *o1, *o2, int op)
900 |. move CARG1, L
901 | // Returns 0/1 or TValue * (metamethod).
902 |3:
903 | sltiu AT, CRET1, 2
904 | beqz AT, ->vmeta_binop
905 | negu TMP2, CRET1
906 |4:
907 | lhu RD, OFS_RD(PC)
908 | daddiu PC, PC, 4
909 | lui TMP1, (-(BCBIAS_J*4 >> 16) & 65535)
910 | sll RD, RD, 2
911 | addu RD, RD, TMP1
912 | and RD, RD, TMP2
913 | daddu PC, PC, RD
914 |->cont_nop:
915 | ins_next
916 |
917 |->cont_ra: // RA = resultptr
918 | lbu TMP1, -4+OFS_RA(PC)
919 | ld CRET1, 0(RA)
920 | sll TMP1, TMP1, 3
921 | daddu TMP1, BASE, TMP1
922 | b ->cont_nop
923 |. sd CRET1, 0(TMP1)
924 |
925 |->cont_condt: // RA = resultptr
926 | ld TMP0, 0(RA)
927 | gettp TMP0, TMP0
928 | sltiu AT, TMP0, LJ_TISTRUECOND
929 | b <4
930 |. negu TMP2, AT // Branch if result is true.
931 |
932 |->cont_condf: // RA = resultptr
933 | ld TMP0, 0(RA)
934 | gettp TMP0, TMP0
935 | sltiu AT, TMP0, LJ_TISTRUECOND
936 | b <4
937 |. addiu TMP2, AT, -1 // Branch if result is false.
938 |
939 |->vmeta_equal:
940 | // CARG1/CARG2 point to o1/o2. TMP0 is set to 0/1.
941 | load_got lj_meta_equal
942 | cleartp LFUNC:CARG3, CARG2
943 | cleartp LFUNC:CARG2, CARG1
944 | move CARG4, TMP0
945 | daddiu PC, PC, -4
946 | sd BASE, L->base
947 | sd PC, SAVE_PC
948 | call_intern lj_meta_equal // (lua_State *L, GCobj *o1, *o2, int ne)
949 |. move CARG1, L
950 | // Returns 0/1 or TValue * (metamethod).
951 | b <3
952 |. nop
953 |
954 |->vmeta_equal_cd:
955 |.if FFI
956 | load_got lj_meta_equal_cd
957 | move CARG2, INS
958 | daddiu PC, PC, -4
959 | sd BASE, L->base
960 | sd PC, SAVE_PC
961 | call_intern lj_meta_equal_cd // (lua_State *L, BCIns op)
962 |. move CARG1, L
963 | // Returns 0/1 or TValue * (metamethod).
964 | b <3
965 |. nop
966 |.endif
967 |
968 |->vmeta_istype:
969 | load_got lj_meta_istype
970 | daddiu PC, PC, -4
971 | sd BASE, L->base
972 | srl CARG2, RA, 3
973 | srl CARG3, RD, 3
974 | sd PC, SAVE_PC
975 | call_intern lj_meta_istype // (lua_State *L, BCReg ra, BCReg tp)
976 |. move CARG1, L
977 | b ->cont_nop
978 |. nop
979 |
980 |//-- Arithmetic metamethods ---------------------------------------------
981 |
982 |->vmeta_unm:
983 | move RC, RB
984 |
985 |->vmeta_arith:
986 | load_got lj_meta_arith
987 | sd BASE, L->base
988 | move CARG2, RA
989 | sd PC, SAVE_PC
990 | move CARG3, RB
991 | move CARG4, RC
992 | decode_OP1 CARG5, INS // CARG5 == RB.
993 | call_intern lj_meta_arith // (lua_State *L, TValue *ra,*rb,*rc, BCReg op)
994 |. move CARG1, L
995 | // Returns NULL (finished) or TValue * (metamethod).
996 | beqz CRET1, ->cont_nop
997 |. nop
998 |
999 | // Call metamethod for binary op.
1000 |->vmeta_binop:
1001 | // BASE = old base, CRET1 = new base, stack = cont/func/o1/o2
1002 | dsubu TMP1, CRET1, BASE
1003 | sd PC, -24(CRET1) // [cont|PC]
1004 | move TMP2, BASE
1005 | daddiu PC, TMP1, FRAME_CONT
1006 | move BASE, CRET1
1007 | b ->vm_call_dispatch
1008 |. li NARGS8:RC, 16 // 2 args for func(o1, o2).
1009 |
1010 |->vmeta_len:
1011 | // CARG2 already set by BC_LEN.
1012 #if LJ_52
1013 | move MULTRES, CARG1
1014 #endif
1015 | load_got lj_meta_len
1016 | sd BASE, L->base
1017 | sd PC, SAVE_PC
1018 | call_intern lj_meta_len // (lua_State *L, TValue *o)
1019 |. move CARG1, L
1020 | // Returns NULL (retry) or TValue * (metamethod base).
1021 #if LJ_52
1022 | bnez CRET1, ->vmeta_binop // Binop call for compatibility.
1023 |. nop
1024 | b ->BC_LEN_Z
1025 |. move CARG1, MULTRES
1026 #else
1027 | b ->vmeta_binop // Binop call for compatibility.
1028 |. nop
1029 #endif
1030 |
1031 |//-- Call metamethod ----------------------------------------------------
1032 |
1033 |->vmeta_call: // Resolve and call __call metamethod.
1034 | // TMP2 = old base, BASE = new base, RC = nargs*8
1035 | load_got lj_meta_call
1036 | sd TMP2, L->base // This is the callers base!
1037 | daddiu CARG2, BASE, -16
1038 | sd PC, SAVE_PC
1039 | daddu CARG3, BASE, RC
1040 | move MULTRES, NARGS8:RC
1041 | call_intern lj_meta_call // (lua_State *L, TValue *func, TValue *top)
1042 |. move CARG1, L
1043 | ld LFUNC:RB, FRAME_FUNC(BASE) // Guaranteed to be a function here.
1044 | daddiu NARGS8:RC, MULTRES, 8 // Got one more argument now.
1045 | cleartp LFUNC:RB
1046 | ins_call
1047 |
1048 |->vmeta_callt: // Resolve __call for BC_CALLT.
1049 | // BASE = old base, RA = new base, RC = nargs*8
1050 | load_got lj_meta_call
1051 | sd BASE, L->base
1052 | daddiu CARG2, RA, -16
1053 | sd PC, SAVE_PC
1054 | daddu CARG3, RA, RC
1055 | move MULTRES, NARGS8:RC
1056 | call_intern lj_meta_call // (lua_State *L, TValue *func, TValue *top)
1057 |. move CARG1, L
1058 | ld RB, FRAME_FUNC(RA) // Guaranteed to be a function here.
1059 | ld TMP1, FRAME_PC(BASE)
1060 | daddiu NARGS8:RC, MULTRES, 8 // Got one more argument now.
1061 | b ->BC_CALLT_Z
1062 |. cleartp LFUNC:CARG3, RB
1063 |
1064 |//-- Argument coercion for 'for' statement ------------------------------
1065 |
1066 |->vmeta_for:
1067 | load_got lj_meta_for
1068 | sd BASE, L->base
1069 | move CARG2, RA
1070 | sd PC, SAVE_PC
1071 | move MULTRES, INS
1072 | call_intern lj_meta_for // (lua_State *L, TValue *base)
1073 |. move CARG1, L
1074 |.if JIT
1075 | decode_OP1 TMP0, MULTRES
1076 | li AT, BC_JFORI
1077 |.endif
1078 | decode_RA8a RA, MULTRES
1079 | decode_RD8a RD, MULTRES
1080 | decode_RA8b RA
1081 |.if JIT
1082 | beq TMP0, AT, =>BC_JFORI
1083 |. decode_RD8b RD
1084 | b =>BC_FORI
1085 |. nop
1086 |.else
1087 | b =>BC_FORI
1088 |. decode_RD8b RD
1089 |.endif
1090 |
1091 |//-----------------------------------------------------------------------
1092 |//-- Fast functions -----------------------------------------------------
1093 |//-----------------------------------------------------------------------
1094 |
1095 |.macro .ffunc, name
1096 |->ff_ .. name:
1097 |.endmacro
1098 |
1099 |.macro .ffunc_1, name
1100 |->ff_ .. name:
1101 | beqz NARGS8:RC, ->fff_fallback
1102 |. ld CARG1, 0(BASE)
1103 |.endmacro
1104 |
1105 |.macro .ffunc_2, name
1106 |->ff_ .. name:
1107 | sltiu AT, NARGS8:RC, 16
1108 | ld CARG1, 0(BASE)
1109 | bnez AT, ->fff_fallback
1110 |. ld CARG2, 8(BASE)
1111 |.endmacro
1112 |
1113 |.macro .ffunc_n, name // Caveat: has delay slot!
1114 |->ff_ .. name:
1115 | ld CARG1, 0(BASE)
1116 | beqz NARGS8:RC, ->fff_fallback
1117 | // Either ldc1 or the 1st instruction of checknum is in the delay slot.
1118 | .FPU ldc1 FARG1, 0(BASE)
1119 | checknum CARG1, ->fff_fallback
1120 |.endmacro
1121 |
1122 |.macro .ffunc_nn, name // Caveat: has delay slot!
1123 |->ff_ .. name:
1124 | ld CARG1, 0(BASE)
1125 | sltiu AT, NARGS8:RC, 16
1126 | ld CARG2, 8(BASE)
1127 | bnez AT, ->fff_fallback
1128 |. gettp TMP0, CARG1
1129 | gettp TMP1, CARG2
1130 | sltiu TMP0, TMP0, LJ_TISNUM
1131 | sltiu TMP1, TMP1, LJ_TISNUM
1132 | .FPU ldc1 FARG1, 0(BASE)
1133 | and TMP0, TMP0, TMP1
1134 | .FPU ldc1 FARG2, 8(BASE)
1135 | beqz TMP0, ->fff_fallback
1136 |.endmacro
1137 |
1138 |// Inlined GC threshold check. Caveat: uses TMP0 and TMP1 and has delay slot!
1139 |// MIPSR6: no delay slot, but a forbidden slot.
1140 |.macro ffgccheck
1141 | ld TMP0, DISPATCH_GL(gc.total)(DISPATCH)
1142 | ld TMP1, DISPATCH_GL(gc.threshold)(DISPATCH)
1143 | dsubu AT, TMP0, TMP1
1144 |.if MIPSR6
1145 | bgezalc AT, ->fff_gcstep
1146 |.else
1147 | bgezal AT, ->fff_gcstep
1148 |.endif
1149 |.endmacro
1150 |
1151 |//-- Base library: checks -----------------------------------------------
1152 |.ffunc_1 assert
1153 | gettp AT, CARG1
1154 | sltiu AT, AT, LJ_TISTRUECOND
1155 | beqz AT, ->fff_fallback
1156 |. daddiu RA, BASE, -16
1157 | ld PC, FRAME_PC(BASE)
1158 | addiu RD, NARGS8:RC, 8 // Compute (nresults+1)*8.
1159 | daddu TMP2, RA, RD
1160 | daddiu TMP1, BASE, 8
1161 | beq BASE, TMP2, ->fff_res // Done if exactly 1 argument.
1162 |. sd CARG1, 0(RA)
1163 |1:
1164 | ld CRET1, 0(TMP1)
1165 | sd CRET1, -16(TMP1)
1166 | bne TMP1, TMP2, <1
1167 |. daddiu TMP1, TMP1, 8
1168 | b ->fff_res
1169 |. nop
1170 |
1171 |.ffunc_1 type
1172 | gettp TMP0, CARG1
1173 | sltu TMP1, TISNUM, TMP0
1174 | not TMP2, TMP0
1175 | li TMP3, ~LJ_TISNUM
1176 |.if MIPSR6
1177 | selnez TMP2, TMP2, TMP1
1178 | seleqz TMP3, TMP3, TMP1
1179 | or TMP2, TMP2, TMP3
1180 |.else
1181 | movz TMP2, TMP3, TMP1
1182 |.endif
1183 | dsll TMP2, TMP2, 3
1184 | daddu TMP2, CFUNC:RB, TMP2
1185 | b ->fff_restv
1186 |. ld CARG1, CFUNC:TMP2->upvalue
1187 |
1188 |//-- Base library: getters and setters ---------------------------------
1189 |
1190 |.ffunc_1 getmetatable
1191 | gettp TMP2, CARG1
1192 | daddiu TMP0, TMP2, -LJ_TTAB
1193 | daddiu TMP1, TMP2, -LJ_TUDATA
1194 |.if MIPSR6
1195 | selnez TMP0, TMP1, TMP0
1196 |.else
1197 | movn TMP0, TMP1, TMP0
1198 |.endif
1199 | bnez TMP0, >6
1200 |. cleartp TAB:CARG1
1201 |1: // Field metatable must be at same offset for GCtab and GCudata!
1202 | ld TAB:RB, TAB:CARG1->metatable
1203 |2:
1204 | ld STR:RC, DISPATCH_GL(gcroot[GCROOT_MMNAME+MM_metatable])(DISPATCH)
1205 | beqz TAB:RB, ->fff_restv
1206 |. li CARG1, LJ_TNIL
1207 | lw TMP0, TAB:RB->hmask
1208 | lw TMP1, STR:RC->sid
1209 | ld NODE:TMP2, TAB:RB->node
1210 | and TMP1, TMP1, TMP0 // idx = str->sid & tab->hmask
1211 | dsll TMP0, TMP1, 5
1212 | dsll TMP1, TMP1, 3
1213 | dsubu TMP1, TMP0, TMP1
1214 | daddu NODE:TMP2, NODE:TMP2, TMP1 // node = tab->node + (idx*32-idx*8)
1215 | li CARG4, LJ_TSTR
1216 | settp STR:RC, CARG4 // Tagged key to look for.
1217 |3: // Rearranged logic, because we expect _not_ to find the key.
1218 | ld TMP0, NODE:TMP2->key
1219 | ld CARG1, NODE:TMP2->val
1220 | ld NODE:TMP2, NODE:TMP2->next
1221 | beq RC, TMP0, >5
1222 |. li AT, LJ_TTAB
1223 | bnez NODE:TMP2, <3
1224 |. nop
1225 |4:
1226 | move CARG1, RB
1227 | b ->fff_restv // Not found, keep default result.
1228 |. settp CARG1, AT
1229 |5:
1230 | bne CARG1, TISNIL, ->fff_restv
1231 |. nop
1232 | b <4 // Ditto for nil value.
1233 |. nop
1234 |
1235 |6:
1236 | sltiu AT, TMP2, LJ_TISNUM
1237 |.if MIPSR6
1238 | selnez TMP0, TISNUM, AT
1239 | seleqz AT, TMP2, AT
1240 | or TMP2, TMP0, AT
1241 |.else
1242 | movn TMP2, TISNUM, AT
1243 |.endif
1244 | dsll TMP2, TMP2, 3
1245 | dsubu TMP0, DISPATCH, TMP2
1246 | b <2
1247 |. ld TAB:RB, DISPATCH_GL(gcroot[GCROOT_BASEMT])-8(TMP0)
1248 |
1249 |.ffunc_2 setmetatable
1250 | // Fast path: no mt for table yet and not clearing the mt.
1251 | checktp TMP1, CARG1, -LJ_TTAB, ->fff_fallback
1252 | gettp TMP3, CARG2
1253 | ld TAB:TMP0, TAB:TMP1->metatable
1254 | lbu TMP2, TAB:TMP1->marked
1255 | daddiu AT, TMP3, -LJ_TTAB
1256 | cleartp TAB:CARG2
1257 | or AT, AT, TAB:TMP0
1258 | bnez AT, ->fff_fallback
1259 |. andi AT, TMP2, LJ_GC_BLACK // isblack(table)
1260 | beqz AT, ->fff_restv
1261 |. sd TAB:CARG2, TAB:TMP1->metatable
1262 | barrierback TAB:TMP1, TMP2, TMP0, ->fff_restv
1263 |
1264 |.ffunc rawget
1265 | ld CARG2, 0(BASE)
1266 | sltiu AT, NARGS8:RC, 16
1267 | load_got lj_tab_get
1268 | gettp TMP0, CARG2
1269 | cleartp CARG2
1270 | daddiu TMP0, TMP0, -LJ_TTAB
1271 | or AT, AT, TMP0
1272 | bnez AT, ->fff_fallback
1273 |. daddiu CARG3, BASE, 8
1274 | call_intern lj_tab_get // (lua_State *L, GCtab *t, cTValue *key)
1275 |. move CARG1, L
1276 | b ->fff_restv
1277 |. ld CARG1, 0(CRET1)
1278 |
1279 |//-- Base library: conversions ------------------------------------------
1280 |
1281 |.ffunc tonumber
1282 | // Only handles the number case inline (without a base argument).
1283 | ld CARG1, 0(BASE)
1284 | xori AT, NARGS8:RC, 8 // Exactly one number argument.
1285 | gettp TMP1, CARG1
1286 | sltu TMP0, TISNUM, TMP1
1287 | or AT, AT, TMP0
1288 | bnez AT, ->fff_fallback
1289 |. nop
1290 | b ->fff_restv
1291 |. nop
1292 |
1293 |.ffunc_1 tostring
1294 | // Only handles the string or number case inline.
1295 | gettp TMP0, CARG1
1296 | daddiu AT, TMP0, -LJ_TSTR
1297 | // A __tostring method in the string base metatable is ignored.
1298 | beqz AT, ->fff_restv // String key?
1299 | // Handle numbers inline, unless a number base metatable is present.
1300 |. ld TMP1, DISPATCH_GL(gcroot[GCROOT_BASEMT_NUM])(DISPATCH)
1301 | sltu TMP0, TISNUM, TMP0
1302 | or TMP0, TMP0, TMP1
1303 | bnez TMP0, ->fff_fallback
1304 |. sd BASE, L->base // Add frame since C call can throw.
1305 |.if MIPSR6
1306 | sd PC, SAVE_PC // Redundant (but a defined value).
1307 | ffgccheck
1308 |.else
1309 | ffgccheck
1310 |. sd PC, SAVE_PC // Redundant (but a defined value).
1311 |.endif
1312 | load_got lj_strfmt_number
1313 | move CARG1, L
1314 | call_intern lj_strfmt_number // (lua_State *L, cTValue *o)
1315 |. move CARG2, BASE
1316 | // Returns GCstr *.
1317 | li AT, LJ_TSTR
1318 | settp CRET1, AT
1319 | b ->fff_restv
1320 |. move CARG1, CRET1
1321 |
1322 |//-- Base library: iterators -------------------------------------------
1323 |
1324 |.ffunc_1 next
1325 | checktp CARG1, -LJ_TTAB, ->fff_fallback
1326 | daddu TMP2, BASE, NARGS8:RC
1327 | sd TISNIL, 0(TMP2) // Set missing 2nd arg to nil.
1328 | load_got lj_tab_next
1329 | ld PC, FRAME_PC(BASE)
1330 | daddiu CARG2, BASE, 8
1331 | call_intern lj_tab_next // (GCtab *t, cTValue *key, TValue *o)
1332 |. daddiu CARG3, BASE, -16
1333 | // Returns 1=found, 0=end, -1=error.
1334 | daddiu RA, BASE, -16
1335 | bgtz CRET1, ->fff_res // Found key/value.
1336 |. li RD, (2+1)*8
1337 | beqz CRET1, ->fff_restv // End of traversal: return nil.
1338 |. move CARG1, TISNIL
1339 | ld CFUNC:RB, FRAME_FUNC(BASE)
1340 | cleartp CFUNC:RB
1341 | b ->fff_fallback // Invalid key.
1342 |. li RC, 2*8
1343 |
1344 |.ffunc_1 pairs
1345 | checktp TAB:TMP1, CARG1, -LJ_TTAB, ->fff_fallback
1346 | ld PC, FRAME_PC(BASE)
1347 #if LJ_52
1348 | ld TAB:TMP2, TAB:TMP1->metatable
1349 | ld TMP0, CFUNC:RB->upvalue[0]
1350 | bnez TAB:TMP2, ->fff_fallback
1351 #else
1352 | ld TMP0, CFUNC:RB->upvalue[0]
1353 #endif
1354 |. daddiu RA, BASE, -16
1355 | sd TISNIL, 0(BASE)
1356 | sd CARG1, -8(BASE)
1357 | sd TMP0, 0(RA)
1358 | b ->fff_res
1359 |. li RD, (3+1)*8
1360 |
1361 |.ffunc_2 ipairs_aux
1362 | checktab CARG1, ->fff_fallback
1363 | checkint CARG2, ->fff_fallback
1364 |. lw TMP0, TAB:CARG1->asize
1365 | ld TMP1, TAB:CARG1->array
1366 | ld PC, FRAME_PC(BASE)
1367 | sextw TMP2, CARG2
1368 | addiu TMP2, TMP2, 1
1369 | sltu AT, TMP2, TMP0
1370 | daddiu RA, BASE, -16
1371 | zextw TMP0, TMP2
1372 | settp TMP0, TISNUM
1373 | beqz AT, >2 // Not in array part?
1374 |. sd TMP0, 0(RA)
1375 | dsll TMP3, TMP2, 3
1376 | daddu TMP3, TMP1, TMP3
1377 | ld TMP1, 0(TMP3)
1378 |1:
1379 | beq TMP1, TISNIL, ->fff_res // End of iteration, return 0 results.
1380 |. li RD, (0+1)*8
1381 | sd TMP1, -8(BASE)
1382 | b ->fff_res
1383 |. li RD, (2+1)*8
1384 |2: // Check for empty hash part first. Otherwise call C function.
1385 | lw TMP0, TAB:CARG1->hmask
1386 | load_got lj_tab_getinth
1387 | beqz TMP0, ->fff_res
1388 |. li RD, (0+1)*8
1389 | call_intern lj_tab_getinth // (GCtab *t, int32_t key)
1390 |. move CARG2, TMP2
1391 | // Returns cTValue * or NULL.
1392 | beqz CRET1, ->fff_res
1393 |. li RD, (0+1)*8
1394 | b <1
1395 |. ld TMP1, 0(CRET1)
1396 |
1397 |.ffunc_1 ipairs
1398 | checktp TAB:TMP1, CARG1, -LJ_TTAB, ->fff_fallback
1399 | ld PC, FRAME_PC(BASE)
1400 #if LJ_52
1401 | ld TAB:TMP2, TAB:TMP1->metatable
1402 | ld CFUNC:TMP0, CFUNC:RB->upvalue[0]
1403 | bnez TAB:TMP2, ->fff_fallback
1404 #else
1405 | ld TMP0, CFUNC:RB->upvalue[0]
1406 #endif
1407 | daddiu RA, BASE, -16
1408 | dsll AT, TISNUM, 47
1409 | sd CARG1, -8(BASE)
1410 | sd AT, 0(BASE)
1411 | sd CFUNC:TMP0, 0(RA)
1412 | b ->fff_res
1413 |. li RD, (3+1)*8
1414 |
1415 |//-- Base library: catch errors ----------------------------------------
1416 |
1417 |.ffunc pcall
1418 | daddiu NARGS8:RC, NARGS8:RC, -8
1419 | lbu TMP3, DISPATCH_GL(hookmask)(DISPATCH)
1420 | bltz NARGS8:RC, ->fff_fallback
1421 |. move TMP2, BASE
1422 | daddiu BASE, BASE, 16
1423 | // Remember active hook before pcall.
1424 | srl TMP3, TMP3, HOOK_ACTIVE_SHIFT
1425 | andi TMP3, TMP3, 1
1426 | daddiu PC, TMP3, 16+FRAME_PCALL
1427 | beqz NARGS8:RC, ->vm_call_dispatch
1428 |1:
1429 |. daddu TMP0, BASE, NARGS8:RC
1430 |2:
1431 | ld TMP1, -16(TMP0)
1432 | sd TMP1, -8(TMP0)
1433 | daddiu TMP0, TMP0, -8
1434 | bne TMP0, BASE, <2
1435 |. nop
1436 | b ->vm_call_dispatch
1437 |. nop
1438 |
1439 |.ffunc xpcall
1440 | daddiu NARGS8:TMP0, NARGS8:RC, -16
1441 | ld CARG1, 0(BASE)
1442 | ld CARG2, 8(BASE)
1443 | bltz NARGS8:TMP0, ->fff_fallback
1444 |. lbu TMP1, DISPATCH_GL(hookmask)(DISPATCH)
1445 | gettp AT, CARG2
1446 | daddiu AT, AT, -LJ_TFUNC
1447 | bnez AT, ->fff_fallback // Traceback must be a function.
1448 |. move TMP2, BASE
1449 | move NARGS8:RC, NARGS8:TMP0
1450 | daddiu BASE, BASE, 24
1451 | // Remember active hook before pcall.
1452 | srl TMP3, TMP3, HOOK_ACTIVE_SHIFT
1453 | sd CARG2, 0(TMP2) // Swap function and traceback.
1454 | andi TMP3, TMP3, 1
1455 | sd CARG1, 8(TMP2)
1456 | beqz NARGS8:RC, ->vm_call_dispatch
1457 |. daddiu PC, TMP3, 24+FRAME_PCALL
1458 | b <1
1459 |. nop
1460 |
1461 |//-- Coroutine library --------------------------------------------------
1462 |
1463 |.macro coroutine_resume_wrap, resume
1464 |.if resume
1465 |.ffunc_1 coroutine_resume
1466 | checktp CARG1, CARG1, -LJ_TTHREAD, ->fff_fallback
1467 |.else
1468 |.ffunc coroutine_wrap_aux
1469 | ld L:CARG1, CFUNC:RB->upvalue[0].gcr
1470 | cleartp L:CARG1
1471 |.endif
1472 | lbu TMP0, L:CARG1->status
1473 | ld TMP1, L:CARG1->cframe
1474 | ld CARG2, L:CARG1->top
1475 | ld TMP2, L:CARG1->base
1476 | addiu AT, TMP0, -LUA_YIELD
1477 | daddu CARG3, CARG2, TMP0
1478 | daddiu TMP3, CARG2, 8
1479 |.if MIPSR6
1480 | seleqz CARG2, CARG2, AT
1481 | selnez TMP3, TMP3, AT
1482 | bgtz AT, ->fff_fallback // st > LUA_YIELD?
1483 |. or CARG2, TMP3, CARG2
1484 |.else
1485 | bgtz AT, ->fff_fallback // st > LUA_YIELD?
1486 |. movn CARG2, TMP3, AT
1487 |.endif
1488 | xor TMP2, TMP2, CARG3
1489 | bnez TMP1, ->fff_fallback // cframe != 0?
1490 |. or AT, TMP2, TMP0
1491 | ld TMP0, L:CARG1->maxstack
1492 | beqz AT, ->fff_fallback // base == top && st == 0?
1493 |. ld PC, FRAME_PC(BASE)
1494 | daddu TMP2, CARG2, NARGS8:RC
1495 | sltu AT, TMP0, TMP2
1496 | bnez AT, ->fff_fallback // Stack overflow?
1497 |. sd PC, SAVE_PC
1498 | sd BASE, L->base
1499 |1:
1500 |.if resume
1501 | daddiu BASE, BASE, 8 // Keep resumed thread in stack for GC.
1502 | daddiu NARGS8:RC, NARGS8:RC, -8
1503 | daddiu TMP2, TMP2, -8
1504 |.endif
1505 | sd TMP2, L:CARG1->top
1506 | daddu TMP1, BASE, NARGS8:RC
1507 | move CARG3, CARG2
1508 | sd BASE, L->top
1509 |2: // Move args to coroutine.
1510 | ld CRET1, 0(BASE)
1511 | sltu AT, BASE, TMP1
1512 | beqz AT, >3
1513 |. daddiu BASE, BASE, 8
1514 | sd CRET1, 0(CARG3)
1515 | b <2
1516 |. daddiu CARG3, CARG3, 8
1517 |3:
1518 | bal ->vm_resume // (lua_State *L, TValue *base, 0, 0)
1519 |. move L:RA, L:CARG1
1520 | // Returns thread status.
1521 |4:
1522 | ld TMP2, L:RA->base
1523 | sltiu AT, CRET1, LUA_YIELD+1
1524 | ld TMP3, L:RA->top
1525 | li_vmstate INTERP
1526 | ld BASE, L->base
1527 | sd L, DISPATCH_GL(cur_L)(DISPATCH)
1528 | st_vmstate
1529 | beqz AT, >8
1530 |. dsubu RD, TMP3, TMP2
1531 | ld TMP0, L->maxstack
1532 | beqz RD, >6 // No results?
1533 |. daddu TMP1, BASE, RD
1534 | sltu AT, TMP0, TMP1
1535 | bnez AT, >9 // Need to grow stack?
1536 |. daddu TMP3, TMP2, RD
1537 | sd TMP2, L:RA->top // Clear coroutine stack.
1538 | move TMP1, BASE
1539 |5: // Move results from coroutine.
1540 | ld CRET1, 0(TMP2)
1541 | daddiu TMP2, TMP2, 8
1542 | sltu AT, TMP2, TMP3
1543 | sd CRET1, 0(TMP1)
1544 | bnez AT, <5
1545 |. daddiu TMP1, TMP1, 8
1546 |6:
1547 | andi TMP0, PC, FRAME_TYPE
1548 |.if resume
1549 | mov_true TMP1
1550 | daddiu RA, BASE, -8
1551 | sd TMP1, -8(BASE) // Prepend true to results.
1552 | daddiu RD, RD, 16
1553 |.else
1554 | move RA, BASE
1555 | daddiu RD, RD, 8
1556 |.endif
1557 |7:
1558 | sd PC, SAVE_PC
1559 | beqz TMP0, ->BC_RET_Z
1560 |. move MULTRES, RD
1561 | b ->vm_return
1562 |. nop
1563 |
1564 |8: // Coroutine returned with error (at co->top-1).
1565 |.if resume
1566 | daddiu TMP3, TMP3, -8
1567 | mov_false TMP1
1568 | ld CRET1, 0(TMP3)
1569 | sd TMP3, L:RA->top // Remove error from coroutine stack.
1570 | li RD, (2+1)*8
1571 | sd TMP1, -8(BASE) // Prepend false to results.
1572 | daddiu RA, BASE, -8
1573 | sd CRET1, 0(BASE) // Copy error message.
1574 | b <7
1575 |. andi TMP0, PC, FRAME_TYPE
1576 |.else
1577 | load_got lj_ffh_coroutine_wrap_err
1578 | move CARG2, L:RA
1579 | call_intern lj_ffh_coroutine_wrap_err // (lua_State *L, lua_State *co)
1580 |. move CARG1, L
1581 |.endif
1582 |
1583 |9: // Handle stack expansion on return from yield.
1584 | load_got lj_state_growstack
1585 | srl CARG2, RD, 3
1586 | call_intern lj_state_growstack // (lua_State *L, int n)
1587 |. move CARG1, L
1588 | b <4
1589 |. li CRET1, 0
1590 |.endmacro
1591 |
1592 | coroutine_resume_wrap 1 // coroutine.resume
1593 | coroutine_resume_wrap 0 // coroutine.wrap
1594 |
1595 |.ffunc coroutine_yield
1596 | ld TMP0, L->cframe
1597 | daddu TMP1, BASE, NARGS8:RC
1598 | sd BASE, L->base
1599 | andi TMP0, TMP0, CFRAME_RESUME
1600 | sd TMP1, L->top
1601 | beqz TMP0, ->fff_fallback
1602 |. li CRET1, LUA_YIELD
1603 | sd r0, L->cframe
1604 | b ->vm_leave_unw
1605 |. sb CRET1, L->status
1606 |
1607 |//-- Math library -------------------------------------------------------
1608 |
1609 |.ffunc_1 math_abs
1610 | gettp CARG2, CARG1
1611 | daddiu AT, CARG2, -LJ_TISNUM
1612 | bnez AT, >1
1613 |. sextw TMP1, CARG1
1614 | sra TMP0, TMP1, 31 // Extract sign.
1615 | xor TMP1, TMP1, TMP0
1616 | dsubu CARG1, TMP1, TMP0
1617 | dsll TMP3, CARG1, 32
1618 | bgez TMP3, ->fff_restv
1619 |. settp CARG1, TISNUM
1620 | li CARG1, 0x41e0 // 2^31 as a double.
1621 | b ->fff_restv
1622 |. dsll CARG1, CARG1, 48
1623 |1:
1624 | sltiu AT, CARG2, LJ_TISNUM
1625 | beqz AT, ->fff_fallback
1626 |. dextm CARG1, CARG1, 0, 30
1627 |// fallthrough
1628 |
1629 |->fff_restv:
1630 | // CARG1 = TValue result.
1631 | ld PC, FRAME_PC(BASE)
1632 | daddiu RA, BASE, -16
1633 | sd CARG1, -16(BASE)
1634 |->fff_res1:
1635 | // RA = results, PC = return.
1636 | li RD, (1+1)*8
1637 |->fff_res:
1638 | // RA = results, RD = (nresults+1)*8, PC = return.
1639 | andi TMP0, PC, FRAME_TYPE
1640 | bnez TMP0, ->vm_return
1641 |. move MULTRES, RD
1642 | lw INS, -4(PC)
1643 | decode_RB8a RB, INS
1644 | decode_RB8b RB
1645 |5:
1646 | sltu AT, RD, RB
1647 | bnez AT, >6 // More results expected?
1648 |. decode_RA8a TMP0, INS
1649 | decode_RA8b TMP0
1650 | ins_next1
1651 | // Adjust BASE. KBASE is assumed to be set for the calling frame.
1652 | dsubu BASE, RA, TMP0
1653 | ins_next2
1654 |
1655 |6: // Fill up results with nil.
1656 | daddu TMP1, RA, RD
1657 | daddiu RD, RD, 8
1658 | b <5
1659 |. sd TISNIL, -8(TMP1)
1660 |
1661 |.macro math_extern, func
1662 | .ffunc_n math_ .. func
1663 | load_got func
1664 | call_extern
1665 |. nop
1666 | b ->fff_resn
1667 |. nop
1668 |.endmacro
1669 |
1670 |.macro math_extern2, func
1671 | .ffunc_nn math_ .. func
1672 |. load_got func
1673 | call_extern
1674 |. nop
1675 | b ->fff_resn
1676 |. nop
1677 |.endmacro
1678 |
1679 |// TODO: Return integer type if result is integer (own sf implementation).
1680 |.macro math_round, func
1681 |->ff_math_ .. func:
1682 | ld CARG1, 0(BASE)
1683 | beqz NARGS8:RC, ->fff_fallback
1684 |. gettp TMP0, CARG1
1685 | beq TMP0, TISNUM, ->fff_restv
1686 |. sltu AT, TMP0, TISNUM
1687 | beqz AT, ->fff_fallback
1688 |.if FPU
1689 |. ldc1 FARG1, 0(BASE)
1690 | bal ->vm_ .. func
1691 |. nop
1692 |.else
1693 |. load_got func
1694 | call_extern
1695 |. nop
1696 |.endif
1697 | b ->fff_resn
1698 |. nop
1699 |.endmacro
1700 |
1701 | math_round floor
1702 | math_round ceil
1703 |
1704 |.ffunc math_log
1705 | li AT, 8
1706 | bne NARGS8:RC, AT, ->fff_fallback // Exactly 1 argument.
1707 |. ld CARG1, 0(BASE)
1708 | checknum CARG1, ->fff_fallback
1709 |. load_got log
1710 |.if FPU
1711 | call_extern
1712 |. ldc1 FARG1, 0(BASE)
1713 |.else
1714 | call_extern
1715 |. nop
1716 |.endif
1717 | b ->fff_resn
1718 |. nop
1719 |
1720 | math_extern log10
1721 | math_extern exp
1722 | math_extern sin
1723 | math_extern cos
1724 | math_extern tan
1725 | math_extern asin
1726 | math_extern acos
1727 | math_extern atan
1728 | math_extern sinh
1729 | math_extern cosh
1730 | math_extern tanh
1731 | math_extern2 pow
1732 | math_extern2 atan2
1733 | math_extern2 fmod
1734 |
1735 |.if FPU
1736 |.ffunc_n math_sqrt
1737 |. sqrt.d FRET1, FARG1
1738 |// fallthrough to ->fff_resn
1739 |.else
1740 | math_extern sqrt
1741 |.endif
1742 |
1743 |->fff_resn:
1744 | ld PC, FRAME_PC(BASE)
1745 | daddiu RA, BASE, -16
1746 | b ->fff_res1
1747 |.if FPU
1748 |. sdc1 FRET1, 0(RA)
1749 |.else
1750 |. sd CRET1, 0(RA)
1751 |.endif
1752 |
1753 |
1754 |.ffunc_2 math_ldexp
1755 | checknum CARG1, ->fff_fallback
1756 | checkint CARG2, ->fff_fallback
1757 |. load_got ldexp
1758 | .FPU ldc1 FARG1, 0(BASE)
1759 | call_extern
1760 |. lw CARG2, 8+LO(BASE)
1761 | b ->fff_resn
1762 |. nop
1763 |
1764 |.ffunc_n math_frexp
1765 | load_got frexp
1766 | ld PC, FRAME_PC(BASE)
1767 | call_extern
1768 |. daddiu CARG2, DISPATCH, DISPATCH_GL(tmptv)
1769 | lw TMP1, DISPATCH_GL(tmptv)(DISPATCH)
1770 | daddiu RA, BASE, -16
1771 |.if FPU
1772 | mtc1 TMP1, FARG2
1773 | sdc1 FRET1, 0(RA)
1774 | cvt.d.w FARG2, FARG2
1775 | sdc1 FARG2, 8(RA)
1776 |.else
1777 | sd CRET1, 0(RA)
1778 | zextw TMP1, TMP1
1779 | settp TMP1, TISNUM
1780 | sd TMP1, 8(RA)
1781 |.endif
1782 | b ->fff_res
1783 |. li RD, (2+1)*8
1784 |
1785 |.ffunc_n math_modf
1786 | load_got modf
1787 | ld PC, FRAME_PC(BASE)
1788 | call_extern
1789 |. daddiu CARG2, BASE, -16
1790 | daddiu RA, BASE, -16
1791 |.if FPU
1792 | sdc1 FRET1, -8(BASE)
1793 |.else
1794 | sd CRET1, -8(BASE)
1795 |.endif
1796 | b ->fff_res
1797 |. li RD, (2+1)*8
1798 |
1799 |.macro math_minmax, name, intins, intinsc, fpins
1800 | .ffunc_1 name
1801 | daddu TMP3, BASE, NARGS8:RC
1802 | checkint CARG1, >5
1803 |. daddiu TMP2, BASE, 8
1804 |1: // Handle integers.
1805 | beq TMP2, TMP3, ->fff_restv
1806 |. ld CARG2, 0(TMP2)
1807 | checkint CARG2, >3
1808 |. sextw CARG1, CARG1
1809 | lw CARG2, LO(TMP2)
1810 |. slt AT, CARG1, CARG2
1811 |.if MIPSR6
1812 | intins TMP1, CARG2, AT
1813 | intinsc CARG1, CARG1, AT
1814 | or CARG1, CARG1, TMP1
1815 |.else
1816 | intins CARG1, CARG2, AT
1817 |.endif
1818 | daddiu TMP2, TMP2, 8
1819 | zextw CARG1, CARG1
1820 | b <1
1821 |. settp CARG1, TISNUM
1822 |
1823 |3: // Convert intermediate result to number and continue with number loop.
1824 | checknum CARG2, ->fff_fallback
1825 |.if FPU
1826 |. mtc1 CARG1, FRET1
1827 | cvt.d.w FRET1, FRET1
1828 | b >7
1829 |. ldc1 FARG1, 0(TMP2)
1830 |.else
1831 |. nop
1832 | bal ->vm_sfi2d_1
1833 |. nop
1834 | b >7
1835 |. nop
1836 |.endif
1837 |
1838 |5:
1839 | .FPU ldc1 FRET1, 0(BASE)
1840 | checknum CARG1, ->fff_fallback
1841 |6: // Handle numbers.
1842 |. ld CARG2, 0(TMP2)
1843 | beq TMP2, TMP3, ->fff_resn
1844 |.if FPU
1845 | ldc1 FARG1, 0(TMP2)
1846 |.else
1847 | move CRET1, CARG1
1848 |.endif
1849 | checknum CARG2, >8
1850 |. nop
1851 |7:
1852 |.if FPU
1853 |.if MIPSR6
1854 | fpins FRET1, FRET1, FARG1
1855 |.else
1856 |.if fpins // ismax
1857 | c.olt.d FARG1, FRET1
1858 |.else
1859 | c.olt.d FRET1, FARG1
1860 |.endif
1861 | movf.d FRET1, FARG1
1862 |.endif
1863 |.else
1864 |.if fpins // ismax
1865 | bal ->vm_sfcmpogt
1866 |.else
1867 | bal ->vm_sfcmpolt
1868 |.endif
1869 |. nop
1870 |.if MIPSR6
1871 | seleqz AT, CARG2, CRET1
1872 | selnez CARG1, CARG1, CRET1
1873 | or CARG1, CARG1, AT
1874 |.else
1875 | movz CARG1, CARG2, CRET1
1876 |.endif
1877 |.endif
1878 | b <6
1879 |. daddiu TMP2, TMP2, 8
1880 |
1881 |8: // Convert integer to number and continue with number loop.
1882 | checkint CARG2, ->fff_fallback
1883 |.if FPU
1884 |. lwc1 FARG1, LO(TMP2)
1885 | b <7
1886 |. cvt.d.w FARG1, FARG1
1887 |.else
1888 |. lw CARG2, LO(TMP2)
1889 | bal ->vm_sfi2d_2
1890 |. nop
1891 | b <7
1892 |. nop
1893 |.endif
1894 |
1895 |.endmacro
1896 |
1897 |.if MIPSR6
1898 | math_minmax math_min, seleqz, selnez, min.d
1899 | math_minmax math_max, selnez, seleqz, max.d
1900 |.else
1901 | math_minmax math_min, movz, _, 0
1902 | math_minmax math_max, movn, _, 1
1903 |.endif
1904 |
1905 |//-- String library -----------------------------------------------------
1906 |
1907 |.ffunc string_byte // Only handle the 1-arg case here.
1908 | ld CARG1, 0(BASE)
1909 | gettp TMP0, CARG1
1910 | xori AT, NARGS8:RC, 8
1911 | daddiu TMP0, TMP0, -LJ_TSTR
1912 | or AT, AT, TMP0
1913 | bnez AT, ->fff_fallback // Need exactly 1 string argument.
1914 |. cleartp STR:CARG1
1915 | lw TMP0, STR:CARG1->len
1916 | daddiu RA, BASE, -16
1917 | ld PC, FRAME_PC(BASE)
1918 | sltu RD, r0, TMP0
1919 | lbu TMP1, STR:CARG1[1] // Access is always ok (NUL at end).
1920 | addiu RD, RD, 1
1921 | sll RD, RD, 3 // RD = ((str->len != 0)+1)*8
1922 | settp TMP1, TISNUM
1923 | b ->fff_res
1924 |. sd TMP1, 0(RA)
1925 |
1926 |.ffunc string_char // Only handle the 1-arg case here.
1927 | ffgccheck
1928 |.if not MIPSR6
1929 |. nop
1930 |.endif
1931 | ld CARG1, 0(BASE)
1932 | gettp TMP0, CARG1
1933 | xori AT, NARGS8:RC, 8 // Exactly 1 argument.
1934 | daddiu TMP0, TMP0, -LJ_TISNUM // Integer.
1935 | li TMP1, 255
1936 | sextw CARG1, CARG1
1937 | or AT, AT, TMP0
1938 | sltu TMP1, TMP1, CARG1 // !(255 < n).
1939 | or AT, AT, TMP1
1940 | bnez AT, ->fff_fallback
1941 |. li CARG3, 1
1942 | daddiu CARG2, sp, TMPD_OFS
1943 | sb CARG1, TMPD
1944 |->fff_newstr:
1945 | load_got lj_str_new
1946 | sd BASE, L->base
1947 | sd PC, SAVE_PC
1948 | call_intern lj_str_new // (lua_State *L, char *str, size_t l)
1949 |. move CARG1, L
1950 | // Returns GCstr *.
1951 | ld BASE, L->base
1952 |->fff_resstr:
1953 | li AT, LJ_TSTR
1954 | settp CRET1, AT
1955 | b ->fff_restv
1956 |. move CARG1, CRET1
1957 |
1958 |.ffunc string_sub
1959 | ffgccheck
1960 |.if not MIPSR6
1961 |. nop
1962 |.endif
1963 | addiu AT, NARGS8:RC, -16
1964 | ld TMP0, 0(BASE)
1965 | bltz AT, ->fff_fallback
1966 |. gettp TMP3, TMP0
1967 | cleartp STR:CARG1, TMP0
1968 | ld CARG2, 8(BASE)
1969 | beqz AT, >1
1970 |. li CARG4, -1
1971 | ld CARG3, 16(BASE)
1972 | checkint CARG3, ->fff_fallback
1973 |. sextw CARG4, CARG3
1974 |1:
1975 | checkint CARG2, ->fff_fallback
1976 |. li AT, LJ_TSTR
1977 | bne TMP3, AT, ->fff_fallback
1978 |. sextw CARG3, CARG2
1979 | lw CARG2, STR:CARG1->len
1980 | // STR:CARG1 = str, CARG2 = str->len, CARG3 = start, CARG4 = end
1981 | slt AT, CARG4, r0
1982 | addiu TMP0, CARG2, 1
1983 | addu TMP1, CARG4, TMP0
1984 | slt TMP3, CARG3, r0
1985 |.if MIPSR6
1986 | seleqz CARG4, CARG4, AT
1987 | selnez TMP1, TMP1, AT
1988 | or CARG4, TMP1, CARG4 // if (end < 0) end += len+1
1989 |.else
1990 | movn CARG4, TMP1, AT // if (end < 0) end += len+1
1991 |.endif
1992 | addu TMP1, CARG3, TMP0
1993 |.if MIPSR6
1994 | selnez TMP1, TMP1, TMP3
1995 | seleqz CARG3, CARG3, TMP3
1996 | or CARG3, TMP1, CARG3 // if (start < 0) start += len+1
1997 | li TMP2, 1
1998 | slt AT, CARG4, r0
1999 | slt TMP3, r0, CARG3
2000 | seleqz CARG4, CARG4, AT // if (end < 0) end = 0
2001 | selnez CARG3, CARG3, TMP3
2002 | seleqz TMP2, TMP2, TMP3
2003 | or CARG3, TMP2, CARG3 // if (start < 1) start = 1
2004 | slt AT, CARG2, CARG4
2005 | seleqz CARG4, CARG4, AT
2006 | selnez CARG2, CARG2, AT
2007 | or CARG4, CARG2, CARG4 // if (end > len) end = len
2008 |.else
2009 | movn CARG3, TMP1, TMP3 // if (start < 0) start += len+1
2010 | li TMP2, 1
2011 | slt AT, CARG4, r0
2012 | slt TMP3, r0, CARG3
2013 | movn CARG4, r0, AT // if (end < 0) end = 0
2014 | movz CARG3, TMP2, TMP3 // if (start < 1) start = 1
2015 | slt AT, CARG2, CARG4
2016 | movn CARG4, CARG2, AT // if (end > len) end = len
2017 |.endif
2018 | daddu CARG2, STR:CARG1, CARG3
2019 | subu CARG3, CARG4, CARG3 // len = end - start
2020 | daddiu CARG2, CARG2, sizeof(GCstr)-1
2021 | bgez CARG3, ->fff_newstr
2022 |. addiu CARG3, CARG3, 1 // len++
2023 |->fff_emptystr: // Return empty string.
2024 | li AT, LJ_TSTR
2025 | daddiu STR:CARG1, DISPATCH, DISPATCH_GL(strempty)
2026 | b ->fff_restv
2027 |. settp CARG1, AT
2028 |
2029 |.macro ffstring_op, name
2030 | .ffunc string_ .. name
2031 | ffgccheck
2032 |. nop
2033 | beqz NARGS8:RC, ->fff_fallback
2034 |. ld CARG2, 0(BASE)
2035 | checkstr STR:CARG2, ->fff_fallback
2036 | daddiu SBUF:CARG1, DISPATCH, DISPATCH_GL(tmpbuf)
2037 | load_got lj_buf_putstr_ .. name
2038 | ld TMP0, SBUF:CARG1->b
2039 | sd L, SBUF:CARG1->L
2040 | sd BASE, L->base
2041 | sd TMP0, SBUF:CARG1->w
2042 | call_intern extern lj_buf_putstr_ .. name
2043 |. sd PC, SAVE_PC
2044 | load_got lj_buf_tostr
2045 | call_intern lj_buf_tostr
2046 |. move SBUF:CARG1, SBUF:CRET1
2047 | b ->fff_resstr
2048 |. ld BASE, L->base
2049 |.endmacro
2050 |
2051 |ffstring_op reverse
2052 |ffstring_op lower
2053 |ffstring_op upper
2054 |
2055 |//-- Bit library --------------------------------------------------------
2056 |
2057 |->vm_tobit_fb:
2058 | beqz TMP1, ->fff_fallback
2059 |.if FPU
2060 |. ldc1 FARG1, 0(BASE)
2061 | add.d FARG1, FARG1, TOBIT
2062 | mfc1 CRET1, FARG1
2063 | jr ra
2064 |. zextw CRET1, CRET1
2065 |.else
2066 |// FP number to bit conversion for soft-float.
2067 |->vm_tobit:
2068 | dsll TMP0, CARG1, 1
2069 | li CARG3, 1076
2070 | dsrl AT, TMP0, 53
2071 | dsubu CARG3, CARG3, AT
2072 | sltiu AT, CARG3, 54
2073 | beqz AT, >1
2074 |. dextm TMP0, TMP0, 0, 20
2075 | dinsu TMP0, AT, 21, 21
2076 | slt AT, CARG1, r0
2077 | dsrlv CRET1, TMP0, CARG3
2078 | dsubu TMP0, r0, CRET1
2079 |.if MIPSR6
2080 | selnez TMP0, TMP0, AT
2081 | seleqz CRET1, CRET1, AT
2082 | or CRET1, CRET1, TMP0
2083 |.else
2084 | movn CRET1, TMP0, AT
2085 |.endif
2086 | jr ra
2087 |. zextw CRET1, CRET1
2088 |1:
2089 | jr ra
2090 |. move CRET1, r0
2091 |
2092 |// FP number to int conversion with a check for soft-float.
2093 |// Modifies CARG1, CRET1, CRET2, TMP0, AT.
2094 |->vm_tointg:
2095 |.if JIT
2096 | dsll CRET2, CARG1, 1
2097 | beqz CRET2, >2
2098 |. li TMP0, 1076
2099 | dsrl AT, CRET2, 53
2100 | dsubu TMP0, TMP0, AT
2101 | sltiu AT, TMP0, 54
2102 | beqz AT, >1
2103 |. dextm CRET2, CRET2, 0, 20
2104 | dinsu CRET2, AT, 21, 21
2105 | slt AT, CARG1, r0
2106 | dsrlv CRET1, CRET2, TMP0
2107 | dsubu CARG1, r0, CRET1
2108 |.if MIPSR6
2109 | seleqz CRET1, CRET1, AT
2110 | selnez CARG1, CARG1, AT
2111 | or CRET1, CRET1, CARG1
2112 |.else
2113 | movn CRET1, CARG1, AT
2114 |.endif
2115 | li CARG1, 64
2116 | subu TMP0, CARG1, TMP0
2117 | dsllv CRET2, CRET2, TMP0 // Integer check.
2118 | sextw AT, CRET1
2119 | xor AT, CRET1, AT // Range check.
2120 |.if MIPSR6
2121 | seleqz AT, AT, CRET2
2122 | selnez CRET2, CRET2, CRET2
2123 | jr ra
2124 |. or CRET2, AT, CRET2
2125 |.else
2126 | jr ra
2127 |. movz CRET2, AT, CRET2
2128 |.endif
2129 |1:
2130 | jr ra
2131 |. li CRET2, 1
2132 |2:
2133 | jr ra
2134 |. move CRET1, r0
2135 |.endif
2136 |.endif
2137 |
2138 |.macro .ffunc_bit, name
2139 | .ffunc_1 bit_..name
2140 | gettp TMP0, CARG1
2141 | beq TMP0, TISNUM, >6
2142 |. zextw CRET1, CARG1
2143 | bal ->vm_tobit_fb
2144 |. sltiu TMP1, TMP0, LJ_TISNUM
2145 |6:
2146 |.endmacro
2147 |
2148 |.macro .ffunc_bit_op, name, bins
2149 | .ffunc_bit name
2150 | daddiu TMP2, BASE, 8
2151 | daddu TMP3, BASE, NARGS8:RC
2152 |1:
2153 | beq TMP2, TMP3, ->fff_resi
2154 |. ld CARG1, 0(TMP2)
2155 | gettp TMP0, CARG1
2156 |.if FPU
2157 | bne TMP0, TISNUM, >2
2158 |. daddiu TMP2, TMP2, 8
2159 | zextw CARG1, CARG1
2160 | b <1
2161 |. bins CRET1, CRET1, CARG1
2162 |2:
2163 | ldc1 FARG1, -8(TMP2)
2164 | sltiu AT, TMP0, LJ_TISNUM
2165 | beqz AT, ->fff_fallback
2166 |. add.d FARG1, FARG1, TOBIT
2167 | mfc1 CARG1, FARG1
2168 | zextw CARG1, CARG1
2169 | b <1
2170 |. bins CRET1, CRET1, CARG1
2171 |.else
2172 | beq TMP0, TISNUM, >2
2173 |. move CRET2, CRET1
2174 | bal ->vm_tobit_fb
2175 |. sltiu TMP1, TMP0, LJ_TISNUM
2176 | move CARG1, CRET2
2177 |2:
2178 | zextw CARG1, CARG1
2179 | bins CRET1, CRET1, CARG1
2180 | b <1
2181 |. daddiu TMP2, TMP2, 8
2182 |.endif
2183 |.endmacro
2184 |
2185 |.ffunc_bit_op band, and
2186 |.ffunc_bit_op bor, or
2187 |.ffunc_bit_op bxor, xor
2188 |
2189 |.ffunc_bit bswap
2190 | dsrl TMP0, CRET1, 8
2191 | dsrl TMP1, CRET1, 24
2192 | andi TMP2, TMP0, 0xff00
2193 | dins TMP1, CRET1, 24, 31
2194 | dins TMP2, TMP0, 16, 23
2195 | b ->fff_resi
2196 |. or CRET1, TMP1, TMP2
2197 |
2198 |.ffunc_bit bnot
2199 | not CRET1, CRET1
2200 | b ->fff_resi
2201 |. zextw CRET1, CRET1
2202 |
2203 |.macro .ffunc_bit_sh, name, shins, shmod
2204 | .ffunc_2 bit_..name
2205 | gettp TMP0, CARG1
2206 | beq TMP0, TISNUM, >1
2207 |. nop
2208 | bal ->vm_tobit_fb
2209 |. sltiu TMP1, TMP0, LJ_TISNUM
2210 | move CARG1, CRET1
2211 |1:
2212 | gettp TMP0, CARG2
2213 | bne TMP0, TISNUM, ->fff_fallback
2214 |. zextw CARG2, CARG2
2215 | sextw CARG1, CARG1
2216 |.if shmod == 1
2217 | negu CARG2, CARG2
2218 |.endif
2219 | shins CRET1, CARG1, CARG2
2220 | b ->fff_resi
2221 |. zextw CRET1, CRET1
2222 |.endmacro
2223 |
2224 |.ffunc_bit_sh lshift, sllv, 0
2225 |.ffunc_bit_sh rshift, srlv, 0
2226 |.ffunc_bit_sh arshift, srav, 0
2227 |.ffunc_bit_sh rol, rotrv, 1
2228 |.ffunc_bit_sh ror, rotrv, 0
2229 |
2230 |.ffunc_bit tobit
2231 |->fff_resi:
2232 | ld PC, FRAME_PC(BASE)
2233 | daddiu RA, BASE, -16
2234 | settp CRET1, TISNUM
2235 | b ->fff_res1
2236 |. sd CRET1, -16(BASE)
2237 |
2238 |//-----------------------------------------------------------------------
2239 |->fff_fallback: // Call fast function fallback handler.
2240 | // BASE = new base, RB = CFUNC, RC = nargs*8
2241 | ld TMP3, CFUNC:RB->f
2242 | daddu TMP1, BASE, NARGS8:RC
2243 | ld PC, FRAME_PC(BASE) // Fallback may overwrite PC.
2244 | daddiu TMP0, TMP1, 8*LUA_MINSTACK
2245 | ld TMP2, L->maxstack
2246 | sd PC, SAVE_PC // Redundant (but a defined value).
2247 | sltu AT, TMP2, TMP0
2248 | sd BASE, L->base
2249 | sd TMP1, L->top
2250 | bnez AT, >5 // Need to grow stack.
2251 |. move CFUNCADDR, TMP3
2252 | jalr TMP3 // (lua_State *L)
2253 |. move CARG1, L
2254 | // Either throws an error, or recovers and returns -1, 0 or nresults+1.
2255 | ld BASE, L->base
2256 | sll RD, CRET1, 3
2257 | bgtz CRET1, ->fff_res // Returned nresults+1?
2258 |. daddiu RA, BASE, -16
2259 |1: // Returned 0 or -1: retry fast path.
2260 | ld LFUNC:RB, FRAME_FUNC(BASE)
2261 | ld TMP0, L->top
2262 | cleartp LFUNC:RB
2263 | bnez CRET1, ->vm_call_tail // Returned -1?
2264 |. dsubu NARGS8:RC, TMP0, BASE
2265 | ins_callt // Returned 0: retry fast path.
2266 |
2267 |// Reconstruct previous base for vmeta_call during tailcall.
2268 |->vm_call_tail:
2269 | andi TMP0, PC, FRAME_TYPE
2270 | li AT, -4
2271 | bnez TMP0, >3
2272 |. and TMP1, PC, AT
2273 | lbu TMP1, OFS_RA(PC)
2274 | sll TMP1, TMP1, 3
2275 | addiu TMP1, TMP1, 16
2276 |3:
2277 | b ->vm_call_dispatch // Resolve again for tailcall.
2278 |. dsubu TMP2, BASE, TMP1
2279 |
2280 |5: // Grow stack for fallback handler.
2281 | load_got lj_state_growstack
2282 | li CARG2, LUA_MINSTACK
2283 | call_intern lj_state_growstack // (lua_State *L, int n)
2284 |. move CARG1, L
2285 | ld BASE, L->base
2286 | b <1
2287 |. li CRET1, 0 // Force retry.
2288 |
2289 |->fff_gcstep: // Call GC step function.
2290 | // BASE = new base, RC = nargs*8
2291 | move MULTRES, ra
2292 | load_got lj_gc_step
2293 | sd BASE, L->base
2294 | daddu TMP0, BASE, NARGS8:RC
2295 | sd PC, SAVE_PC // Redundant (but a defined value).
2296 | sd TMP0, L->top
2297 | call_intern lj_gc_step // (lua_State *L)
2298 |. move CARG1, L
2299 | ld BASE, L->base
2300 | move ra, MULTRES
2301 | ld TMP0, L->top
2302 | ld CFUNC:RB, FRAME_FUNC(BASE)
2303 | cleartp CFUNC:RB
2304 | jr ra
2305 |. dsubu NARGS8:RC, TMP0, BASE
2306 |
2307 |//-----------------------------------------------------------------------
2308 |//-- Special dispatch targets -------------------------------------------
2309 |//-----------------------------------------------------------------------
2310 |
2311 |->vm_record: // Dispatch target for recording phase.
2312 |.if JIT
2313 | lbu TMP3, DISPATCH_GL(hookmask)(DISPATCH)
2314 | andi AT, TMP3, HOOK_VMEVENT // No recording while in vmevent.
2315 | bnez AT, >5
2316 | // Decrement the hookcount for consistency, but always do the call.
2317 |. lw TMP2, DISPATCH_GL(hookcount)(DISPATCH)
2318 | andi AT, TMP3, HOOK_ACTIVE
2319 | bnez AT, >1
2320 |. addiu TMP2, TMP2, -1
2321 | andi AT, TMP3, LUA_MASKLINE|LUA_MASKCOUNT
2322 | beqz AT, >1
2323 |. nop
2324 | b >1
2325 |. sw TMP2, DISPATCH_GL(hookcount)(DISPATCH)
2326 |.endif
2327 |
2328 |->vm_rethook: // Dispatch target for return hooks.
2329 | lbu TMP3, DISPATCH_GL(hookmask)(DISPATCH)
2330 | andi AT, TMP3, HOOK_ACTIVE // Hook already active?
2331 | beqz AT, >1
2332 |5: // Re-dispatch to static ins.
2333 |. ld AT, GG_DISP2STATIC(TMP0) // Assumes TMP0 holds DISPATCH+OP*4.
2334 | jr AT
2335 |. nop
2336 |
2337 |->vm_inshook: // Dispatch target for instr/line hooks.
2338 | lbu TMP3, DISPATCH_GL(hookmask)(DISPATCH)
2339 | lw TMP2, DISPATCH_GL(hookcount)(DISPATCH)
2340 | andi AT, TMP3, HOOK_ACTIVE // Hook already active?
2341 | bnez AT, <5
2342 |. andi AT, TMP3, LUA_MASKLINE|LUA_MASKCOUNT
2343 | beqz AT, <5
2344 |. addiu TMP2, TMP2, -1
2345 | beqz TMP2, >1
2346 |. sw TMP2, DISPATCH_GL(hookcount)(DISPATCH)
2347 | andi AT, TMP3, LUA_MASKLINE
2348 | beqz AT, <5
2349 |1:
2350 |. load_got lj_dispatch_ins
2351 | sw MULTRES, SAVE_MULTRES
2352 | move CARG2, PC
2353 | sd BASE, L->base
2354 | // SAVE_PC must hold the _previous_ PC. The callee updates it with PC.
2355 | call_intern lj_dispatch_ins // (lua_State *L, const BCIns *pc)
2356 |. move CARG1, L
2357 |3:
2358 | ld BASE, L->base
2359 |4: // Re-dispatch to static ins.
2360 | lw INS, -4(PC)
2361 | decode_OP8a TMP1, INS
2362 | decode_OP8b TMP1
2363 | daddu TMP0, DISPATCH, TMP1
2364 | decode_RD8a RD, INS
2365 | ld AT, GG_DISP2STATIC(TMP0)
2366 | decode_RA8a RA, INS
2367 | decode_RD8b RD
2368 | jr AT
2369 | decode_RA8b RA
2370 |
2371 |->cont_hook: // Continue from hook yield.
2372 | daddiu PC, PC, 4
2373 | b <4
2374 |. lw MULTRES, -24+LO(RB) // Restore MULTRES for *M ins.
2375 |
2376 |->vm_hotloop: // Hot loop counter underflow.
2377 |.if JIT
2378 | ld LFUNC:TMP1, FRAME_FUNC(BASE)
2379 | daddiu CARG1, DISPATCH, GG_DISP2J
2380 | cleartp LFUNC:TMP1
2381 | sd PC, SAVE_PC
2382 | ld TMP1, LFUNC:TMP1->pc
2383 | move CARG2, PC
2384 | sd L, DISPATCH_J(L)(DISPATCH)
2385 | lbu TMP1, PC2PROTO(framesize)(TMP1)
2386 | load_got lj_trace_hot
2387 | sd BASE, L->base
2388 | dsll TMP1, TMP1, 3
2389 | daddu TMP1, BASE, TMP1
2390 | call_intern lj_trace_hot // (jit_State *J, const BCIns *pc)
2391 |. sd TMP1, L->top
2392 | b <3
2393 |. nop
2394 |.endif
2395 |
2396 |
2397 |->vm_callhook: // Dispatch target for call hooks.
2398 |.if JIT
2399 | b >1
2400 |.endif
2401 |. move CARG2, PC
2402 |
2403 |->vm_hotcall: // Hot call counter underflow.
2404 |.if JIT
2405 | ori CARG2, PC, 1
2406 |1:
2407 |.endif
2408 | load_got lj_dispatch_call
2409 | daddu TMP0, BASE, RC
2410 | sd PC, SAVE_PC
2411 | sd BASE, L->base
2412 | dsubu RA, RA, BASE
2413 | sd TMP0, L->top
2414 | call_intern lj_dispatch_call // (lua_State *L, const BCIns *pc)
2415 |. move CARG1, L
2416 | // Returns ASMFunction.
2417 | ld BASE, L->base
2418 | ld TMP0, L->top
2419 | sd r0, SAVE_PC // Invalidate for subsequent line hook.
2420 | dsubu NARGS8:RC, TMP0, BASE
2421 | daddu RA, BASE, RA
2422 | ld LFUNC:RB, FRAME_FUNC(BASE)
2423 | cleartp LFUNC:RB
2424 | jr CRET1
2425 |. lw INS, -4(PC)
2426 |
2427 |->cont_stitch: // Trace stitching.
2428 |.if JIT
2429 | // RA = resultptr, RB = meta base
2430 | lw INS, -4(PC)
2431 | ld TRACE:TMP2, -40(RB) // Save previous trace.
2432 | decode_RA8a RC, INS
2433 | daddiu AT, MULTRES, -8
2434 | cleartp TRACE:TMP2
2435 | decode_RA8b RC
2436 | beqz AT, >2
2437 |. daddu RC, BASE, RC // Call base.
2438 |1: // Move results down.
2439 | ld CARG1, 0(RA)
2440 | daddiu AT, AT, -8
2441 | daddiu RA, RA, 8
2442 | sd CARG1, 0(RC)
2443 | bnez AT, <1
2444 |. daddiu RC, RC, 8
2445 |2:
2446 | decode_RA8a RA, INS
2447 | decode_RB8a RB, INS
2448 | decode_RA8b RA
2449 | decode_RB8b RB
2450 | daddu RA, RA, RB
2451 | daddu RA, BASE, RA
2452 |3:
2453 | sltu AT, RC, RA
2454 | bnez AT, >9 // More results wanted?
2455 |. nop
2456 |
2457 | lhu TMP3, TRACE:TMP2->traceno
2458 | lhu RD, TRACE:TMP2->link
2459 | beq RD, TMP3, ->cont_nop // Blacklisted.
2460 |. load_got lj_dispatch_stitch
2461 | bnez RD, =>BC_JLOOP // Jump to stitched trace.
2462 |. sll RD, RD, 3
2463 |
2464 | // Stitch a new trace to the previous trace.
2465 | sw TMP3, DISPATCH_J(exitno)(DISPATCH)
2466 | sd L, DISPATCH_J(L)(DISPATCH)
2467 | sd BASE, L->base
2468 | daddiu CARG1, DISPATCH, GG_DISP2J
2469 | call_intern lj_dispatch_stitch // (jit_State *J, const BCIns *pc)
2470 |. move CARG2, PC
2471 | b ->cont_nop
2472 |. ld BASE, L->base
2473 |
2474 |9:
2475 | sd TISNIL, 0(RC)
2476 | b <3
2477 |. daddiu RC, RC, 8
2478 |.endif
2479 |
2480 |->vm_profhook: // Dispatch target for profiler hook.
2481 #if LJ_HASPROFILE
2482 | load_got lj_dispatch_profile
2483 | sw MULTRES, SAVE_MULTRES
2484 | move CARG2, PC
2485 | sd BASE, L->base
2486 | call_intern lj_dispatch_profile // (lua_State *L, const BCIns *pc)
2487 |. move CARG1, L
2488 | // HOOK_PROFILE is off again, so re-dispatch to dynamic instruction.
2489 | daddiu PC, PC, -4
2490 | b ->cont_nop
2491 |. ld BASE, L->base
2492 #endif
2493 |
2494 |//-----------------------------------------------------------------------
2495 |//-- Trace exit handler -------------------------------------------------
2496 |//-----------------------------------------------------------------------
2497 |
2498 |.macro savex_, a, b
2499 |.if FPU
2500 | sdc1 f..a, a*8(sp)
2501 | sdc1 f..b, b*8(sp)
2502 | sd r..a, 32*8+a*8(sp)
2503 | sd r..b, 32*8+b*8(sp)
2504 |.else
2505 | sd r..a, a*8(sp)
2506 | sd r..b, b*8(sp)
2507 |.endif
2508 |.endmacro
2509 |
2510 |->vm_exit_handler:
2511 |.if JIT
2512 |.if FPU
2513 | daddiu sp, sp, -(32*8+32*8)
2514 |.else
2515 | daddiu sp, sp, -(32*8)
2516 |.endif
2517 | savex_ 0, 1
2518 | savex_ 2, 3
2519 | savex_ 4, 5
2520 | savex_ 6, 7
2521 | savex_ 8, 9
2522 | savex_ 10, 11
2523 | savex_ 12, 13
2524 | savex_ 14, 15
2525 | savex_ 16, 17
2526 | savex_ 18, 19
2527 | savex_ 20, 21
2528 | savex_ 22, 23
2529 | savex_ 24, 25
2530 | savex_ 26, 27
2531 | savex_ 28, 30
2532 |.if FPU
2533 | sdc1 f29, 29*8(sp)
2534 | sdc1 f31, 31*8(sp)
2535 | sd r0, 32*8+31*8(sp) // Clear RID_TMP.
2536 | daddiu TMP2, sp, 32*8+32*8 // Recompute original value of sp.
2537 | sd TMP2, 32*8+29*8(sp) // Store sp in RID_SP
2538 |.else
2539 | sd r0, 31*8(sp) // Clear RID_TMP.
2540 | daddiu TMP2, sp, 32*8 // Recompute original value of sp.
2541 | sd TMP2, 29*8(sp) // Store sp in RID_SP
2542 |.endif
2543 | li_vmstate EXIT
2544 | daddiu DISPATCH, JGL, -GG_DISP2G-32768
2545 | lw TMP1, 0(TMP2) // Load exit number.
2546 | st_vmstate
2547 | ld L, DISPATCH_GL(cur_L)(DISPATCH)
2548 | ld BASE, DISPATCH_GL(jit_base)(DISPATCH)
2549 | load_got lj_trace_exit
2550 | sd L, DISPATCH_J(L)(DISPATCH)
2551 | sw ra, DISPATCH_J(parent)(DISPATCH) // Store trace number.
2552 | sd BASE, L->base
2553 | sw TMP1, DISPATCH_J(exitno)(DISPATCH) // Store exit number.
2554 | daddiu CARG1, DISPATCH, GG_DISP2J
2555 | sd r0, DISPATCH_GL(jit_base)(DISPATCH)
2556 | call_intern lj_trace_exit // (jit_State *J, ExitState *ex)
2557 |. move CARG2, sp
2558 | // Returns MULTRES (unscaled) or negated error code.
2559 | ld TMP1, L->cframe
2560 | li AT, -4
2561 | ld BASE, L->base
2562 | and sp, TMP1, AT
2563 | ld PC, SAVE_PC // Get SAVE_PC.
2564 | b >1
2565 |. sd L, SAVE_L // Set SAVE_L (on-trace resume/yield).
2566 |.endif
2567 |->vm_exit_interp:
2568 |.if JIT
2569 | // CRET1 = MULTRES or negated error code, BASE, PC and JGL set.
2570 | ld L, SAVE_L
2571 | daddiu DISPATCH, JGL, -GG_DISP2G-32768
2572 | sd BASE, L->base
2573 |1:
2574 | sltiu TMP0, CRET1, -LUA_ERRERR // Check for error from exit.
2575 | beqz TMP0, >9
2576 |. ld LFUNC:RB, FRAME_FUNC(BASE)
2577 | .FPU lui TMP3, 0x59c0 // TOBIT = 2^52 + 2^51 (float).
2578 | dsll MULTRES, CRET1, 3
2579 | cleartp LFUNC:RB
2580 | sw MULTRES, SAVE_MULTRES
2581 | li TISNIL, LJ_TNIL
2582 | li TISNUM, LJ_TISNUM // Setup type comparison constants.
2583 | .FPU mtc1 TMP3, TOBIT
2584 | ld TMP1, LFUNC:RB->pc
2585 | sd r0, DISPATCH_GL(jit_base)(DISPATCH)
2586 | ld KBASE, PC2PROTO(k)(TMP1)
2587 | .FPU cvt.d.s TOBIT, TOBIT
2588 | // Modified copy of ins_next which handles function header dispatch, too.
2589 | lw INS, 0(PC)
2590 | addiu CRET1, CRET1, 17 // Static dispatch?
2591 | // Assumes TISNIL == ~LJ_VMST_INTERP == -1
2592 | sw TISNIL, DISPATCH_GL(vmstate)(DISPATCH)
2593 | decode_RD8a RD, INS
2594 | beqz CRET1, >5
2595 |. daddiu PC, PC, 4
2596 | decode_OP8a TMP1, INS
2597 | decode_OP8b TMP1
2598 | daddu TMP0, DISPATCH, TMP1
2599 | sltiu TMP2, TMP1, BC_FUNCF*8
2600 | ld AT, 0(TMP0)
2601 | decode_RA8a RA, INS
2602 | beqz TMP2, >2
2603 |. decode_RA8b RA
2604 | jr AT
2605 |. decode_RD8b RD
2606 |2:
2607 | sltiu TMP2, TMP1, (BC_FUNCC+2)*8 // Fast function?
2608 | bnez TMP2, >3
2609 |. ld TMP1, FRAME_PC(BASE)
2610 | // Check frame below fast function.
2611 | andi TMP0, TMP1, FRAME_TYPE
2612 | bnez TMP0, >3 // Trace stitching continuation?
2613 |. nop
2614 | // Otherwise set KBASE for Lua function below fast function.
2615 | lw TMP2, -4(TMP1)
2616 | decode_RA8a TMP0, TMP2
2617 | decode_RA8b TMP0
2618 | dsubu TMP1, BASE, TMP0
2619 | ld LFUNC:TMP2, -32(TMP1)
2620 | cleartp LFUNC:TMP2
2621 | ld TMP1, LFUNC:TMP2->pc
2622 | ld KBASE, PC2PROTO(k)(TMP1)
2623 |3:
2624 | daddiu RC, MULTRES, -8
2625 | jr AT
2626 |. daddu RA, RA, BASE
2627 |
2628 |5: // Dispatch to static entry of original ins replaced by BC_JLOOP.
2629 | ld TMP0, DISPATCH_J(trace)(DISPATCH)
2630 | decode_RD8b RD
2631 | daddu TMP0, TMP0, RD
2632 | ld TRACE:TMP2, 0(TMP0)
2633 | lw INS, TRACE:TMP2->startins
2634 | decode_OP8a TMP1, INS
2635 | decode_OP8b TMP1
2636 | daddu TMP0, DISPATCH, TMP1
2637 | decode_RD8a RD, INS
2638 | ld AT, GG_DISP2STATIC(TMP0)
2639 | decode_RA8a RA, INS
2640 | decode_RD8b RD
2641 | jr AT
2642 |. decode_RA8b RA
2643 |
2644 |9: // Rethrow error from the right C frame.
2645 | load_got lj_err_trace
2646 | sub CARG2, r0, CRET1
2647 | call_intern lj_err_trace // (lua_State *L, int errcode)
2648 |. move CARG1, L
2649 |.endif
2650 |
2651 |//-----------------------------------------------------------------------
2652 |//-- Math helper functions ----------------------------------------------
2653 |//-----------------------------------------------------------------------
2654 |
2655 |// Hard-float round to integer.
2656 |// Modifies AT, TMP0, FRET1, FRET2, f4. Keeps all others incl. FARG1.
2657 |// MIPSR6: Modifies FTMP1, too.
2658 |.macro vm_round_hf, func
2659 | lui TMP0, 0x4330 // Hiword of 2^52 (double).
2660 | dsll TMP0, TMP0, 32
2661 | dmtc1 TMP0, f4
2662 | abs.d FRET2, FARG1 // |x|
2663 | dmfc1 AT, FARG1
2664 |.if MIPSR6
2665 | cmp.lt.d FTMP1, FRET2, f4
2666 | add.d FRET1, FRET2, f4 // (|x| + 2^52) - 2^52
2667 | bc1eqz FTMP1, >1 // Truncate only if |x| < 2^52.
2668 |.else
2669 | c.olt.d 0, FRET2, f4
2670 | add.d FRET1, FRET2, f4 // (|x| + 2^52) - 2^52
2671 | bc1f 0, >1 // Truncate only if |x| < 2^52.
2672 |.endif
2673 |. sub.d FRET1, FRET1, f4
2674 | slt AT, AT, r0
2675 |.if "func" == "ceil"
2676 | lui TMP0, 0xbff0 // Hiword of -1 (double). Preserves -0.
2677 |.else
2678 | lui TMP0, 0x3ff0 // Hiword of +1 (double).
2679 |.endif
2680 |.if "func" == "trunc"
2681 | dsll TMP0, TMP0, 32
2682 | dmtc1 TMP0, f4
2683 |.if MIPSR6
2684 | cmp.lt.d FTMP1, FRET2, FRET1 // |x| < result?
2685 | sub.d FRET2, FRET1, f4
2686 | sel.d FTMP1, FRET1, FRET2 // If yes, subtract +1.
2687 | dmtc1 AT, FRET1
2688 | neg.d FRET2, FTMP1
2689 | jr ra
2690 |. sel.d FRET1, FTMP1, FRET2 // Merge sign bit back in.
2691 |.else
2692 | c.olt.d 0, FRET2, FRET1 // |x| < result?
2693 | sub.d FRET2, FRET1, f4
2694 | movt.d FRET1, FRET2, 0 // If yes, subtract +1.
2695 | neg.d FRET2, FRET1
2696 | jr ra
2697 |. movn.d FRET1, FRET2, AT // Merge sign bit back in.
2698 |.endif
2699 |.else
2700 | neg.d FRET2, FRET1
2701 | dsll TMP0, TMP0, 32
2702 | dmtc1 TMP0, f4
2703 |.if MIPSR6
2704 | dmtc1 AT, FTMP1
2705 | sel.d FTMP1, FRET1, FRET2
2706 |.if "func" == "ceil"
2707 | cmp.lt.d FRET1, FTMP1, FARG1 // x > result?
2708 |.else
2709 | cmp.lt.d FRET1, FARG1, FTMP1 // x < result?
2710 |.endif
2711 | sub.d FRET2, FTMP1, f4 // If yes, subtract +-1.
2712 | jr ra
2713 |. sel.d FRET1, FTMP1, FRET2
2714 |.else
2715 | movn.d FRET1, FRET2, AT // Merge sign bit back in.
2716 |.if "func" == "ceil"
2717 | c.olt.d 0, FRET1, FARG1 // x > result?
2718 |.else
2719 | c.olt.d 0, FARG1, FRET1 // x < result?
2720 |.endif
2721 | sub.d FRET2, FRET1, f4 // If yes, subtract +-1.
2722 | jr ra
2723 |. movt.d FRET1, FRET2, 0
2724 |.endif
2725 |.endif
2726 |1:
2727 | jr ra
2728 |. mov.d FRET1, FARG1
2729 |.endmacro
2730 |
2731 |.macro vm_round, func
2732 |.if FPU
2733 | vm_round_hf, func
2734 |.endif
2735 |.endmacro
2736 |
2737 |->vm_floor:
2738 | vm_round floor
2739 |->vm_ceil:
2740 | vm_round ceil
2741 |->vm_trunc:
2742 |.if JIT
2743 | vm_round trunc
2744 |.endif
2745 |
2746 |// Soft-float integer to number conversion.
2747 |.macro sfi2d, ARG
2748 |.if not FPU
2749 | beqz ARG, >9 // Handle zero first.
2750 |. sra TMP0, ARG, 31
2751 | xor TMP1, ARG, TMP0
2752 | dsubu TMP1, TMP1, TMP0 // Absolute value in TMP1.
2753 | dclz ARG, TMP1
2754 | addiu ARG, ARG, -11
2755 | li AT, 0x3ff+63-11-1
2756 | dsllv TMP1, TMP1, ARG // Align mantissa left with leading 1.
2757 | subu ARG, AT, ARG // Exponent - 1.
2758 | ins ARG, TMP0, 11, 11 // Sign | Exponent.
2759 | dsll ARG, ARG, 52 // Align left.
2760 | jr ra
2761 |. daddu ARG, ARG, TMP1 // Add mantissa, increment exponent.
2762 |9:
2763 | jr ra
2764 |. nop
2765 |.endif
2766 |.endmacro
2767 |
2768 |// Input CARG1. Output: CARG1. Temporaries: AT, TMP0, TMP1.
2769 |->vm_sfi2d_1:
2770 | sfi2d CARG1
2771 |
2772 |// Input CARG2. Output: CARG2. Temporaries: AT, TMP0, TMP1.
2773 |->vm_sfi2d_2:
2774 | sfi2d CARG2
2775 |
2776 |// Soft-float comparison. Equivalent to c.eq.d.
2777 |// Input: CARG*. Output: CRET1. Temporaries: AT, TMP0, TMP1.
2778 |->vm_sfcmpeq:
2779 |.if not FPU
2780 | dsll AT, CARG1, 1
2781 | dsll TMP0, CARG2, 1
2782 | or TMP1, AT, TMP0
2783 | beqz TMP1, >8 // Both args +-0: return 1.
2784 |. lui TMP1, 0xffe0
2785 | dsll TMP1, TMP1, 32
2786 | sltu AT, TMP1, AT
2787 | sltu TMP0, TMP1, TMP0
2788 | or TMP1, AT, TMP0
2789 | bnez TMP1, >9 // Either arg is NaN: return 0;
2790 |. xor AT, CARG1, CARG2
2791 | jr ra
2792 |. sltiu CRET1, AT, 1 // Same values: return 1.
2793 |8:
2794 | jr ra
2795 |. li CRET1, 1
2796 |9:
2797 | jr ra
2798 |. li CRET1, 0
2799 |.endif
2800 |
2801 |// Soft-float comparison. Equivalent to c.ult.d and c.olt.d.
2802 |// Input: CARG1, CARG2. Output: CRET1. Temporaries: AT, TMP0, TMP1, CRET2.
2803 |->vm_sfcmpult:
2804 |.if not FPU
2805 | b >1
2806 |. li CRET2, 1
2807 |.endif
2808 |
2809 |->vm_sfcmpolt:
2810 |.if not FPU
2811 | li CRET2, 0
2812 |1:
2813 | dsll AT, CARG1, 1
2814 | dsll TMP0, CARG2, 1
2815 | or TMP1, AT, TMP0
2816 | beqz TMP1, >8 // Both args +-0: return 0.
2817 |. lui TMP1, 0xffe0
2818 | dsll TMP1, TMP1, 32
2819 | sltu AT, TMP1, AT
2820 | sltu TMP0, TMP1, TMP0
2821 | or TMP1, AT, TMP0
2822 | bnez TMP1, >9 // Either arg is NaN: return 0 or 1;
2823 |. and AT, CARG1, CARG2
2824 | bltz AT, >5 // Both args negative?
2825 |. nop
2826 | jr ra
2827 |. slt CRET1, CARG1, CARG2
2828 |5: // Swap conditions if both operands are negative.
2829 | jr ra
2830 |. slt CRET1, CARG2, CARG1
2831 |8:
2832 | jr ra
2833 |. li CRET1, 0
2834 |9:
2835 | jr ra
2836 |. move CRET1, CRET2
2837 |.endif
2838 |
2839 |->vm_sfcmpogt:
2840 |.if not FPU
2841 | dsll AT, CARG2, 1
2842 | dsll TMP0, CARG1, 1
2843 | or TMP1, AT, TMP0
2844 | beqz TMP1, >8 // Both args +-0: return 0.
2845 |. lui TMP1, 0xffe0
2846 | dsll TMP1, TMP1, 32
2847 | sltu AT, TMP1, AT
2848 | sltu TMP0, TMP1, TMP0
2849 | or TMP1, AT, TMP0
2850 | bnez TMP1, >9 // Either arg is NaN: return 0 or 1;
2851 |. and AT, CARG2, CARG1
2852 | bltz AT, >5 // Both args negative?
2853 |. nop
2854 | jr ra
2855 |. slt CRET1, CARG2, CARG1
2856 |5: // Swap conditions if both operands are negative.
2857 | jr ra
2858 |. slt CRET1, CARG1, CARG2
2859 |8:
2860 | jr ra
2861 |. li CRET1, 0
2862 |9:
2863 | jr ra
2864 |. li CRET1, 0
2865 |.endif
2866 |
2867 |// Soft-float comparison. Equivalent to c.ole.d a, b or c.ole.d b, a.
2868 |// Input: CARG1, CARG2, TMP3. Output: CRET1. Temporaries: AT, TMP0, TMP1.
2869 |->vm_sfcmpolex:
2870 |.if not FPU
2871 | dsll AT, CARG1, 1
2872 | dsll TMP0, CARG2, 1
2873 | or TMP1, AT, TMP0
2874 | beqz TMP1, >8 // Both args +-0: return 1.
2875 |. lui TMP1, 0xffe0
2876 | dsll TMP1, TMP1, 32
2877 | sltu AT, TMP1, AT
2878 | sltu TMP0, TMP1, TMP0
2879 | or TMP1, AT, TMP0
2880 | bnez TMP1, >9 // Either arg is NaN: return 0;
2881 |. and AT, CARG1, CARG2
2882 | xor AT, AT, TMP3
2883 | bltz AT, >5 // Both args negative?
2884 |. nop
2885 | jr ra
2886 |. slt CRET1, CARG2, CARG1
2887 |5: // Swap conditions if both operands are negative.
2888 | jr ra
2889 |. slt CRET1, CARG1, CARG2
2890 |8:
2891 | jr ra
2892 |. li CRET1, 1
2893 |9:
2894 | jr ra
2895 |. li CRET1, 0
2896 |.endif
2897 |
2898 |.macro sfmin_max, name, fpcall
2899 |->vm_sf .. name:
2900 |.if JIT and not FPU
2901 | move TMP2, ra
2902 | bal ->fpcall
2903 |. nop
2904 | move ra, TMP2
2905 | move TMP0, CRET1
2906 | move CRET1, CARG1
2907 |.if MIPSR6
2908 | selnez CRET1, CRET1, TMP0
2909 | seleqz TMP0, CARG2, TMP0
2910 | jr ra
2911 |. or CRET1, CRET1, TMP0
2912 |.else
2913 | jr ra
2914 |. movz CRET1, CARG2, TMP0
2915 |.endif
2916 |.endif
2917 |.endmacro
2918 |
2919 | sfmin_max min, vm_sfcmpolt
2920 | sfmin_max max, vm_sfcmpogt
2921 |
2922 |//-----------------------------------------------------------------------
2923 |//-- Miscellaneous functions --------------------------------------------
2924 |//-----------------------------------------------------------------------
2925 |
2926 |.define NEXT_TAB, TAB:CARG1
2927 |.define NEXT_IDX, CARG2
2928 |.define NEXT_ASIZE, CARG3
2929 |.define NEXT_NIL, CARG4
2930 |.define NEXT_TMP0, r12
2931 |.define NEXT_TMP1, r13
2932 |.define NEXT_TMP2, r14
2933 |.define NEXT_RES_VK, CRET1
2934 |.define NEXT_RES_IDX, CRET2
2935 |.define NEXT_RES_PTR, sp
2936 |.define NEXT_RES_VAL, 0(sp)
2937 |.define NEXT_RES_KEY, 8(sp)
2938 |
2939 |// TValue *lj_vm_next(GCtab *t, uint32_t idx)
2940 |// Next idx returned in CRET2.
2941 |->vm_next:
2942 |.if JIT and ENDIAN_LE
2943 | lw NEXT_ASIZE, NEXT_TAB->asize
2944 | ld NEXT_TMP0, NEXT_TAB->array
2945 | li NEXT_NIL, LJ_TNIL
2946 |1: // Traverse array part.
2947 | sltu AT, NEXT_IDX, NEXT_ASIZE
2948 | sll NEXT_TMP1, NEXT_IDX, 3
2949 | beqz AT, >5
2950 |. daddu NEXT_TMP1, NEXT_TMP0, NEXT_TMP1
2951 | li AT, LJ_TISNUM
2952 | ld NEXT_TMP2, 0(NEXT_TMP1)
2953 | dsll AT, AT, 47
2954 | or NEXT_TMP1, NEXT_IDX, AT
2955 | beq NEXT_TMP2, NEXT_NIL, <1
2956 |. addiu NEXT_IDX, NEXT_IDX, 1
2957 | sd NEXT_TMP2, NEXT_RES_VAL
2958 | sd NEXT_TMP1, NEXT_RES_KEY
2959 | move NEXT_RES_VK, NEXT_RES_PTR
2960 | jr ra
2961 |. move NEXT_RES_IDX, NEXT_IDX
2962 |
2963 |5: // Traverse hash part.
2964 | subu NEXT_RES_IDX, NEXT_IDX, NEXT_ASIZE
2965 | ld NODE:NEXT_RES_VK, NEXT_TAB->node
2966 | sll NEXT_TMP2, NEXT_RES_IDX, 5
2967 | lw NEXT_TMP0, NEXT_TAB->hmask
2968 | sll AT, NEXT_RES_IDX, 3
2969 | subu AT, NEXT_TMP2, AT
2970 | daddu NODE:NEXT_RES_VK, NODE:NEXT_RES_VK, AT
2971 |6:
2972 | sltu AT, NEXT_TMP0, NEXT_RES_IDX
2973 | bnez AT, >8
2974 |. nop
2975 | ld NEXT_TMP2, NODE:NEXT_RES_VK->val
2976 | bne NEXT_TMP2, NEXT_NIL, >9
2977 |. addiu NEXT_RES_IDX, NEXT_RES_IDX, 1
2978 | // Skip holes in hash part.
2979 | b <6
2980 |. daddiu NODE:NEXT_RES_VK, NODE:NEXT_RES_VK, sizeof(Node)
2981 |
2982 |8: // End of iteration. Set the key to nil (not the value).
2983 | sd NEXT_NIL, NEXT_RES_KEY
2984 | move NEXT_RES_VK, NEXT_RES_PTR
2985 |9:
2986 | jr ra
2987 |. addu NEXT_RES_IDX, NEXT_RES_IDX, NEXT_ASIZE
2988 |.endif
2989 |
2990 |//-----------------------------------------------------------------------
2991 |//-- FFI helper functions -----------------------------------------------
2992 |//-----------------------------------------------------------------------
2993 |
2994 |// Handler for callback functions. Callback slot number in r1, g in r2.
2995 |->vm_ffi_callback:
2996 |.if FFI
2997 |.type CTSTATE, CTState, PC
2998 | saveregs
2999 | ld CTSTATE, GL:r2->ctype_state
3000 | daddiu DISPATCH, r2, GG_G2DISP
3001 | load_got lj_ccallback_enter
3002 | sw r1, CTSTATE->cb.slot
3003 | sd CARG1, CTSTATE->cb.gpr[0]
3004 | .FPU sdc1 FARG1, CTSTATE->cb.fpr[0]
3005 | sd CARG2, CTSTATE->cb.gpr[1]
3006 | .FPU sdc1 FARG2, CTSTATE->cb.fpr[1]
3007 | sd CARG3, CTSTATE->cb.gpr[2]
3008 | .FPU sdc1 FARG3, CTSTATE->cb.fpr[2]
3009 | sd CARG4, CTSTATE->cb.gpr[3]
3010 | .FPU sdc1 FARG4, CTSTATE->cb.fpr[3]
3011 | sd CARG5, CTSTATE->cb.gpr[4]
3012 | .FPU sdc1 FARG5, CTSTATE->cb.fpr[4]
3013 | sd CARG6, CTSTATE->cb.gpr[5]
3014 | .FPU sdc1 FARG6, CTSTATE->cb.fpr[5]
3015 | sd CARG7, CTSTATE->cb.gpr[6]
3016 | .FPU sdc1 FARG7, CTSTATE->cb.fpr[6]
3017 | sd CARG8, CTSTATE->cb.gpr[7]
3018 | .FPU sdc1 FARG8, CTSTATE->cb.fpr[7]
3019 | daddiu TMP0, sp, CFRAME_SPACE
3020 | sd TMP0, CTSTATE->cb.stack
3021 | sd r0, SAVE_PC // Any value outside of bytecode is ok.
3022 | move CARG2, sp
3023 | call_intern lj_ccallback_enter // (CTState *cts, void *cf)
3024 |. move CARG1, CTSTATE
3025 | // Returns lua_State *.
3026 | ld BASE, L:CRET1->base
3027 | ld RC, L:CRET1->top
3028 | move L, CRET1
3029 | .FPU lui TMP3, 0x59c0 // TOBIT = 2^52 + 2^51 (float).
3030 | ld LFUNC:RB, FRAME_FUNC(BASE)
3031 | .FPU mtc1 TMP3, TOBIT
3032 | li TISNIL, LJ_TNIL
3033 | li TISNUM, LJ_TISNUM
3034 | li_vmstate INTERP
3035 | subu RC, RC, BASE
3036 | cleartp LFUNC:RB
3037 | st_vmstate
3038 | .FPU cvt.d.s TOBIT, TOBIT
3039 | ins_callt
3040 |.endif
3041 |
3042 |->cont_ffi_callback: // Return from FFI callback.
3043 |.if FFI
3044 | load_got lj_ccallback_leave
3045 | ld CTSTATE, DISPATCH_GL(ctype_state)(DISPATCH)
3046 | sd BASE, L->base
3047 | sd RB, L->top
3048 | sd L, CTSTATE->L
3049 | move CARG2, RA
3050 | call_intern lj_ccallback_leave // (CTState *cts, TValue *o)
3051 |. move CARG1, CTSTATE
3052 | .FPU ldc1 FRET1, CTSTATE->cb.fpr[0]
3053 | ld CRET1, CTSTATE->cb.gpr[0]
3054 | .FPU ldc1 FRET2, CTSTATE->cb.fpr[1]
3055 | b ->vm_leave_unw
3056 |. ld CRET2, CTSTATE->cb.gpr[1]
3057 |.endif
3058 |
3059 |->vm_ffi_call: // Call C function via FFI.
3060 | // Caveat: needs special frame unwinding, see below.
3061 |.if FFI
3062 | .type CCSTATE, CCallState, CARG1
3063 | lw TMP1, CCSTATE->spadj
3064 | lbu CARG2, CCSTATE->nsp
3065 | move TMP2, sp
3066 | dsubu sp, sp, TMP1
3067 | sd ra, -8(TMP2)
3068 | sll CARG2, CARG2, 3
3069 | sd r16, -16(TMP2)
3070 | sd CCSTATE, -24(TMP2)
3071 | move r16, TMP2
3072 | daddiu TMP1, CCSTATE, offsetof(CCallState, stack)
3073 | move TMP2, sp
3074 | beqz CARG2, >2
3075 |. daddu TMP3, TMP1, CARG2
3076 |1:
3077 | ld TMP0, 0(TMP1)
3078 | daddiu TMP1, TMP1, 8
3079 | sltu AT, TMP1, TMP3
3080 | sd TMP0, 0(TMP2)
3081 | bnez AT, <1
3082 |. daddiu TMP2, TMP2, 8
3083 |2:
3084 | ld CFUNCADDR, CCSTATE->func
3085 | .FPU ldc1 FARG1, CCSTATE->gpr[0]
3086 | ld CARG2, CCSTATE->gpr[1]
3087 | .FPU ldc1 FARG2, CCSTATE->gpr[1]
3088 | ld CARG3, CCSTATE->gpr[2]
3089 | .FPU ldc1 FARG3, CCSTATE->gpr[2]
3090 | ld CARG4, CCSTATE->gpr[3]
3091 | .FPU ldc1 FARG4, CCSTATE->gpr[3]
3092 | ld CARG5, CCSTATE->gpr[4]
3093 | .FPU ldc1 FARG5, CCSTATE->gpr[4]
3094 | ld CARG6, CCSTATE->gpr[5]
3095 | .FPU ldc1 FARG6, CCSTATE->gpr[5]
3096 | ld CARG7, CCSTATE->gpr[6]
3097 | .FPU ldc1 FARG7, CCSTATE->gpr[6]
3098 | ld CARG8, CCSTATE->gpr[7]
3099 | .FPU ldc1 FARG8, CCSTATE->gpr[7]
3100 | jalr CFUNCADDR
3101 |. ld CARG1, CCSTATE->gpr[0] // Do this last, since CCSTATE is CARG1.
3102 | ld CCSTATE:TMP1, -24(r16)
3103 | ld TMP2, -16(r16)
3104 | ld ra, -8(r16)
3105 | sd CRET1, CCSTATE:TMP1->gpr[0]
3106 | sd CRET2, CCSTATE:TMP1->gpr[1]
3107 |.if FPU
3108 | sdc1 FRET1, CCSTATE:TMP1->fpr[0]
3109 | sdc1 FRET2, CCSTATE:TMP1->fpr[1]
3110 |.else
3111 | sd CARG1, CCSTATE:TMP1->gpr[2] // 2nd FP struct field for soft-float.
3112 |.endif
3113 | move sp, r16
3114 | jr ra
3115 |. move r16, TMP2
3116 |.endif
3117 |// Note: vm_ffi_call must be the last function in this object file!
3118 |
3119 |//-----------------------------------------------------------------------
3120 }
3121
3122 /* Generate the code for a single instruction. */
3123 static void build_ins(BuildCtx *ctx, BCOp op, int defop)
3124 {
3125 int vk = 0;
3126 |=>defop:
3127
3128 switch (op) {
3129
3130 /* -- Comparison ops ---------------------------------------------------- */
3131
3132 /* Remember: all ops branch for a true comparison, fall through otherwise. */
3133
3134 case BC_ISLT: case BC_ISGE: case BC_ISLE: case BC_ISGT:
3135 | // RA = src1*8, RD = src2*8, JMP with RD = target
3136 |.macro bc_comp, FRA, FRD, ARGRA, ARGRD, movop, fmovop, fcomp, sfcomp
3137 | daddu RA, BASE, RA
3138 | daddu RD, BASE, RD
3139 | ld ARGRA, 0(RA)
3140 | ld ARGRD, 0(RD)
3141 | lhu TMP2, OFS_RD(PC)
3142 | gettp CARG3, ARGRA
3143 | gettp CARG4, ARGRD
3144 | bne CARG3, TISNUM, >2
3145 |. daddiu PC, PC, 4
3146 | bne CARG4, TISNUM, >5
3147 |. decode_RD4b TMP2
3148 | sextw ARGRA, ARGRA
3149 | sextw ARGRD, ARGRD
3150 | lui TMP3, (-(BCBIAS_J*4 >> 16) & 65535)
3151 | slt AT, CARG1, CARG2
3152 | addu TMP2, TMP2, TMP3
3153 |.if MIPSR6
3154 | movop TMP2, TMP2, AT
3155 |.else
3156 | movop TMP2, r0, AT
3157 |.endif
3158 |1:
3159 | daddu PC, PC, TMP2
3160 | ins_next
3161 |
3162 |2: // RA is not an integer.
3163 | sltiu AT, CARG3, LJ_TISNUM
3164 | beqz AT, ->vmeta_comp
3165 |. lui TMP3, (-(BCBIAS_J*4 >> 16) & 65535)
3166 | sltiu AT, CARG4, LJ_TISNUM
3167 | beqz AT, >4
3168 |. decode_RD4b TMP2
3169 |.if FPU
3170 | ldc1 FRA, 0(RA)
3171 | ldc1 FRD, 0(RD)
3172 |.endif
3173 |3: // RA and RD are both numbers.
3174 |.if FPU
3175 |.if MIPSR6
3176 | fcomp FTMP0, FTMP0, FTMP2
3177 | addu TMP2, TMP2, TMP3
3178 | mfc1 TMP3, FTMP0
3179 | b <1
3180 |. fmovop TMP2, TMP2, TMP3
3181 |.else
3182 | fcomp FTMP0, FTMP2
3183 | addu TMP2, TMP2, TMP3
3184 | b <1
3185 |. fmovop TMP2, r0
3186 |.endif
3187 |.else
3188 | bal sfcomp
3189 |. addu TMP2, TMP2, TMP3
3190 | b <1
3191 |.if MIPSR6
3192 |. movop TMP2, TMP2, CRET1
3193 |.else
3194 |. movop TMP2, r0, CRET1
3195 |.endif
3196 |.endif
3197 |
3198 |4: // RA is a number, RD is not a number.
3199 | bne CARG4, TISNUM, ->vmeta_comp
3200 | // RA is a number, RD is an integer. Convert RD to a number.
3201 |.if FPU
3202 |. lwc1 FRD, LO(RD)
3203 | ldc1 FRA, 0(RA)
3204 | b <3
3205 |. cvt.d.w FRD, FRD
3206 |.else
3207 |.if "ARGRD" == "CARG1"
3208 |. sextw CARG1, CARG1
3209 | bal ->vm_sfi2d_1
3210 |. nop
3211 |.else
3212 |. sextw CARG2, CARG2
3213 | bal ->vm_sfi2d_2
3214 |. nop
3215 |.endif
3216 | b <3
3217 |. nop
3218 |.endif
3219 |
3220 |5: // RA is an integer, RD is not an integer
3221 | sltiu AT, CARG4, LJ_TISNUM
3222 | beqz AT, ->vmeta_comp
3223 |. lui TMP3, (-(BCBIAS_J*4 >> 16) & 65535)
3224 | // RA is an integer, RD is a number. Convert RA to a number.
3225 |.if FPU
3226 | lwc1 FRA, LO(RA)
3227 | ldc1 FRD, 0(RD)
3228 | b <3
3229 | cvt.d.w FRA, FRA
3230 |.else
3231 |.if "ARGRA" == "CARG1"
3232 | bal ->vm_sfi2d_1
3233 |. sextw CARG1, CARG1
3234 |.else
3235 | bal ->vm_sfi2d_2
3236 |. sextw CARG2, CARG2
3237 |.endif
3238 | b <3
3239 |. nop
3240 |.endif
3241 |.endmacro
3242 |
3243 |.if MIPSR6
3244 if (op == BC_ISLT) {
3245 | bc_comp FTMP0, FTMP2, CARG1, CARG2, selnez, selnez, cmp.lt.d, ->vm_sfcmpolt
3246 } else if (op == BC_ISGE) {
3247 | bc_comp FTMP0, FTMP2, CARG1, CARG2, seleqz, seleqz, cmp.lt.d, ->vm_sfcmpolt
3248 } else if (op == BC_ISLE) {
3249 | bc_comp FTMP2, FTMP0, CARG2, CARG1, seleqz, seleqz, cmp.ult.d, ->vm_sfcmpult
3250 } else {
3251 | bc_comp FTMP2, FTMP0, CARG2, CARG1, selnez, selnez, cmp.ult.d, ->vm_sfcmpult
3252 }
3253 |.else
3254 if (op == BC_ISLT) {
3255 | bc_comp FTMP0, FTMP2, CARG1, CARG2, movz, movf, c.olt.d, ->vm_sfcmpolt
3256 } else if (op == BC_ISGE) {
3257 | bc_comp FTMP0, FTMP2, CARG1, CARG2, movn, movt, c.olt.d, ->vm_sfcmpolt
3258 } else if (op == BC_ISLE) {
3259 | bc_comp FTMP2, FTMP0, CARG2, CARG1, movn, movt, c.ult.d, ->vm_sfcmpult
3260 } else {
3261 | bc_comp FTMP2, FTMP0, CARG2, CARG1, movz, movf, c.ult.d, ->vm_sfcmpult
3262 }
3263 |.endif
3264 break;
3265
3266 case BC_ISEQV: case BC_ISNEV:
3267 vk = op == BC_ISEQV;
3268 | // RA = src1*8, RD = src2*8, JMP with RD = target
3269 | daddu RA, BASE, RA
3270 | daddiu PC, PC, 4
3271 | daddu RD, BASE, RD
3272 | ld CARG1, 0(RA)
3273 | lhu TMP2, -4+OFS_RD(PC)
3274 | ld CARG2, 0(RD)
3275 | gettp CARG3, CARG1
3276 | gettp CARG4, CARG2
3277 | sltu AT, TISNUM, CARG3
3278 | sltu TMP1, TISNUM, CARG4
3279 | or AT, AT, TMP1
3280 if (vk) {
3281 | beqz AT, ->BC_ISEQN_Z
3282 } else {
3283 | beqz AT, ->BC_ISNEN_Z
3284 }
3285 | // Either or both types are not numbers.
3286 | lui TMP3, (-(BCBIAS_J*4 >> 16) & 65535)
3287 |.if FFI
3288 |. li AT, LJ_TCDATA
3289 | beq CARG3, AT, ->vmeta_equal_cd
3290 |.endif
3291 | decode_RD4b TMP2
3292 |.if FFI
3293 | beq CARG4, AT, ->vmeta_equal_cd
3294 |. nop
3295 |.endif
3296 | bne CARG1, CARG2, >2
3297 |. addu TMP2, TMP2, TMP3
3298 | // Tag and value are equal.
3299 if (vk) {
3300 |->BC_ISEQV_Z:
3301 | daddu PC, PC, TMP2
3302 }
3303 |1:
3304 | ins_next
3305 |
3306 |2: // Check if the tags are the same and it's a table or userdata.
3307 | xor AT, CARG3, CARG4 // Same type?
3308 | sltiu TMP0, CARG3, LJ_TISTABUD+1 // Table or userdata?
3309 |.if MIPSR6
3310 | seleqz TMP0, TMP0, AT
3311 |.else
3312 | movn TMP0, r0, AT
3313 |.endif
3314 if (vk) {
3315 | beqz TMP0, <1
3316 } else {
3317 | beqz TMP0, ->BC_ISEQV_Z // Reuse code from opposite instruction.
3318 }
3319 | // Different tables or userdatas. Need to check __eq metamethod.
3320 | // Field metatable must be at same offset for GCtab and GCudata!
3321 |. cleartp TAB:TMP1, CARG1
3322 | ld TAB:TMP3, TAB:TMP1->metatable
3323 if (vk) {
3324 | beqz TAB:TMP3, <1 // No metatable?
3325 |. nop
3326 | lbu TMP3, TAB:TMP3->nomm
3327 | andi TMP3, TMP3, 1<<MM_eq
3328 | bnez TMP3, >1 // Or 'no __eq' flag set?
3329 } else {
3330 | beqz TAB:TMP3,->BC_ISEQV_Z // No metatable?
3331 |. nop
3332 | lbu TMP3, TAB:TMP3->nomm
3333 | andi TMP3, TMP3, 1<<MM_eq
3334 | bnez TMP3, ->BC_ISEQV_Z // Or 'no __eq' flag set?
3335 }
3336 |. nop
3337 | b ->vmeta_equal // Handle __eq metamethod.
3338 |. li TMP0, 1-vk // ne = 0 or 1.
3339 break;
3340
3341 case BC_ISEQS: case BC_ISNES:
3342 vk = op == BC_ISEQS;
3343 | // RA = src*8, RD = str_const*8 (~), JMP with RD = target
3344 | daddu RA, BASE, RA
3345 | daddiu PC, PC, 4
3346 | ld CARG1, 0(RA)
3347 | dsubu RD, KBASE, RD
3348 | lhu TMP2, -4+OFS_RD(PC)
3349 | ld CARG2, -8(RD) // KBASE-8-str_const*8
3350 |.if FFI
3351 | gettp TMP0, CARG1
3352 | li AT, LJ_TCDATA
3353 |.endif
3354 | li TMP1, LJ_TSTR
3355 | decode_RD4b TMP2
3356 |.if FFI
3357 | beq TMP0, AT, ->vmeta_equal_cd
3358 |.endif
3359 |. settp CARG2, TMP1
3360 | lui TMP3, (-(BCBIAS_J*4 >> 16) & 65535)
3361 | xor TMP1, CARG1, CARG2
3362 | addu TMP2, TMP2, TMP3
3363 |.if MIPSR6
3364 if (vk) {
3365 | seleqz TMP2, TMP2, TMP1
3366 } else {
3367 | selnez TMP2, TMP2, TMP1
3368 }
3369 |.else
3370 if (vk) {
3371 | movn TMP2, r0, TMP1
3372 } else {
3373 | movz TMP2, r0, TMP1
3374 }
3375 |.endif
3376 | daddu PC, PC, TMP2
3377 | ins_next
3378 break;
3379
3380 case BC_ISEQN: case BC_ISNEN:
3381 vk = op == BC_ISEQN;
3382 | // RA = src*8, RD = num_const*8, JMP with RD = target
3383 | daddu RA, BASE, RA
3384 | daddu RD, KBASE, RD
3385 | ld CARG1, 0(RA)
3386 | ld CARG2, 0(RD)
3387 | lhu TMP2, OFS_RD(PC)
3388 | gettp CARG3, CARG1
3389 | gettp CARG4, CARG2
3390 | daddiu PC, PC, 4
3391 | lui TMP3, (-(BCBIAS_J*4 >> 16) & 65535)
3392 if (vk) {
3393 |->BC_ISEQN_Z:
3394 } else {
3395 |->BC_ISNEN_Z:
3396 }
3397 | bne CARG3, TISNUM, >3
3398 |. decode_RD4b TMP2
3399 | bne CARG4, TISNUM, >6
3400 |. addu TMP2, TMP2, TMP3
3401 | xor AT, CARG1, CARG2
3402 |.if MIPSR6
3403 if (vk) {
3404 | seleqz TMP2, TMP2, AT
3405 |1:
3406 | daddu PC, PC, TMP2
3407 |2:
3408 } else {
3409 | selnez TMP2, TMP2, AT
3410 |1:
3411 |2:
3412 | daddu PC, PC, TMP2
3413 }
3414 |.else
3415 if (vk) {
3416 | movn TMP2, r0, AT
3417 |1:
3418 | daddu PC, PC, TMP2
3419 |2:
3420 } else {
3421 | movz TMP2, r0, AT
3422 |1:
3423 |2:
3424 | daddu PC, PC, TMP2
3425 }
3426 |.endif
3427 | ins_next
3428 |
3429 |3: // RA is not an integer.
3430 | sltu AT, CARG3, TISNUM
3431 |.if FFI
3432 | beqz AT, >8
3433 |.else
3434 | beqz AT, <2
3435 |.endif
3436 |. addu TMP2, TMP2, TMP3
3437 | sltu AT, CARG4, TISNUM
3438 |.if FPU
3439 | ldc1 FTMP0, 0(RA)
3440 | ldc1 FTMP2, 0(RD)
3441 |.endif
3442 | beqz AT, >5
3443 |. nop
3444 |4: // RA and RD are both numbers.
3445 |.if FPU
3446 |.if MIPSR6
3447 | cmp.eq.d FTMP0, FTMP0, FTMP2
3448 | dmfc1 TMP1, FTMP0
3449 | b <1
3450 if (vk) {
3451 |. selnez TMP2, TMP2, TMP1
3452 } else {
3453 |. seleqz TMP2, TMP2, TMP1
3454 }
3455 |.else
3456 | c.eq.d FTMP0, FTMP2
3457 | b <1
3458 if (vk) {
3459 |. movf TMP2, r0
3460 } else {
3461 |. movt TMP2, r0
3462 }
3463 |.endif
3464 |.else
3465 | bal ->vm_sfcmpeq
3466 |. nop
3467 | b <1
3468 |.if MIPSR6
3469 if (vk) {
3470 |. selnez TMP2, TMP2, CRET1
3471 } else {
3472 |. seleqz TMP2, TMP2, CRET1
3473 }
3474 |.else
3475 if (vk) {
3476 |. movz TMP2, r0, CRET1
3477 } else {
3478 |. movn TMP2, r0, CRET1
3479 }
3480 |.endif
3481 |.endif
3482 |
3483 |5: // RA is a number, RD is not a number.
3484 |.if FFI
3485 | bne CARG4, TISNUM, >9
3486 |.else
3487 | bne CARG4, TISNUM, <2
3488 |.endif
3489 | // RA is a number, RD is an integer. Convert RD to a number.
3490 |.if FPU
3491 |. lwc1 FTMP2, LO(RD)
3492 | b <4
3493 |. cvt.d.w FTMP2, FTMP2
3494 |.else
3495 |. sextw CARG2, CARG2
3496 | bal ->vm_sfi2d_2
3497 |. nop
3498 | b <4
3499 |. nop
3500 |.endif
3501 |
3502 |6: // RA is an integer, RD is not an integer
3503 | sltu AT, CARG4, TISNUM
3504 |.if FFI
3505 | beqz AT, >9
3506 |.else
3507 | beqz AT, <2
3508 |.endif
3509 | // RA is an integer, RD is a number. Convert RA to a number.
3510 |.if FPU
3511 |. lwc1 FTMP0, LO(RA)
3512 | ldc1 FTMP2, 0(RD)
3513 | b <4
3514 | cvt.d.w FTMP0, FTMP0
3515 |.else
3516 |. sextw CARG1, CARG1
3517 | bal ->vm_sfi2d_1
3518 |. nop
3519 | b <4
3520 |. nop
3521 |.endif
3522 |
3523 |.if FFI
3524 |8:
3525 | li AT, LJ_TCDATA
3526 | bne CARG3, AT, <2
3527 |. nop
3528 | b ->vmeta_equal_cd
3529 |. nop
3530 |9:
3531 | li AT, LJ_TCDATA
3532 | bne CARG4, AT, <2
3533 |. nop
3534 | b ->vmeta_equal_cd
3535 |. nop
3536 |.endif
3537 break;
3538
3539 case BC_ISEQP: case BC_ISNEP:
3540 vk = op == BC_ISEQP;
3541 | // RA = src*8, RD = primitive_type*8 (~), JMP with RD = target
3542 | daddu RA, BASE, RA
3543 | srl TMP1, RD, 3
3544 | ld TMP0, 0(RA)
3545 | lhu TMP2, OFS_RD(PC)
3546 | not TMP1, TMP1
3547 | gettp TMP0, TMP0
3548 | daddiu PC, PC, 4
3549 |.if FFI
3550 | li AT, LJ_TCDATA
3551 | beq TMP0, AT, ->vmeta_equal_cd
3552 |.endif
3553 |. xor TMP0, TMP0, TMP1
3554 | decode_RD4b TMP2
3555 | lui TMP3, (-(BCBIAS_J*4 >> 16) & 65535)
3556 | addu TMP2, TMP2, TMP3
3557 |.if MIPSR6
3558 if (vk) {
3559 | seleqz TMP2, TMP2, TMP0
3560 } else {
3561 | selnez TMP2, TMP2, TMP0
3562 }
3563 |.else
3564 if (vk) {
3565 | movn TMP2, r0, TMP0
3566 } else {
3567 | movz TMP2, r0, TMP0
3568 }
3569 |.endif
3570 | daddu PC, PC, TMP2
3571 | ins_next
3572 break;
3573
3574 /* -- Unary test and copy ops ------------------------------------------- */
3575
3576 case BC_ISTC: case BC_ISFC: case BC_IST: case BC_ISF:
3577 | // RA = dst*8 or unused, RD = src*8, JMP with RD = target
3578 | daddu RD, BASE, RD
3579 | lhu TMP2, OFS_RD(PC)
3580 | ld TMP0, 0(RD)
3581 | daddiu PC, PC, 4
3582 | gettp TMP0, TMP0
3583 | sltiu TMP0, TMP0, LJ_TISTRUECOND
3584 if (op == BC_IST || op == BC_ISF) {
3585 | decode_RD4b TMP2
3586 | lui TMP3, (-(BCBIAS_J*4 >> 16) & 65535)
3587 | addu TMP2, TMP2, TMP3
3588 |.if MIPSR6
3589 if (op == BC_IST) {
3590 | selnez TMP2, TMP2, TMP0;
3591 } else {
3592 | seleqz TMP2, TMP2, TMP0;
3593 }
3594 |.else
3595 if (op == BC_IST) {
3596 | movz TMP2, r0, TMP0
3597 } else {
3598 | movn TMP2, r0, TMP0
3599 }
3600 |.endif
3601 | daddu PC, PC, TMP2
3602 } else {
3603 | ld CRET1, 0(RD)
3604 if (op == BC_ISTC) {
3605 | beqz TMP0, >1
3606 } else {
3607 | bnez TMP0, >1
3608 }
3609 |. daddu RA, BASE, RA
3610 | decode_RD4b TMP2
3611 | lui TMP3, (-(BCBIAS_J*4 >> 16) & 65535)
3612 | addu TMP2, TMP2, TMP3
3613 | sd CRET1, 0(RA)
3614 | daddu PC, PC, TMP2
3615 |1:
3616 }
3617 | ins_next
3618 break;
3619
3620 case BC_ISTYPE:
3621 | // RA = src*8, RD = -type*8
3622 | daddu TMP2, BASE, RA
3623 | srl TMP1, RD, 3
3624 | ld TMP0, 0(TMP2)
3625 | ins_next1
3626 | gettp TMP0, TMP0
3627 | daddu AT, TMP0, TMP1
3628 | bnez AT, ->vmeta_istype
3629 |. ins_next2
3630 break;
3631 case BC_ISNUM:
3632 | // RA = src*8, RD = -(TISNUM-1)*8
3633 | daddu TMP2, BASE, RA
3634 | ld TMP0, 0(TMP2)
3635 | ins_next1
3636 | checknum TMP0, ->vmeta_istype
3637 |. ins_next2
3638 break;
3639
3640 /* -- Unary ops --------------------------------------------------------- */
3641
3642 case BC_MOV:
3643 | // RA = dst*8, RD = src*8
3644 | daddu RD, BASE, RD
3645 | daddu RA, BASE, RA
3646 | ld CRET1, 0(RD)
3647 | ins_next1
3648 | sd CRET1, 0(RA)
3649 | ins_next2
3650 break;
3651 case BC_NOT:
3652 | // RA = dst*8, RD = src*8
3653 | daddu RD, BASE, RD
3654 | daddu RA, BASE, RA
3655 | ld TMP0, 0(RD)
3656 | li AT, LJ_TTRUE
3657 | gettp TMP0, TMP0
3658 | sltu TMP0, AT, TMP0
3659 | addiu TMP0, TMP0, 1
3660 | dsll TMP0, TMP0, 47
3661 | not TMP0, TMP0
3662 | ins_next1
3663 | sd TMP0, 0(RA)
3664 | ins_next2
3665 break;
3666 case BC_UNM:
3667 | // RA = dst*8, RD = src*8
3668 | daddu RB, BASE, RD
3669 | ld CARG1, 0(RB)
3670 | daddu RA, BASE, RA
3671 | gettp CARG3, CARG1
3672 | bne CARG3, TISNUM, >2
3673 |. lui TMP1, 0x8000
3674 | sextw CARG1, CARG1
3675 | beq CARG1, TMP1, ->vmeta_unm // Meta handler deals with -2^31.
3676 |. negu CARG1, CARG1
3677 | zextw CARG1, CARG1
3678 | settp CARG1, TISNUM
3679 |1:
3680 | ins_next1
3681 | sd CARG1, 0(RA)
3682 | ins_next2
3683 |2:
3684 | sltiu AT, CARG3, LJ_TISNUM
3685 | beqz AT, ->vmeta_unm
3686 |. dsll TMP1, TMP1, 32
3687 | b <1
3688 |. xor CARG1, CARG1, TMP1
3689 break;
3690 case BC_LEN:
3691 | // RA = dst*8, RD = src*8
3692 | daddu CARG2, BASE, RD
3693 | daddu RA, BASE, RA
3694 | ld TMP0, 0(CARG2)
3695 | gettp TMP1, TMP0
3696 | daddiu AT, TMP1, -LJ_TSTR
3697 | bnez AT, >2
3698 |. cleartp STR:CARG1, TMP0
3699 | lw CRET1, STR:CARG1->len
3700 |1:
3701 | settp CRET1, TISNUM
3702 | ins_next1
3703 | sd CRET1, 0(RA)
3704 | ins_next2
3705 |2:
3706 | daddiu AT, TMP1, -LJ_TTAB
3707 | bnez AT, ->vmeta_len
3708 |. nop
3709 #if LJ_52
3710 | ld TAB:TMP2, TAB:CARG1->metatable
3711 | bnez TAB:TMP2, >9
3712 |. nop
3713 |3:
3714 #endif
3715 |->BC_LEN_Z:
3716 | load_got lj_tab_len
3717 | call_intern lj_tab_len // (GCtab *t)
3718 |. nop
3719 | // Returns uint32_t (but less than 2^31).
3720 | b <1
3721 |. nop
3722 #if LJ_52
3723 |9:
3724 | lbu TMP0, TAB:TMP2->nomm
3725 | andi TMP0, TMP0, 1<<MM_len
3726 | bnez TMP0, <3 // 'no __len' flag set: done.
3727 |. nop
3728 | b ->vmeta_len
3729 |. nop
3730 #endif
3731 break;
3732
3733 /* -- Binary ops -------------------------------------------------------- */
3734
3735 |.macro fpmod, a, b, c
3736 | bal ->vm_floor // floor(b/c)
3737 |. div.d FARG1, b, c
3738 | mul.d a, FRET1, c
3739 | sub.d a, b, a // b - floor(b/c)*c
3740 |.endmacro
3741
3742 |.macro sfpmod
3743 | daddiu sp, sp, -16
3744 |
3745 | load_got __divdf3
3746 | sd CARG1, 0(sp)
3747 | call_extern
3748 |. sd CARG2, 8(sp)
3749 |
3750 | load_got floor
3751 | call_extern
3752 |. move CARG1, CRET1
3753 |
3754 | load_got __muldf3
3755 | move CARG1, CRET1
3756 | call_extern
3757 |. ld CARG2, 8(sp)
3758 |
3759 | load_got __subdf3
3760 | ld CARG1, 0(sp)
3761 | call_extern
3762 |. move CARG2, CRET1
3763 |
3764 | daddiu sp, sp, 16
3765 |.endmacro
3766
3767 |.macro ins_arithpre, label
3768 ||vk = ((int)op - BC_ADDVN) / (BC_ADDNV-BC_ADDVN);
3769 | // RA = dst*8, RB = src1*8, RC = src2*8 | num_const*8
3770 ||switch (vk) {
3771 ||case 0:
3772 | decode_RB8a RB, INS
3773 | decode_RB8b RB
3774 | decode_RDtoRC8 RC, RD
3775 | // RA = dst*8, RB = src1*8, RC = num_const*8
3776 | daddu RB, BASE, RB
3777 |.if "label" ~= "none"
3778 | b label
3779 |.endif
3780 |. daddu RC, KBASE, RC
3781 || break;
3782 ||case 1:
3783 | decode_RB8a RC, INS
3784 | decode_RB8b RC
3785 | decode_RDtoRC8 RB, RD
3786 | // RA = dst*8, RB = num_const*8, RC = src1*8
3787 | daddu RC, BASE, RC
3788 |.if "label" ~= "none"
3789 | b label
3790 |.endif
3791 |. daddu RB, KBASE, RB
3792 || break;
3793 ||default:
3794 | decode_RB8a RB, INS
3795 | decode_RB8b RB
3796 | decode_RDtoRC8 RC, RD
3797 | // RA = dst*8, RB = src1*8, RC = src2*8
3798 | daddu RB, BASE, RB
3799 |.if "label" ~= "none"
3800 | b label
3801 |.endif
3802 |. daddu RC, BASE, RC
3803 || break;
3804 ||}
3805 |.endmacro
3806 |
3807 |.macro ins_arith, intins, fpins, fpcall, label
3808 | ins_arithpre none
3809 |
3810 |.if "label" ~= "none"
3811 |label:
3812 |.endif
3813 |
3814 |// Used in 5.
3815 | ld CARG1, 0(RB)
3816 | ld CARG2, 0(RC)
3817 | gettp TMP0, CARG1
3818 | gettp TMP1, CARG2
3819 |
3820 |.if "intins" ~= "div"
3821 |
3822 | // Check for two integers.
3823 | sextw CARG3, CARG1
3824 | bne TMP0, TISNUM, >5
3825 |. sextw CARG4, CARG2
3826 | bne TMP1, TISNUM, >5
3827 |
3828 |.if "intins" == "addu"
3829 |. intins CRET1, CARG3, CARG4
3830 | xor TMP1, CRET1, CARG3 // ((y^a) & (y^b)) < 0: overflow.
3831 | xor TMP2, CRET1, CARG4
3832 | and TMP1, TMP1, TMP2
3833 | bltz TMP1, ->vmeta_arith
3834 |. daddu RA, BASE, RA
3835 |.elif "intins" == "subu"
3836 |. intins CRET1, CARG3, CARG4
3837 | xor TMP1, CRET1, CARG3 // ((y^a) & (a^b)) < 0: overflow.
3838 | xor TMP2, CARG3, CARG4
3839 | and TMP1, TMP1, TMP2
3840 | bltz TMP1, ->vmeta_arith
3841 |. daddu RA, BASE, RA
3842 |.elif "intins" == "mult"
3843 |.if MIPSR6
3844 |. nop
3845 | mul CRET1, CARG3, CARG4
3846 | muh TMP2, CARG3, CARG4
3847 |.else
3848 |. intins CARG3, CARG4
3849 | mflo CRET1
3850 | mfhi TMP2
3851 |.endif
3852 | sra TMP1, CRET1, 31
3853 | bne TMP1, TMP2, ->vmeta_arith
3854 |. daddu RA, BASE, RA
3855 |.else
3856 |. load_got lj_vm_modi
3857 | beqz CARG4, ->vmeta_arith
3858 |. daddu RA, BASE, RA
3859 | move CARG1, CARG3
3860 | call_extern
3861 |. move CARG2, CARG4
3862 |.endif
3863 |
3864 | zextw CRET1, CRET1
3865 | settp CRET1, TISNUM
3866 | ins_next1
3867 | sd CRET1, 0(RA)
3868 |3:
3869 | ins_next2
3870 |
3871 |.endif
3872 |
3873 |5: // Check for two numbers.
3874 | .FPU ldc1 FTMP0, 0(RB)
3875 | sltu AT, TMP0, TISNUM
3876 | sltu TMP0, TMP1, TISNUM
3877 | .FPU ldc1 FTMP2, 0(RC)
3878 | and AT, AT, TMP0
3879 | beqz AT, ->vmeta_arith
3880 |. daddu RA, BASE, RA
3881 |
3882 |.if FPU
3883 | fpins FRET1, FTMP0, FTMP2
3884 |.elif "fpcall" == "sfpmod"
3885 | sfpmod
3886 |.else
3887 | load_got fpcall
3888 | call_extern
3889 |. nop
3890 |.endif
3891 |
3892 | ins_next1
3893 |.if "intins" ~= "div"
3894 | b <3
3895 |.endif
3896 |.if FPU
3897 |. sdc1 FRET1, 0(RA)
3898 |.else
3899 |. sd CRET1, 0(RA)
3900 |.endif
3901 |.if "intins" == "div"
3902 | ins_next2
3903 |.endif
3904 |
3905 |.endmacro
3906
3907 case BC_ADDVN: case BC_ADDNV: case BC_ADDVV:
3908 | ins_arith addu, add.d, __adddf3, none
3909 break;
3910 case BC_SUBVN: case BC_SUBNV: case BC_SUBVV:
3911 | ins_arith subu, sub.d, __subdf3, none
3912 break;
3913 case BC_MULVN: case BC_MULNV: case BC_MULVV:
3914 | ins_arith mult, mul.d, __muldf3, none
3915 break;
3916 case BC_DIVVN:
3917 | ins_arith div, div.d, __divdf3, ->BC_DIVVN_Z
3918 break;
3919 case BC_DIVNV: case BC_DIVVV:
3920 | ins_arithpre ->BC_DIVVN_Z
3921 break;
3922 case BC_MODVN:
3923 | ins_arith modi, fpmod, sfpmod, ->BC_MODVN_Z
3924 break;
3925 case BC_MODNV: case BC_MODVV:
3926 | ins_arithpre ->BC_MODVN_Z
3927 break;
3928 case BC_POW:
3929 | ins_arithpre none
3930 | ld CARG1, 0(RB)
3931 | ld CARG2, 0(RC)
3932 | gettp TMP0, CARG1
3933 | gettp TMP1, CARG2
3934 | sltiu TMP0, TMP0, LJ_TISNUM
3935 | sltiu TMP1, TMP1, LJ_TISNUM
3936 | and AT, TMP0, TMP1
3937 | load_got pow
3938 | beqz AT, ->vmeta_arith
3939 |. daddu RA, BASE, RA
3940 |.if FPU
3941 | ldc1 FARG1, 0(RB)
3942 | ldc1 FARG2, 0(RC)
3943 |.endif
3944 | call_extern
3945 |. nop
3946 | ins_next1
3947 |.if FPU
3948 | sdc1 FRET1, 0(RA)
3949 |.else
3950 | sd CRET1, 0(RA)
3951 |.endif
3952 | ins_next2
3953 break;
3954
3955 case BC_CAT:
3956 | // RA = dst*8, RB = src_start*8, RC = src_end*8
3957 | decode_RB8a RB, INS
3958 | decode_RB8b RB
3959 | decode_RDtoRC8 RC, RD
3960 | dsubu CARG3, RC, RB
3961 | sd BASE, L->base
3962 | daddu CARG2, BASE, RC
3963 | move MULTRES, RB
3964 |->BC_CAT_Z:
3965 | load_got lj_meta_cat
3966 | srl CARG3, CARG3, 3
3967 | sd PC, SAVE_PC
3968 | call_intern lj_meta_cat // (lua_State *L, TValue *top, int left)
3969 |. move CARG1, L
3970 | // Returns NULL (finished) or TValue * (metamethod).
3971 | bnez CRET1, ->vmeta_binop
3972 |. ld BASE, L->base
3973 | daddu RB, BASE, MULTRES
3974 | ld CRET1, 0(RB)
3975 | daddu RA, BASE, RA
3976 | ins_next1
3977 | sd CRET1, 0(RA)
3978 | ins_next2
3979 break;
3980
3981 /* -- Constant ops ------------------------------------------------------ */
3982
3983 case BC_KSTR:
3984 | // RA = dst*8, RD = str_const*8 (~)
3985 | dsubu TMP1, KBASE, RD
3986 | ins_next1
3987 | li TMP2, LJ_TSTR
3988 | ld TMP0, -8(TMP1) // KBASE-8-str_const*8
3989 | daddu RA, BASE, RA
3990 | settp TMP0, TMP2
3991 | sd TMP0, 0(RA)
3992 | ins_next2
3993 break;
3994 case BC_KCDATA:
3995 |.if FFI
3996 | // RA = dst*8, RD = cdata_const*8 (~)
3997 | dsubu TMP1, KBASE, RD
3998 | ins_next1
3999 | ld TMP0, -8(TMP1) // KBASE-8-cdata_const*8
4000 | li TMP2, LJ_TCDATA
4001 | daddu RA, BASE, RA
4002 | settp TMP0, TMP2
4003 | sd TMP0, 0(RA)
4004 | ins_next2
4005 |.endif
4006 break;
4007 case BC_KSHORT:
4008 | // RA = dst*8, RD = int16_literal*8
4009 | sra RD, INS, 16
4010 | daddu RA, BASE, RA
4011 | zextw RD, RD
4012 | ins_next1
4013 | settp RD, TISNUM
4014 | sd RD, 0(RA)
4015 | ins_next2
4016 break;
4017 case BC_KNUM:
4018 | // RA = dst*8, RD = num_const*8
4019 | daddu RD, KBASE, RD
4020 | daddu RA, BASE, RA
4021 | ld CRET1, 0(RD)
4022 | ins_next1
4023 | sd CRET1, 0(RA)
4024 | ins_next2
4025 break;
4026 case BC_KPRI:
4027 | // RA = dst*8, RD = primitive_type*8 (~)
4028 | daddu RA, BASE, RA
4029 | dsll TMP0, RD, 44
4030 | not TMP0, TMP0
4031 | ins_next1
4032 | sd TMP0, 0(RA)
4033 | ins_next2
4034 break;
4035 case BC_KNIL:
4036 | // RA = base*8, RD = end*8
4037 | daddu RA, BASE, RA
4038 | sd TISNIL, 0(RA)
4039 | daddiu RA, RA, 8
4040 | daddu RD, BASE, RD
4041 |1:
4042 | sd TISNIL, 0(RA)
4043 | slt AT, RA, RD
4044 | bnez AT, <1
4045 |. daddiu RA, RA, 8
4046 | ins_next_
4047 break;
4048
4049 /* -- Upvalue and function ops ------------------------------------------ */
4050
4051 case BC_UGET:
4052 | // RA = dst*8, RD = uvnum*8
4053 | ld LFUNC:RB, FRAME_FUNC(BASE)
4054 | daddu RA, BASE, RA
4055 | cleartp LFUNC:RB
4056 | daddu RD, RD, LFUNC:RB
4057 | ld UPVAL:RB, LFUNC:RD->uvptr
4058 | ins_next1
4059 | ld TMP1, UPVAL:RB->v
4060 | ld CRET1, 0(TMP1)
4061 | sd CRET1, 0(RA)
4062 | ins_next2
4063 break;
4064 case BC_USETV:
4065 | // RA = uvnum*8, RD = src*8
4066 | ld LFUNC:RB, FRAME_FUNC(BASE)
4067 | daddu RD, BASE, RD
4068 | cleartp LFUNC:RB
4069 | daddu RA, RA, LFUNC:RB
4070 | ld UPVAL:RB, LFUNC:RA->uvptr
4071 | ld CRET1, 0(RD)
4072 | lbu TMP3, UPVAL:RB->marked
4073 | ld CARG2, UPVAL:RB->v
4074 | andi TMP3, TMP3, LJ_GC_BLACK // isblack(uv)
4075 | lbu TMP0, UPVAL:RB->closed
4076 | gettp TMP2, CRET1
4077 | sd CRET1, 0(CARG2)
4078 | li AT, LJ_GC_BLACK|1
4079 | or TMP3, TMP3, TMP0
4080 | beq TMP3, AT, >2 // Upvalue is closed and black?
4081 |. daddiu TMP2, TMP2, -(LJ_TNUMX+1)
4082 |1:
4083 | ins_next
4084 |
4085 |2: // Check if new value is collectable.
4086 | sltiu AT, TMP2, LJ_TISGCV - (LJ_TNUMX+1)
4087 | beqz AT, <1 // tvisgcv(v)
4088 |. cleartp GCOBJ:CRET1, CRET1
4089 | lbu TMP3, GCOBJ:CRET1->gch.marked
4090 | andi TMP3, TMP3, LJ_GC_WHITES // iswhite(v)
4091 | beqz TMP3, <1
4092 |. load_got lj_gc_barrieruv
4093 | // Crossed a write barrier. Move the barrier forward.
4094 | call_intern lj_gc_barrieruv // (global_State *g, TValue *tv)
4095 |. daddiu CARG1, DISPATCH, GG_DISP2G
4096 | b <1
4097 |. nop
4098 break;
4099 case BC_USETS:
4100 | // RA = uvnum*8, RD = str_const*8 (~)
4101 | ld LFUNC:RB, FRAME_FUNC(BASE)
4102 | dsubu TMP1, KBASE, RD
4103 | cleartp LFUNC:RB
4104 | daddu RA, RA, LFUNC:RB
4105 | ld UPVAL:RB, LFUNC:RA->uvptr
4106 | ld STR:TMP1, -8(TMP1) // KBASE-8-str_const*8
4107 | lbu TMP2, UPVAL:RB->marked
4108 | ld CARG2, UPVAL:RB->v
4109 | lbu TMP3, STR:TMP1->marked
4110 | andi AT, TMP2, LJ_GC_BLACK // isblack(uv)
4111 | lbu TMP2, UPVAL:RB->closed
4112 | li TMP0, LJ_TSTR
4113 | settp TMP1, TMP0
4114 | bnez AT, >2
4115 |. sd TMP1, 0(CARG2)
4116 |1:
4117 | ins_next
4118 |
4119 |2: // Check if string is white and ensure upvalue is closed.
4120 | beqz TMP2, <1
4121 |. andi AT, TMP3, LJ_GC_WHITES // iswhite(str)
4122 | beqz AT, <1
4123 |. load_got lj_gc_barrieruv
4124 | // Crossed a write barrier. Move the barrier forward.
4125 | call_intern lj_gc_barrieruv // (global_State *g, TValue *tv)
4126 |. daddiu CARG1, DISPATCH, GG_DISP2G
4127 | b <1
4128 |. nop
4129 break;
4130 case BC_USETN:
4131 | // RA = uvnum*8, RD = num_const*8
4132 | ld LFUNC:RB, FRAME_FUNC(BASE)
4133 | daddu RD, KBASE, RD
4134 | cleartp LFUNC:RB
4135 | daddu RA, RA, LFUNC:RB
4136 | ld UPVAL:RB, LFUNC:RA->uvptr
4137 | ld CRET1, 0(RD)
4138 | ld TMP1, UPVAL:RB->v
4139 | ins_next1
4140 | sd CRET1, 0(TMP1)
4141 | ins_next2
4142 break;
4143 case BC_USETP:
4144 | // RA = uvnum*8, RD = primitive_type*8 (~)
4145 | ld LFUNC:RB, FRAME_FUNC(BASE)
4146 | dsll TMP0, RD, 44
4147 | cleartp LFUNC:RB
4148 | daddu RA, RA, LFUNC:RB
4149 | not TMP0, TMP0
4150 | ld UPVAL:RB, LFUNC:RA->uvptr
4151 | ins_next1
4152 | ld TMP1, UPVAL:RB->v
4153 | sd TMP0, 0(TMP1)
4154 | ins_next2
4155 break;
4156
4157 case BC_UCLO:
4158 | // RA = level*8, RD = target
4159 | ld TMP2, L->openupval
4160 | branch_RD // Do this first since RD is not saved.
4161 | load_got lj_func_closeuv
4162 | sd BASE, L->base
4163 | beqz TMP2, >1
4164 |. move CARG1, L
4165 | call_intern lj_func_closeuv // (lua_State *L, TValue *level)
4166 |. daddu CARG2, BASE, RA
4167 | ld BASE, L->base
4168 |1:
4169 | ins_next
4170 break;
4171
4172 case BC_FNEW:
4173 | // RA = dst*8, RD = proto_const*8 (~) (holding function prototype)
4174 | load_got lj_func_newL_gc
4175 | dsubu TMP1, KBASE, RD
4176 | ld CARG3, FRAME_FUNC(BASE)
4177 | ld CARG2, -8(TMP1) // KBASE-8-tab_const*8
4178 | sd BASE, L->base
4179 | sd PC, SAVE_PC
4180 | cleartp CARG3
4181 | // (lua_State *L, GCproto *pt, GCfuncL *parent)
4182 | call_intern lj_func_newL_gc
4183 |. move CARG1, L
4184 | // Returns GCfuncL *.
4185 | li TMP0, LJ_TFUNC
4186 | ld BASE, L->base
4187 | ins_next1
4188 | settp CRET1, TMP0
4189 | daddu RA, BASE, RA
4190 | sd CRET1, 0(RA)
4191 | ins_next2
4192 break;
4193
4194 /* -- Table ops --------------------------------------------------------- */
4195
4196 case BC_TNEW:
4197 case BC_TDUP:
4198 | // RA = dst*8, RD = (hbits|asize)*8 | tab_const*8 (~)
4199 | ld TMP0, DISPATCH_GL(gc.total)(DISPATCH)
4200 | ld TMP1, DISPATCH_GL(gc.threshold)(DISPATCH)
4201 | sd BASE, L->base
4202 | sd PC, SAVE_PC
4203 | sltu AT, TMP0, TMP1
4204 | beqz AT, >5
4205 |1:
4206 if (op == BC_TNEW) {
4207 | load_got lj_tab_new
4208 | srl CARG2, RD, 3
4209 | andi CARG2, CARG2, 0x7ff
4210 | li TMP0, 0x801
4211 | addiu AT, CARG2, -0x7ff
4212 | srl CARG3, RD, 14
4213 |.if MIPSR6
4214 | seleqz TMP0, TMP0, AT
4215 | selnez CARG2, CARG2, AT
4216 | or CARG2, CARG2, TMP0
4217 |.else
4218 | movz CARG2, TMP0, AT
4219 |.endif
4220 | // (lua_State *L, int32_t asize, uint32_t hbits)
4221 | call_intern lj_tab_new
4222 |. move CARG1, L
4223 | // Returns Table *.
4224 } else {
4225 | load_got lj_tab_dup
4226 | dsubu TMP1, KBASE, RD
4227 | move CARG1, L
4228 | call_intern lj_tab_dup // (lua_State *L, Table *kt)
4229 |. ld CARG2, -8(TMP1) // KBASE-8-str_const*8
4230 | // Returns Table *.
4231 }
4232 | li TMP0, LJ_TTAB
4233 | ld BASE, L->base
4234 | ins_next1
4235 | daddu RA, BASE, RA
4236 | settp CRET1, TMP0
4237 | sd CRET1, 0(RA)
4238 | ins_next2
4239 |5:
4240 | load_got lj_gc_step_fixtop
4241 | move MULTRES, RD
4242 | call_intern lj_gc_step_fixtop // (lua_State *L)
4243 |. move CARG1, L
4244 | b <1
4245 |. move RD, MULTRES
4246 break;
4247
4248 case BC_GGET:
4249 | // RA = dst*8, RD = str_const*8 (~)
4250 case BC_GSET:
4251 | // RA = src*8, RD = str_const*8 (~)
4252 | ld LFUNC:TMP2, FRAME_FUNC(BASE)
4253 | dsubu TMP1, KBASE, RD
4254 | ld STR:RC, -8(TMP1) // KBASE-8-str_const*8
4255 | cleartp LFUNC:TMP2
4256 | ld TAB:RB, LFUNC:TMP2->env
4257 if (op == BC_GGET) {
4258 | b ->BC_TGETS_Z
4259 } else {
4260 | b ->BC_TSETS_Z
4261 }
4262 |. daddu RA, BASE, RA
4263 break;
4264
4265 case BC_TGETV:
4266 | // RA = dst*8, RB = table*8, RC = key*8
4267 | decode_RB8a RB, INS
4268 | decode_RB8b RB
4269 | decode_RDtoRC8 RC, RD
4270 | daddu CARG2, BASE, RB
4271 | daddu CARG3, BASE, RC
4272 | ld TAB:RB, 0(CARG2)
4273 | ld TMP2, 0(CARG3)
4274 | daddu RA, BASE, RA
4275 | checktab TAB:RB, ->vmeta_tgetv
4276 | gettp TMP3, TMP2
4277 | bne TMP3, TISNUM, >5 // Integer key?
4278 |. lw TMP0, TAB:RB->asize
4279 | sextw TMP2, TMP2
4280 | ld TMP1, TAB:RB->array
4281 | sltu AT, TMP2, TMP0
4282 | sll TMP2, TMP2, 3
4283 | beqz AT, ->vmeta_tgetv // Integer key and in array part?
4284 |. daddu TMP2, TMP1, TMP2
4285 | ld AT, 0(TMP2)
4286 | beq AT, TISNIL, >2
4287 |. ld CRET1, 0(TMP2)
4288 |1:
4289 | ins_next1
4290 | sd CRET1, 0(RA)
4291 | ins_next2
4292 |
4293 |2: // Check for __index if table value is nil.
4294 | ld TAB:TMP2, TAB:RB->metatable
4295 | beqz TAB:TMP2, <1 // No metatable: done.
4296 |. nop
4297 | lbu TMP0, TAB:TMP2->nomm
4298 | andi TMP0, TMP0, 1<<MM_index
4299 | bnez TMP0, <1 // 'no __index' flag set: done.
4300 |. nop
4301 | b ->vmeta_tgetv
4302 |. nop
4303 |
4304 |5:
4305 | li AT, LJ_TSTR
4306 | bne TMP3, AT, ->vmeta_tgetv
4307 |. cleartp RC, TMP2
4308 | b ->BC_TGETS_Z // String key?
4309 |. nop
4310 break;
4311 case BC_TGETS:
4312 | // RA = dst*8, RB = table*8, RC = str_const*8 (~)
4313 | decode_RB8a RB, INS
4314 | decode_RB8b RB
4315 | decode_RC8a RC, INS
4316 | daddu CARG2, BASE, RB
4317 | decode_RC8b RC
4318 | ld TAB:RB, 0(CARG2)
4319 | dsubu CARG3, KBASE, RC
4320 | daddu RA, BASE, RA
4321 | ld STR:RC, -8(CARG3) // KBASE-8-str_const*8
4322 | checktab TAB:RB, ->vmeta_tgets1
4323 |->BC_TGETS_Z:
4324 | // TAB:RB = GCtab *, STR:RC = GCstr *, RA = dst*8
4325 | lw TMP0, TAB:RB->hmask
4326 | lw TMP1, STR:RC->sid
4327 | ld NODE:TMP2, TAB:RB->node
4328 | and TMP1, TMP1, TMP0 // idx = str->sid & tab->hmask
4329 | sll TMP0, TMP1, 5
4330 | sll TMP1, TMP1, 3
4331 | subu TMP1, TMP0, TMP1
4332 | li TMP3, LJ_TSTR
4333 | daddu NODE:TMP2, NODE:TMP2, TMP1 // node = tab->node + (idx*32-idx*8)
4334 | settp STR:RC, TMP3 // Tagged key to look for.
4335 |1:
4336 | ld CARG1, NODE:TMP2->key
4337 | ld CRET1, NODE:TMP2->val
4338 | ld NODE:TMP1, NODE:TMP2->next
4339 | bne CARG1, RC, >4
4340 |. ld TAB:TMP3, TAB:RB->metatable
4341 | beq CRET1, TISNIL, >5 // Key found, but nil value?
4342 |. nop
4343 |3:
4344 | ins_next1
4345 | sd CRET1, 0(RA)
4346 | ins_next2
4347 |
4348 |4: // Follow hash chain.
4349 | bnez NODE:TMP1, <1
4350 |. move NODE:TMP2, NODE:TMP1
4351 | // End of hash chain: key not found, nil result.
4352 |
4353 |5: // Check for __index if table value is nil.
4354 | beqz TAB:TMP3, <3 // No metatable: done.
4355 |. move CRET1, TISNIL
4356 | lbu TMP0, TAB:TMP3->nomm
4357 | andi TMP0, TMP0, 1<<MM_index
4358 | bnez TMP0, <3 // 'no __index' flag set: done.
4359 |. nop
4360 | b ->vmeta_tgets
4361 |. nop
4362 break;
4363 case BC_TGETB:
4364 | // RA = dst*8, RB = table*8, RC = index*8
4365 | decode_RB8a RB, INS
4366 | decode_RB8b RB
4367 | daddu CARG2, BASE, RB
4368 | decode_RDtoRC8 RC, RD
4369 | ld TAB:RB, 0(CARG2)
4370 | daddu RA, BASE, RA
4371 | srl TMP0, RC, 3
4372 | checktab TAB:RB, ->vmeta_tgetb
4373 | lw TMP1, TAB:RB->asize
4374 | ld TMP2, TAB:RB->array
4375 | sltu AT, TMP0, TMP1
4376 | beqz AT, ->vmeta_tgetb
4377 |. daddu RC, TMP2, RC
4378 | ld AT, 0(RC)
4379 | beq AT, TISNIL, >5
4380 |. ld CRET1, 0(RC)
4381 |1:
4382 | ins_next1
4383 | sd CRET1, 0(RA)
4384 | ins_next2
4385 |
4386 |5: // Check for __index if table value is nil.
4387 | ld TAB:TMP2, TAB:RB->metatable
4388 | beqz TAB:TMP2, <1 // No metatable: done.
4389 |. nop
4390 | lbu TMP1, TAB:TMP2->nomm
4391 | andi TMP1, TMP1, 1<<MM_index
4392 | bnez TMP1, <1 // 'no __index' flag set: done.
4393 |. nop
4394 | b ->vmeta_tgetb // Caveat: preserve TMP0 and CARG2!
4395 |. nop
4396 break;
4397 case BC_TGETR:
4398 | // RA = dst*8, RB = table*8, RC = key*8
4399 | decode_RB8a RB, INS
4400 | decode_RB8b RB
4401 | decode_RDtoRC8 RC, RD
4402 | daddu RB, BASE, RB
4403 | daddu RC, BASE, RC
4404 | ld TAB:CARG1, 0(RB)
4405 | lw CARG2, LO(RC)
4406 | daddu RA, BASE, RA
4407 | cleartp TAB:CARG1
4408 | lw TMP0, TAB:CARG1->asize
4409 | ld TMP1, TAB:CARG1->array
4410 | sltu AT, CARG2, TMP0
4411 | sll TMP2, CARG2, 3
4412 | beqz AT, ->vmeta_tgetr // In array part?
4413 |. daddu CRET1, TMP1, TMP2
4414 | ld CARG2, 0(CRET1)
4415 |->BC_TGETR_Z:
4416 | ins_next1
4417 | sd CARG2, 0(RA)
4418 | ins_next2
4419 break;
4420
4421 case BC_TSETV:
4422 | // RA = src*8, RB = table*8, RC = key*8
4423 | decode_RB8a RB, INS
4424 | decode_RB8b RB
4425 | decode_RDtoRC8 RC, RD
4426 | daddu CARG2, BASE, RB
4427 | daddu CARG3, BASE, RC
4428 | ld RB, 0(CARG2)
4429 | ld TMP2, 0(CARG3)
4430 | daddu RA, BASE, RA
4431 | checktab RB, ->vmeta_tsetv
4432 | checkint TMP2, >5
4433 |. sextw RC, TMP2
4434 | lw TMP0, TAB:RB->asize
4435 | ld TMP1, TAB:RB->array
4436 | sltu AT, RC, TMP0
4437 | sll TMP2, RC, 3
4438 | beqz AT, ->vmeta_tsetv // Integer key and in array part?
4439 |. daddu TMP1, TMP1, TMP2
4440 | ld TMP0, 0(TMP1)
4441 | lbu TMP3, TAB:RB->marked
4442 | beq TMP0, TISNIL, >3
4443 |. ld CRET1, 0(RA)
4444 |1:
4445 | andi AT, TMP3, LJ_GC_BLACK // isblack(table)
4446 | bnez AT, >7
4447 |. sd CRET1, 0(TMP1)
4448 |2:
4449 | ins_next
4450 |
4451 |3: // Check for __newindex if previous value is nil.
4452 | ld TAB:TMP2, TAB:RB->metatable
4453 | beqz TAB:TMP2, <1 // No metatable: done.
4454 |. nop
4455 | lbu TMP2, TAB:TMP2->nomm
4456 | andi TMP2, TMP2, 1<<MM_newindex
4457 | bnez TMP2, <1 // 'no __newindex' flag set: done.
4458 |. nop
4459 | b ->vmeta_tsetv
4460 |. nop
4461 |
4462 |5:
4463 | gettp AT, TMP2
4464 | daddiu AT, AT, -LJ_TSTR
4465 | bnez AT, ->vmeta_tsetv
4466 |. nop
4467 | b ->BC_TSETS_Z // String key?
4468 |. cleartp STR:RC, TMP2
4469 |
4470 |7: // Possible table write barrier for the value. Skip valiswhite check.
4471 | barrierback TAB:RB, TMP3, TMP0, <2
4472 break;
4473 case BC_TSETS:
4474 | // RA = src*8, RB = table*8, RC = str_const*8 (~)
4475 | decode_RB8a RB, INS
4476 | decode_RB8b RB
4477 | daddu CARG2, BASE, RB
4478 | decode_RC8a RC, INS
4479 | ld TAB:RB, 0(CARG2)
4480 | decode_RC8b RC
4481 | dsubu CARG3, KBASE, RC
4482 | ld RC, -8(CARG3) // KBASE-8-str_const*8
4483 | daddu RA, BASE, RA
4484 | cleartp STR:RC
4485 | checktab TAB:RB, ->vmeta_tsets1
4486 |->BC_TSETS_Z:
4487 | // TAB:RB = GCtab *, STR:RC = GCstr *, RA = BASE+src*8
4488 | lw TMP0, TAB:RB->hmask
4489 | lw TMP1, STR:RC->sid
4490 | ld NODE:TMP2, TAB:RB->node
4491 | sb r0, TAB:RB->nomm // Clear metamethod cache.
4492 | and TMP1, TMP1, TMP0 // idx = str->sid & tab->hmask
4493 | sll TMP0, TMP1, 5
4494 | sll TMP1, TMP1, 3
4495 | subu TMP1, TMP0, TMP1
4496 | li TMP3, LJ_TSTR
4497 | daddu NODE:TMP2, NODE:TMP2, TMP1 // node = tab->node + (idx*32-idx*8)
4498 | settp STR:RC, TMP3 // Tagged key to look for.
4499 |.if FPU
4500 | ldc1 FTMP0, 0(RA)
4501 |.else
4502 | ld CRET1, 0(RA)
4503 |.endif
4504 |1:
4505 | ld TMP0, NODE:TMP2->key
4506 | ld CARG2, NODE:TMP2->val
4507 | ld NODE:TMP1, NODE:TMP2->next
4508 | bne TMP0, RC, >5
4509 |. lbu TMP3, TAB:RB->marked
4510 | beq CARG2, TISNIL, >4 // Key found, but nil value?
4511 |. ld TAB:TMP0, TAB:RB->metatable
4512 |2:
4513 | andi AT, TMP3, LJ_GC_BLACK // isblack(table)
4514 | bnez AT, >7
4515 |.if FPU
4516 |. sdc1 FTMP0, NODE:TMP2->val
4517 |.else
4518 |. sd CRET1, NODE:TMP2->val
4519 |.endif
4520 |3:
4521 | ins_next
4522 |
4523 |4: // Check for __newindex if previous value is nil.
4524 | beqz TAB:TMP0, <2 // No metatable: done.
4525 |. nop
4526 | lbu TMP0, TAB:TMP0->nomm
4527 | andi TMP0, TMP0, 1<<MM_newindex
4528 | bnez TMP0, <2 // 'no __newindex' flag set: done.
4529 |. nop
4530 | b ->vmeta_tsets
4531 |. nop
4532 |
4533 |5: // Follow hash chain.
4534 | bnez NODE:TMP1, <1
4535 |. move NODE:TMP2, NODE:TMP1
4536 | // End of hash chain: key not found, add a new one
4537 |
4538 | // But check for __newindex first.
4539 | ld TAB:TMP2, TAB:RB->metatable
4540 | beqz TAB:TMP2, >6 // No metatable: continue.
4541 |. daddiu CARG3, DISPATCH, DISPATCH_GL(tmptv)
4542 | lbu TMP0, TAB:TMP2->nomm
4543 | andi TMP0, TMP0, 1<<MM_newindex
4544 | beqz TMP0, ->vmeta_tsets // 'no __newindex' flag NOT set: check.
4545 |6:
4546 | load_got lj_tab_newkey
4547 | sd RC, 0(CARG3)
4548 | sd BASE, L->base
4549 | move CARG2, TAB:RB
4550 | sd PC, SAVE_PC
4551 | call_intern lj_tab_newkey // (lua_State *L, GCtab *t, TValue *k
4552 |. move CARG1, L
4553 | // Returns TValue *.
4554 | ld BASE, L->base
4555 |.if FPU
4556 | b <3 // No 2nd write barrier needed.
4557 |. sdc1 FTMP0, 0(CRET1)
4558 |.else
4559 | ld CARG1, 0(RA)
4560 | b <3 // No 2nd write barrier needed.
4561 |. sd CARG1, 0(CRET1)
4562 |.endif
4563 |
4564 |7: // Possible table write barrier for the value. Skip valiswhite check.
4565 | barrierback TAB:RB, TMP3, TMP0, <3
4566 break;
4567 case BC_TSETB:
4568 | // RA = src*8, RB = table*8, RC = index*8
4569 | decode_RB8a RB, INS
4570 | decode_RB8b RB
4571 | daddu CARG2, BASE, RB
4572 | decode_RDtoRC8 RC, RD
4573 | ld TAB:RB, 0(CARG2)
4574 | daddu RA, BASE, RA
4575 | srl TMP0, RC, 3
4576 | checktab RB, ->vmeta_tsetb
4577 | lw TMP1, TAB:RB->asize
4578 | ld TMP2, TAB:RB->array
4579 | sltu AT, TMP0, TMP1
4580 | beqz AT, ->vmeta_tsetb
4581 |. daddu RC, TMP2, RC
4582 | ld TMP1, 0(RC)
4583 | lbu TMP3, TAB:RB->marked
4584 | beq TMP1, TISNIL, >5
4585 |1:
4586 |. ld CRET1, 0(RA)
4587 | andi AT, TMP3, LJ_GC_BLACK // isblack(table)
4588 | bnez AT, >7
4589 |. sd CRET1, 0(RC)
4590 |2:
4591 | ins_next
4592 |
4593 |5: // Check for __newindex if previous value is nil.
4594 | ld TAB:TMP2, TAB:RB->metatable
4595 | beqz TAB:TMP2, <1 // No metatable: done.
4596 |. nop
4597 | lbu TMP1, TAB:TMP2->nomm
4598 | andi TMP1, TMP1, 1<<MM_newindex
4599 | bnez TMP1, <1 // 'no __newindex' flag set: done.
4600 |. nop
4601 | b ->vmeta_tsetb // Caveat: preserve TMP0 and CARG2!
4602 |. nop
4603 |
4604 |7: // Possible table write barrier for the value. Skip valiswhite check.
4605 | barrierback TAB:RB, TMP3, TMP0, <2
4606 break;
4607 case BC_TSETR:
4608 | // RA = dst*8, RB = table*8, RC = key*8
4609 | decode_RB8a RB, INS
4610 | decode_RB8b RB
4611 | decode_RDtoRC8 RC, RD
4612 | daddu CARG1, BASE, RB
4613 | daddu CARG3, BASE, RC
4614 | ld TAB:CARG2, 0(CARG1)
4615 | lw CARG3, LO(CARG3)
4616 | cleartp TAB:CARG2
4617 | lbu TMP3, TAB:CARG2->marked
4618 | lw TMP0, TAB:CARG2->asize
4619 | ld TMP1, TAB:CARG2->array
4620 | andi AT, TMP3, LJ_GC_BLACK // isblack(table)
4621 | bnez AT, >7
4622 |. daddu RA, BASE, RA
4623 |2:
4624 | sltu AT, CARG3, TMP0
4625 | sll TMP2, CARG3, 3
4626 | beqz AT, ->vmeta_tsetr // In array part?
4627 |. daddu CRET1, TMP1, TMP2
4628 |->BC_TSETR_Z:
4629 | ld CARG1, 0(RA)
4630 | ins_next1
4631 | sd CARG1, 0(CRET1)
4632 | ins_next2
4633 |
4634 |7: // Possible table write barrier for the value. Skip valiswhite check.
4635 | barrierback TAB:CARG2, TMP3, CRET1, <2
4636 break;
4637
4638 case BC_TSETM:
4639 | // RA = base*8 (table at base-1), RD = num_const*8 (start index)
4640 | daddu RA, BASE, RA
4641 |1:
4642 | daddu TMP3, KBASE, RD
4643 | ld TAB:CARG2, -8(RA) // Guaranteed to be a table.
4644 | addiu TMP0, MULTRES, -8
4645 | lw TMP3, LO(TMP3) // Integer constant is in lo-word.
4646 | beqz TMP0, >4 // Nothing to copy?
4647 |. srl CARG3, TMP0, 3
4648 | cleartp CARG2
4649 | addu CARG3, CARG3, TMP3
4650 | lw TMP2, TAB:CARG2->asize
4651 | sll TMP1, TMP3, 3
4652 | lbu TMP3, TAB:CARG2->marked
4653 | ld CARG1, TAB:CARG2->array
4654 | sltu AT, TMP2, CARG3
4655 | bnez AT, >5
4656 |. daddu TMP2, RA, TMP0
4657 | daddu TMP1, TMP1, CARG1
4658 | andi TMP0, TMP3, LJ_GC_BLACK // isblack(table)
4659 |3: // Copy result slots to table.
4660 | ld CRET1, 0(RA)
4661 | daddiu RA, RA, 8
4662 | sltu AT, RA, TMP2
4663 | sd CRET1, 0(TMP1)
4664 | bnez AT, <3
4665 |. daddiu TMP1, TMP1, 8
4666 | bnez TMP0, >7
4667 |. nop
4668 |4:
4669 | ins_next
4670 |
4671 |5: // Need to resize array part.
4672 | load_got lj_tab_reasize
4673 | sd BASE, L->base
4674 | sd PC, SAVE_PC
4675 | move BASE, RD
4676 | call_intern lj_tab_reasize // (lua_State *L, GCtab *t, int nasize)
4677 |. move CARG1, L
4678 | // Must not reallocate the stack.
4679 | move RD, BASE
4680 | b <1
4681 |. ld BASE, L->base // Reload BASE for lack of a saved register.
4682 |
4683 |7: // Possible table write barrier for any value. Skip valiswhite check.
4684 | barrierback TAB:CARG2, TMP3, TMP0, <4
4685 break;
4686
4687 /* -- Calls and vararg handling ----------------------------------------- */
4688
4689 case BC_CALLM:
4690 | // RA = base*8, (RB = (nresults+1)*8,) RC = extra_nargs*8
4691 | decode_RDtoRC8 NARGS8:RC, RD
4692 | b ->BC_CALL_Z
4693 |. addu NARGS8:RC, NARGS8:RC, MULTRES
4694 break;
4695 case BC_CALL:
4696 | // RA = base*8, (RB = (nresults+1)*8,) RC = (nargs+1)*8
4697 | decode_RDtoRC8 NARGS8:RC, RD
4698 |->BC_CALL_Z:
4699 | move TMP2, BASE
4700 | daddu BASE, BASE, RA
4701 | ld LFUNC:RB, 0(BASE)
4702 | daddiu BASE, BASE, 16
4703 | addiu NARGS8:RC, NARGS8:RC, -8
4704 | checkfunc RB, ->vmeta_call
4705 | ins_call
4706 break;
4707
4708 case BC_CALLMT:
4709 | // RA = base*8, (RB = 0,) RC = extra_nargs*8
4710 | addu NARGS8:RD, NARGS8:RD, MULTRES // BC_CALLT gets RC from RD.
4711 | // Fall through. Assumes BC_CALLT follows.
4712 break;
4713 case BC_CALLT:
4714 | // RA = base*8, (RB = 0,) RC = (nargs+1)*8
4715 | daddu RA, BASE, RA
4716 | ld RB, 0(RA)
4717 | move NARGS8:RC, RD
4718 | ld TMP1, FRAME_PC(BASE)
4719 | daddiu RA, RA, 16
4720 | addiu NARGS8:RC, NARGS8:RC, -8
4721 | checktp CARG3, RB, -LJ_TFUNC, ->vmeta_callt
4722 |->BC_CALLT_Z:
4723 | andi TMP0, TMP1, FRAME_TYPE // Caveat: preserve TMP0 until the 'or'.
4724 | lbu TMP3, LFUNC:CARG3->ffid
4725 | bnez TMP0, >7
4726 |. xori TMP2, TMP1, FRAME_VARG
4727 |1:
4728 | sd RB, FRAME_FUNC(BASE) // Copy function down, but keep PC.
4729 | sltiu AT, TMP3, 2 // (> FF_C) Calling a fast function?
4730 | move TMP2, BASE
4731 | move RB, CARG3
4732 | beqz NARGS8:RC, >3
4733 |. move TMP3, NARGS8:RC
4734 |2:
4735 | ld CRET1, 0(RA)
4736 | daddiu RA, RA, 8
4737 | addiu TMP3, TMP3, -8
4738 | sd CRET1, 0(TMP2)
4739 | bnez TMP3, <2
4740 |. daddiu TMP2, TMP2, 8
4741 |3:
4742 | or TMP0, TMP0, AT
4743 | beqz TMP0, >5
4744 |. nop
4745 |4:
4746 | ins_callt
4747 |
4748 |5: // Tailcall to a fast function with a Lua frame below.
4749 | lw INS, -4(TMP1)
4750 | decode_RA8a RA, INS
4751 | decode_RA8b RA
4752 | dsubu TMP1, BASE, RA
4753 | ld TMP1, -32(TMP1)
4754 | cleartp LFUNC:TMP1
4755 | ld TMP1, LFUNC:TMP1->pc
4756 | b <4
4757 |. ld KBASE, PC2PROTO(k)(TMP1) // Need to prepare KBASE.
4758 |
4759 |7: // Tailcall from a vararg function.
4760 | andi AT, TMP2, FRAME_TYPEP
4761 | bnez AT, <1 // Vararg frame below?
4762 |. dsubu TMP2, BASE, TMP2 // Relocate BASE down.
4763 | move BASE, TMP2
4764 | ld TMP1, FRAME_PC(TMP2)
4765 | b <1
4766 |. andi TMP0, TMP1, FRAME_TYPE
4767 break;
4768
4769 case BC_ITERC:
4770 | // RA = base*8, (RB = (nresults+1)*8, RC = (nargs+1)*8 ((2+1)*8))
4771 | move TMP2, BASE // Save old BASE fir vmeta_call.
4772 | daddu BASE, BASE, RA
4773 | ld RB, -24(BASE)
4774 | ld CARG1, -16(BASE)
4775 | ld CARG2, -8(BASE)
4776 | li NARGS8:RC, 16 // Iterators get 2 arguments.
4777 | sd RB, 0(BASE) // Copy callable.
4778 | sd CARG1, 16(BASE) // Copy state.
4779 | sd CARG2, 24(BASE) // Copy control var.
4780 | daddiu BASE, BASE, 16
4781 | checkfunc RB, ->vmeta_call
4782 | ins_call
4783 break;
4784
4785 case BC_ITERN:
4786 |.if JIT and ENDIAN_LE
4787 | hotloop
4788 |.endif
4789 |->vm_IITERN:
4790 | // RA = base*8, (RB = (nresults+1)*8, RC = (nargs+1)*8 (2+1)*8)
4791 | daddu RA, BASE, RA
4792 | ld TAB:RB, -16(RA)
4793 | lw RC, -8+LO(RA) // Get index from control var.
4794 | cleartp TAB:RB
4795 | daddiu PC, PC, 4
4796 | lw TMP0, TAB:RB->asize
4797 | ld TMP1, TAB:RB->array
4798 | dsll CARG3, TISNUM, 47
4799 |1: // Traverse array part.
4800 | sltu AT, RC, TMP0
4801 | beqz AT, >5 // Index points after array part?
4802 |. sll TMP3, RC, 3
4803 | daddu TMP3, TMP1, TMP3
4804 | ld CARG1, 0(TMP3)
4805 | lhu RD, -4+OFS_RD(PC)
4806 | or TMP2, RC, CARG3
4807 | beq CARG1, TISNIL, <1 // Skip holes in array part.
4808 |. addiu RC, RC, 1
4809 | sd TMP2, 0(RA)
4810 | sd CARG1, 8(RA)
4811 | lui TMP3, (-(BCBIAS_J*4 >> 16) & 65535)
4812 | decode_RD4b RD
4813 | daddu RD, RD, TMP3
4814 | sw RC, -8+LO(RA) // Update control var.
4815 | daddu PC, PC, RD
4816 |3:
4817 | ins_next
4818 |
4819 |5: // Traverse hash part.
4820 | lw TMP1, TAB:RB->hmask
4821 | subu RC, RC, TMP0
4822 | ld TMP2, TAB:RB->node
4823 |6:
4824 | sltu AT, TMP1, RC // End of iteration? Branch to ITERL+1.
4825 | bnez AT, <3
4826 |. sll TMP3, RC, 5
4827 | sll RB, RC, 3
4828 | subu TMP3, TMP3, RB
4829 | daddu NODE:TMP3, TMP3, TMP2
4830 | ld CARG1, 0(NODE:TMP3)
4831 | lhu RD, -4+OFS_RD(PC)
4832 | beq CARG1, TISNIL, <6 // Skip holes in hash part.
4833 |. addiu RC, RC, 1
4834 | ld CARG2, NODE:TMP3->key
4835 | lui TMP3, (-(BCBIAS_J*4 >> 16) & 65535)
4836 | sd CARG1, 8(RA)
4837 | addu RC, RC, TMP0
4838 | decode_RD4b RD
4839 | addu RD, RD, TMP3
4840 | sd CARG2, 0(RA)
4841 | daddu PC, PC, RD
4842 | b <3
4843 |. sw RC, -8+LO(RA) // Update control var.
4844 break;
4845
4846 case BC_ISNEXT:
4847 | // RA = base*8, RD = target (points to ITERN)
4848 | daddu RA, BASE, RA
4849 | srl TMP0, RD, 1
4850 | ld CFUNC:CARG1, -24(RA)
4851 | daddu TMP0, PC, TMP0
4852 | ld CARG2, -16(RA)
4853 | ld CARG3, -8(RA)
4854 | lui TMP2, (-(BCBIAS_J*4 >> 16) & 65535)
4855 | checkfunc CFUNC:CARG1, >5
4856 | gettp CARG2, CARG2
4857 | daddiu CARG2, CARG2, -LJ_TTAB
4858 | lbu TMP1, CFUNC:CARG1->ffid
4859 | daddiu CARG3, CARG3, -LJ_TNIL
4860 | or AT, CARG2, CARG3
4861 | daddiu TMP1, TMP1, -FF_next_N
4862 | or AT, AT, TMP1
4863 | bnez AT, >5
4864 |. lui TMP1, (LJ_KEYINDEX >> 16)
4865 | daddu PC, TMP0, TMP2
4866 | ori TMP1, TMP1, (LJ_KEYINDEX & 0xffff)
4867 | dsll TMP1, TMP1, 32
4868 | sd TMP1, -8(RA)
4869 |1:
4870 | ins_next
4871 |5: // Despecialize bytecode if any of the checks fail.
4872 | li TMP3, BC_JMP
4873 | li TMP1, BC_ITERC
4874 | sb TMP3, -4+OFS_OP(PC)
4875 | daddu PC, TMP0, TMP2
4876 |.if JIT
4877 | lb TMP0, OFS_OP(PC)
4878 | li AT, BC_ITERN
4879 | bne TMP0, AT, >6
4880 |. lhu TMP2, OFS_RD(PC)
4881 |.endif
4882 | b <1
4883 |. sb TMP1, OFS_OP(PC)
4884 |.if JIT
4885 |6: // Unpatch JLOOP.
4886 | ld TMP0, DISPATCH_J(trace)(DISPATCH)
4887 | sll TMP2, TMP2, 3
4888 | daddu TMP0, TMP0, TMP2
4889 | ld TRACE:TMP2, 0(TMP0)
4890 | lw TMP0, TRACE:TMP2->startins
4891 | li AT, -256
4892 | and TMP0, TMP0, AT
4893 | or TMP0, TMP0, TMP1
4894 | b <1
4895 |. sw TMP0, 0(PC)
4896 |.endif
4897 break;
4898
4899 case BC_VARG:
4900 | // RA = base*8, RB = (nresults+1)*8, RC = numparams*8
4901 | ld TMP0, FRAME_PC(BASE)
4902 | decode_RDtoRC8 RC, RD
4903 | decode_RB8a RB, INS
4904 | daddu RC, BASE, RC
4905 | decode_RB8b RB
4906 | daddu RA, BASE, RA
4907 | daddiu RC, RC, FRAME_VARG
4908 | daddu TMP2, RA, RB
4909 | daddiu TMP3, BASE, -16 // TMP3 = vtop
4910 | dsubu RC, RC, TMP0 // RC = vbase
4911 | // Note: RC may now be even _above_ BASE if nargs was < numparams.
4912 | beqz RB, >5 // Copy all varargs?
4913 |. dsubu TMP1, TMP3, RC
4914 | daddiu TMP2, TMP2, -16
4915 |1: // Copy vararg slots to destination slots.
4916 | ld CARG1, 0(RC)
4917 | sltu AT, RC, TMP3
4918 | daddiu RC, RC, 8
4919 |.if MIPSR6
4920 | selnez CARG1, CARG1, AT
4921 | seleqz AT, TISNIL, AT
4922 | or CARG1, CARG1, AT
4923 |.else
4924 | movz CARG1, TISNIL, AT
4925 |.endif
4926 | sd CARG1, 0(RA)
4927 | sltu AT, RA, TMP2
4928 | bnez AT, <1
4929 |. daddiu RA, RA, 8
4930 |3:
4931 | ins_next
4932 |
4933 |5: // Copy all varargs.
4934 | ld TMP0, L->maxstack
4935 | blez TMP1, <3 // No vararg slots?
4936 |. li MULTRES, 8 // MULTRES = (0+1)*8
4937 | daddu TMP2, RA, TMP1
4938 | sltu AT, TMP0, TMP2
4939 | bnez AT, >7
4940 |. daddiu MULTRES, TMP1, 8
4941 |6:
4942 | ld CRET1, 0(RC)
4943 | daddiu RC, RC, 8
4944 | sd CRET1, 0(RA)
4945 | sltu AT, RC, TMP3
4946 | bnez AT, <6 // More vararg slots?
4947 |. daddiu RA, RA, 8
4948 | b <3
4949 |. nop
4950 |
4951 |7: // Grow stack for varargs.
4952 | load_got lj_state_growstack
4953 | sd RA, L->top
4954 | dsubu RA, RA, BASE
4955 | sd BASE, L->base
4956 | dsubu BASE, RC, BASE // Need delta, because BASE may change.
4957 | sd PC, SAVE_PC
4958 | srl CARG2, TMP1, 3
4959 | call_intern lj_state_growstack // (lua_State *L, int n)
4960 |. move CARG1, L
4961 | move RC, BASE
4962 | ld BASE, L->base
4963 | daddu RA, BASE, RA
4964 | daddu RC, BASE, RC
4965 | b <6
4966 |. daddiu TMP3, BASE, -16
4967 break;
4968
4969 /* -- Returns ----------------------------------------------------------- */
4970
4971 case BC_RETM:
4972 | // RA = results*8, RD = extra_nresults*8
4973 | addu RD, RD, MULTRES // MULTRES >= 8, so RD >= 8.
4974 | // Fall through. Assumes BC_RET follows.
4975 break;
4976
4977 case BC_RET:
4978 | // RA = results*8, RD = (nresults+1)*8
4979 | ld PC, FRAME_PC(BASE)
4980 | daddu RA, BASE, RA
4981 | move MULTRES, RD
4982 |1:
4983 | andi TMP0, PC, FRAME_TYPE
4984 | bnez TMP0, ->BC_RETV_Z
4985 |. xori TMP1, PC, FRAME_VARG
4986 |
4987 |->BC_RET_Z:
4988 | // BASE = base, RA = resultptr, RD = (nresults+1)*8, PC = return
4989 | lw INS, -4(PC)
4990 | daddiu TMP2, BASE, -16
4991 | daddiu RC, RD, -8
4992 | decode_RA8a TMP0, INS
4993 | decode_RB8a RB, INS
4994 | decode_RA8b TMP0
4995 | decode_RB8b RB
4996 | daddu TMP3, TMP2, RB
4997 | beqz RC, >3
4998 |. dsubu BASE, TMP2, TMP0
4999 |2:
5000 | ld CRET1, 0(RA)
5001 | daddiu RA, RA, 8
5002 | daddiu RC, RC, -8
5003 | sd CRET1, 0(TMP2)
5004 | bnez RC, <2
5005 |. daddiu TMP2, TMP2, 8
5006 |3:
5007 | daddiu TMP3, TMP3, -8
5008 |5:
5009 | sltu AT, TMP2, TMP3
5010 | bnez AT, >6
5011 |. ld LFUNC:TMP1, FRAME_FUNC(BASE)
5012 | ins_next1
5013 | cleartp LFUNC:TMP1
5014 | ld TMP1, LFUNC:TMP1->pc
5015 | ld KBASE, PC2PROTO(k)(TMP1)
5016 | ins_next2
5017 |
5018 |6: // Fill up results with nil.
5019 | sd TISNIL, 0(TMP2)
5020 | b <5
5021 |. daddiu TMP2, TMP2, 8
5022 |
5023 |->BC_RETV_Z: // Non-standard return case.
5024 | andi TMP2, TMP1, FRAME_TYPEP
5025 | bnez TMP2, ->vm_return
5026 |. nop
5027 | // Return from vararg function: relocate BASE down.
5028 | dsubu BASE, BASE, TMP1
5029 | b <1
5030 |. ld PC, FRAME_PC(BASE)
5031 break;
5032
5033 case BC_RET0: case BC_RET1:
5034 | // RA = results*8, RD = (nresults+1)*8
5035 | ld PC, FRAME_PC(BASE)
5036 | daddu RA, BASE, RA
5037 | move MULTRES, RD
5038 | andi TMP0, PC, FRAME_TYPE
5039 | bnez TMP0, ->BC_RETV_Z
5040 |. xori TMP1, PC, FRAME_VARG
5041 | lw INS, -4(PC)
5042 | daddiu TMP2, BASE, -16
5043 if (op == BC_RET1) {
5044 | ld CRET1, 0(RA)
5045 }
5046 | decode_RB8a RB, INS
5047 | decode_RA8a RA, INS
5048 | decode_RB8b RB
5049 | decode_RA8b RA
5050 | dsubu BASE, TMP2, RA
5051 if (op == BC_RET1) {
5052 | sd CRET1, 0(TMP2)
5053 }
5054 |5:
5055 | sltu AT, RD, RB
5056 | bnez AT, >6
5057 |. ld TMP1, FRAME_FUNC(BASE)
5058 | ins_next1
5059 | cleartp LFUNC:TMP1
5060 | ld TMP1, LFUNC:TMP1->pc
5061 | ld KBASE, PC2PROTO(k)(TMP1)
5062 | ins_next2
5063 |
5064 |6: // Fill up results with nil.
5065 | daddiu TMP2, TMP2, 8
5066 | daddiu RD, RD, 8
5067 | b <5
5068 if (op == BC_RET1) {
5069 |. sd TISNIL, 0(TMP2)
5070 } else {
5071 |. sd TISNIL, -8(TMP2)
5072 }
5073 break;
5074
5075 /* -- Loops and branches ------------------------------------------------ */
5076
5077 case BC_FORL:
5078 |.if JIT
5079 | hotloop
5080 |.endif
5081 | // Fall through. Assumes BC_IFORL follows.
5082 break;
5083
5084 case BC_JFORI:
5085 case BC_JFORL:
5086 #if !LJ_HASJIT
5087 break;
5088 #endif
5089 case BC_FORI:
5090 case BC_IFORL:
5091 | // RA = base*8, RD = target (after end of loop or start of loop)
5092 vk = (op == BC_IFORL || op == BC_JFORL);
5093 | daddu RA, BASE, RA
5094 | ld CARG1, FORL_IDX*8(RA) // IDX CARG1 - CARG3 type
5095 | gettp CARG3, CARG1
5096 if (op != BC_JFORL) {
5097 | srl RD, RD, 1
5098 | lui TMP2, (-(BCBIAS_J*4 >> 16) & 65535)
5099 | daddu TMP2, RD, TMP2
5100 }
5101 if (!vk) {
5102 | ld CARG2, FORL_STOP*8(RA) // STOP CARG2 - CARG4 type
5103 | ld CRET1, FORL_STEP*8(RA) // STEP CRET1 - CRET2 type
5104 | gettp CARG4, CARG2
5105 | bne CARG3, TISNUM, >5
5106 |. gettp CRET2, CRET1
5107 | bne CARG4, TISNUM, ->vmeta_for
5108 |. sextw CARG3, CARG1
5109 | bne CRET2, TISNUM, ->vmeta_for
5110 |. sextw CARG2, CARG2
5111 | dext AT, CRET1, 31, 0
5112 | slt CRET1, CARG2, CARG3
5113 | slt TMP1, CARG3, CARG2
5114 |.if MIPSR6
5115 | selnez TMP1, TMP1, AT
5116 | seleqz CRET1, CRET1, AT
5117 | or CRET1, CRET1, TMP1
5118 |.else
5119 | movn CRET1, TMP1, AT
5120 |.endif
5121 } else {
5122 | bne CARG3, TISNUM, >5
5123 |. ld CARG2, FORL_STEP*8(RA) // STEP CARG2 - CARG4 type
5124 | ld CRET1, FORL_STOP*8(RA) // STOP CRET1 - CRET2 type
5125 | sextw TMP3, CARG1
5126 | sextw CARG2, CARG2
5127 | sextw CRET1, CRET1
5128 | addu CARG1, TMP3, CARG2
5129 | xor TMP0, CARG1, TMP3
5130 | xor TMP1, CARG1, CARG2
5131 | and TMP0, TMP0, TMP1
5132 | slt TMP1, CARG1, CRET1
5133 | slt CRET1, CRET1, CARG1
5134 | slt AT, CARG2, r0
5135 | slt TMP0, TMP0, r0 // ((y^a) & (y^b)) < 0: overflow.
5136 |.if MIPSR6
5137 | selnez TMP1, TMP1, AT
5138 | seleqz CRET1, CRET1, AT
5139 | or CRET1, CRET1, TMP1
5140 |.else
5141 | movn CRET1, TMP1, AT
5142 |.endif
5143 | or CRET1, CRET1, TMP0
5144 | zextw CARG1, CARG1
5145 | settp CARG1, TISNUM
5146 }
5147 |1:
5148 if (op == BC_FORI) {
5149 |.if MIPSR6
5150 | selnez TMP2, TMP2, CRET1
5151 |.else
5152 | movz TMP2, r0, CRET1
5153 |.endif
5154 | daddu PC, PC, TMP2
5155 } else if (op == BC_JFORI) {
5156 | daddu PC, PC, TMP2
5157 | lhu RD, -4+OFS_RD(PC)
5158 } else if (op == BC_IFORL) {
5159 |.if MIPSR6
5160 | seleqz TMP2, TMP2, CRET1
5161 |.else
5162 | movn TMP2, r0, CRET1
5163 |.endif
5164 | daddu PC, PC, TMP2
5165 }
5166 if (vk) {
5167 | sd CARG1, FORL_IDX*8(RA)
5168 }
5169 | ins_next1
5170 | sd CARG1, FORL_EXT*8(RA)
5171 |2:
5172 if (op == BC_JFORI) {
5173 | beqz CRET1, =>BC_JLOOP
5174 |. decode_RD8b RD
5175 } else if (op == BC_JFORL) {
5176 | beqz CRET1, =>BC_JLOOP
5177 }
5178 | ins_next2
5179 |
5180 |5: // FP loop.
5181 |.if FPU
5182 if (!vk) {
5183 | ldc1 f0, FORL_IDX*8(RA)
5184 | ldc1 f2, FORL_STOP*8(RA)
5185 | sltiu TMP0, CARG3, LJ_TISNUM
5186 | sltiu TMP1, CARG4, LJ_TISNUM
5187 | sltiu AT, CRET2, LJ_TISNUM
5188 | ld TMP3, FORL_STEP*8(RA)
5189 | and TMP0, TMP0, TMP1
5190 | and AT, AT, TMP0
5191 | beqz AT, ->vmeta_for
5192 |. slt TMP3, TMP3, r0
5193 |.if MIPSR6
5194 | dmtc1 TMP3, FTMP2
5195 | cmp.lt.d FTMP0, f0, f2
5196 | cmp.lt.d FTMP1, f2, f0
5197 | sel.d FTMP2, FTMP1, FTMP0
5198 | b <1
5199 |. dmfc1 CRET1, FTMP2
5200 |.else
5201 | c.ole.d 0, f0, f2
5202 | c.ole.d 1, f2, f0
5203 | li CRET1, 1
5204 | movt CRET1, r0, 0
5205 | movt AT, r0, 1
5206 | b <1
5207 |. movn CRET1, AT, TMP3
5208 |.endif
5209 } else {
5210 | ldc1 f0, FORL_IDX*8(RA)
5211 | ldc1 f4, FORL_STEP*8(RA)
5212 | ldc1 f2, FORL_STOP*8(RA)
5213 | ld TMP3, FORL_STEP*8(RA)
5214 | add.d f0, f0, f4
5215 |.if MIPSR6
5216 | slt TMP3, TMP3, r0
5217 | dmtc1 TMP3, FTMP2
5218 | cmp.lt.d FTMP0, f0, f2
5219 | cmp.lt.d FTMP1, f2, f0
5220 | sel.d FTMP2, FTMP1, FTMP0
5221 | dmfc1 CRET1, FTMP2
5222 if (op == BC_IFORL) {
5223 | seleqz TMP2, TMP2, CRET1
5224 | daddu PC, PC, TMP2
5225 }
5226 |.else
5227 | c.ole.d 0, f0, f2
5228 | c.ole.d 1, f2, f0
5229 | slt TMP3, TMP3, r0
5230 | li CRET1, 1
5231 | li AT, 1
5232 | movt CRET1, r0, 0
5233 | movt AT, r0, 1
5234 | movn CRET1, AT, TMP3
5235 if (op == BC_IFORL) {
5236 | movn TMP2, r0, CRET1
5237 | daddu PC, PC, TMP2
5238 }
5239 |.endif
5240 | sdc1 f0, FORL_IDX*8(RA)
5241 | ins_next1
5242 | b <2
5243 |. sdc1 f0, FORL_EXT*8(RA)
5244 }
5245 |.else
5246 if (!vk) {
5247 | sltiu TMP0, CARG3, LJ_TISNUM
5248 | sltiu TMP1, CARG4, LJ_TISNUM
5249 | sltiu AT, CRET2, LJ_TISNUM
5250 | and TMP0, TMP0, TMP1
5251 | and AT, AT, TMP0
5252 | beqz AT, ->vmeta_for
5253 |. nop
5254 | bal ->vm_sfcmpolex
5255 |. lw TMP3, FORL_STEP*8+HI(RA)
5256 | b <1
5257 |. nop
5258 } else {
5259 | load_got __adddf3
5260 | call_extern
5261 |. sw TMP2, TMPD
5262 | ld CARG2, FORL_STOP*8(RA)
5263 | move CARG1, CRET1
5264 if ( op == BC_JFORL ) {
5265 | lhu RD, -4+OFS_RD(PC)
5266 | decode_RD8b RD
5267 }
5268 | bal ->vm_sfcmpolex
5269 |. lw TMP3, FORL_STEP*8+HI(RA)
5270 | b <1
5271 |. lw TMP2, TMPD
5272 }
5273 |.endif
5274 break;
5275
5276 case BC_ITERL:
5277 |.if JIT
5278 | hotloop
5279 |.endif
5280 | // Fall through. Assumes BC_IITERL follows.
5281 break;
5282
5283 case BC_JITERL:
5284 #if !LJ_HASJIT
5285 break;
5286 #endif
5287 case BC_IITERL:
5288 | // RA = base*8, RD = target
5289 | daddu RA, BASE, RA
5290 | ld TMP1, 0(RA)
5291 | beq TMP1, TISNIL, >1 // Stop if iterator returned nil.
5292 |. nop
5293 if (op == BC_JITERL) {
5294 | b =>BC_JLOOP
5295 |. sd TMP1, -8(RA)
5296 } else {
5297 | branch_RD // Otherwise save control var + branch.
5298 | sd TMP1, -8(RA)
5299 }
5300 |1:
5301 | ins_next
5302 break;
5303
5304 case BC_LOOP:
5305 | // RA = base*8, RD = target (loop extent)
5306 | // Note: RA/RD is only used by trace recorder to determine scope/extent
5307 | // This opcode does NOT jump, it's only purpose is to detect a hot loop.
5308 |.if JIT
5309 | hotloop
5310 |.endif
5311 | // Fall through. Assumes BC_ILOOP follows.
5312 break;
5313
5314 case BC_ILOOP:
5315 | // RA = base*8, RD = target (loop extent)
5316 | ins_next
5317 break;
5318
5319 case BC_JLOOP:
5320 |.if JIT
5321 | // RA = base*8 (ignored), RD = traceno*8
5322 | ld TMP1, DISPATCH_J(trace)(DISPATCH)
5323 | li AT, 0
5324 | daddu TMP1, TMP1, RD
5325 | // Traces on MIPS don't store the trace number, so use 0.
5326 | sd AT, DISPATCH_GL(vmstate)(DISPATCH)
5327 | ld TRACE:TMP2, 0(TMP1)
5328 | sd BASE, DISPATCH_GL(jit_base)(DISPATCH)
5329 | ld TMP2, TRACE:TMP2->mcode
5330 | sd L, DISPATCH_GL(tmpbuf.L)(DISPATCH)
5331 | jr TMP2
5332 |. daddiu JGL, DISPATCH, GG_DISP2G+32768
5333 |.endif
5334 break;
5335
5336 case BC_JMP:
5337 | // RA = base*8 (only used by trace recorder), RD = target
5338 | branch_RD
5339 | ins_next
5340 break;
5341
5342 /* -- Function headers -------------------------------------------------- */
5343
5344 case BC_FUNCF:
5345 |.if JIT
5346 | hotcall
5347 |.endif
5348 case BC_FUNCV: /* NYI: compiled vararg functions. */
5349 | // Fall through. Assumes BC_IFUNCF/BC_IFUNCV follow.
5350 break;
5351
5352 case BC_JFUNCF:
5353 #if !LJ_HASJIT
5354 break;
5355 #endif
5356 case BC_IFUNCF:
5357 | // BASE = new base, RA = BASE+framesize*8, RB = LFUNC, RC = nargs*8
5358 | ld TMP2, L->maxstack
5359 | lbu TMP1, -4+PC2PROTO(numparams)(PC)
5360 | ld KBASE, -4+PC2PROTO(k)(PC)
5361 | sltu AT, TMP2, RA
5362 | bnez AT, ->vm_growstack_l
5363 |. sll TMP1, TMP1, 3
5364 if (op != BC_JFUNCF) {
5365 | ins_next1
5366 }
5367 |2:
5368 | sltu AT, NARGS8:RC, TMP1 // Check for missing parameters.
5369 | bnez AT, >3
5370 |. daddu AT, BASE, NARGS8:RC
5371 if (op == BC_JFUNCF) {
5372 | decode_RD8a RD, INS
5373 | b =>BC_JLOOP
5374 |. decode_RD8b RD
5375 } else {
5376 | ins_next2
5377 }
5378 |
5379 |3: // Clear missing parameters.
5380 | sd TISNIL, 0(AT)
5381 | b <2
5382 |. addiu NARGS8:RC, NARGS8:RC, 8
5383 break;
5384
5385 case BC_JFUNCV:
5386 #if !LJ_HASJIT
5387 break;
5388 #endif
5389 | NYI // NYI: compiled vararg functions
5390 break; /* NYI: compiled vararg functions. */
5391
5392 case BC_IFUNCV:
5393 | // BASE = new base, RA = BASE+framesize*8, RB = LFUNC, RC = nargs*8
5394 | li TMP0, LJ_TFUNC
5395 | daddu TMP1, BASE, RC
5396 | ld TMP2, L->maxstack
5397 | settp LFUNC:RB, TMP0
5398 | daddu TMP0, RA, RC
5399 | sd LFUNC:RB, 0(TMP1) // Store (tagged) copy of LFUNC.
5400 | daddiu TMP3, RC, 16+FRAME_VARG
5401 | sltu AT, TMP0, TMP2
5402 | ld KBASE, -4+PC2PROTO(k)(PC)
5403 | beqz AT, ->vm_growstack_l
5404 |. sd TMP3, 8(TMP1) // Store delta + FRAME_VARG.
5405 | lbu TMP2, -4+PC2PROTO(numparams)(PC)
5406 | move RA, BASE
5407 | move RC, TMP1
5408 | ins_next1
5409 | beqz TMP2, >3
5410 |. daddiu BASE, TMP1, 16
5411 |1:
5412 | ld TMP0, 0(RA)
5413 | sltu AT, RA, RC // Less args than parameters?
5414 | move CARG1, TMP0
5415 |.if MIPSR6
5416 | selnez TMP0, TMP0, AT
5417 | seleqz TMP3, TISNIL, AT
5418 | or TMP0, TMP0, TMP3
5419 | seleqz TMP3, CARG1, AT
5420 | selnez CARG1, TISNIL, AT
5421 | or CARG1, CARG1, TMP3
5422 |.else
5423 | movz TMP0, TISNIL, AT // Clear missing parameters.
5424 | movn CARG1, TISNIL, AT // Clear old fixarg slot (help the GC).
5425 |.endif
5426 | addiu TMP2, TMP2, -1
5427 | sd TMP0, 16(TMP1)
5428 | daddiu TMP1, TMP1, 8
5429 | sd CARG1, 0(RA)
5430 | bnez TMP2, <1
5431 |. daddiu RA, RA, 8
5432 |3:
5433 | ins_next2
5434 break;
5435
5436 case BC_FUNCC:
5437 case BC_FUNCCW:
5438 | // BASE = new base, RA = BASE+framesize*8, RB = CFUNC, RC = nargs*8
5439 if (op == BC_FUNCC) {
5440 | ld CFUNCADDR, CFUNC:RB->f
5441 } else {
5442 | ld CFUNCADDR, DISPATCH_GL(wrapf)(DISPATCH)
5443 }
5444 | daddu TMP1, RA, NARGS8:RC
5445 | ld TMP2, L->maxstack
5446 | daddu RC, BASE, NARGS8:RC
5447 | sd BASE, L->base
5448 | sltu AT, TMP2, TMP1
5449 | sd RC, L->top
5450 | li_vmstate C
5451 if (op == BC_FUNCCW) {
5452 | ld CARG2, CFUNC:RB->f
5453 }
5454 | bnez AT, ->vm_growstack_c // Need to grow stack.
5455 |. move CARG1, L
5456 | jalr CFUNCADDR // (lua_State *L [, lua_CFunction f])
5457 |. st_vmstate
5458 | // Returns nresults.
5459 | ld BASE, L->base
5460 | sll RD, CRET1, 3
5461 | ld TMP1, L->top
5462 | li_vmstate INTERP
5463 | ld PC, FRAME_PC(BASE) // Fetch PC of caller.
5464 | dsubu RA, TMP1, RD // RA = L->top - nresults*8
5465 | sd L, DISPATCH_GL(cur_L)(DISPATCH)
5466 | b ->vm_returnc
5467 |. st_vmstate
5468 break;
5469
5470 /* ---------------------------------------------------------------------- */
5471
5472 default:
5473 fprintf(stderr, "Error: undefined opcode BC_%s\n", bc_names[op]);
5474 exit(2);
5475 break;
5476 }
5477 }
5478
5479 static int build_backend(BuildCtx *ctx)
5480 {
5481 int op;
5482
5483 dasm_growpc(Dst, BC__MAX);
5484
5485 build_subroutines(ctx);
5486
5487 |.code_op
5488 for (op = 0; op < BC__MAX; op++)
5489 build_ins(ctx, (BCOp)op, op);
5490
5491 return BC__MAX;
5492 }
5493
5494 /* Emit pseudo frame-info for all assembler functions. */
5495 static void emit_asm_debug(BuildCtx *ctx)
5496 {
5497 int fcofs = (int)((uint8_t *)ctx->glob[GLOB_vm_ffi_call] - ctx->code);
5498 int i;
5499 switch (ctx->mode) {
5500 case BUILD_elfasm:
5501 fprintf(ctx->fp, "\t.section .debug_frame,\"\",@progbits\n");
5502 fprintf(ctx->fp,
5503 ".Lframe0:\n"
5504 "\t.4byte .LECIE0-.LSCIE0\n"
5505 ".LSCIE0:\n"
5506 "\t.4byte 0xffffffff\n"
5507 "\t.byte 0x1\n"
5508 "\t.string \"\"\n"
5509 "\t.uleb128 0x1\n"
5510 "\t.sleb128 -4\n"
5511 "\t.byte 31\n"
5512 "\t.byte 0xc\n\t.uleb128 29\n\t.uleb128 0\n"
5513 "\t.align 2\n"
5514 ".LECIE0:\n\n");
5515 fprintf(ctx->fp,
5516 ".LSFDE0:\n"
5517 "\t.4byte .LEFDE0-.LASFDE0\n"
5518 ".LASFDE0:\n"
5519 "\t.4byte .Lframe0\n"
5520 "\t.8byte .Lbegin\n"
5521 "\t.8byte %d\n"
5522 "\t.byte 0xe\n\t.uleb128 %d\n"
5523 "\t.byte 0x9f\n\t.sleb128 2*5\n"
5524 "\t.byte 0x9e\n\t.sleb128 2*6\n",
5525 fcofs, CFRAME_SIZE);
5526 for (i = 23; i >= 16; i--)
5527 fprintf(ctx->fp, "\t.byte %d\n\t.uleb128 %d\n", 0x80+i, 2*(30-i));
5528 #if !LJ_SOFTFP
5529 for (i = 31; i >= 24; i--)
5530 fprintf(ctx->fp, "\t.byte %d\n\t.uleb128 %d\n", 0x80+32+i, 2*(46-i));
5531 #endif
5532 fprintf(ctx->fp,
5533 "\t.align 2\n"
5534 ".LEFDE0:\n\n");
5535 #if LJ_HASFFI
5536 fprintf(ctx->fp,
5537 ".LSFDE1:\n"
5538 "\t.4byte .LEFDE1-.LASFDE1\n"
5539 ".LASFDE1:\n"
5540 "\t.4byte .Lframe0\n"
5541 "\t.4byte lj_vm_ffi_call\n"
5542 "\t.4byte %d\n"
5543 "\t.byte 0x9f\n\t.uleb128 2*1\n"
5544 "\t.byte 0x90\n\t.uleb128 2*2\n"
5545 "\t.byte 0xd\n\t.uleb128 0x10\n"
5546 "\t.align 2\n"
5547 ".LEFDE1:\n\n", (int)ctx->codesz - fcofs);
5548 #endif
5549 #if !LJ_NO_UNWIND
5550 /* NYI */
5551 #endif
5552 break;
5553 default:
5554 break;
5555 }
5556 }
5557