/home/mrjunejune/zenbu: third_party/luajit/src/vm

annotate third_party/luajit/src/vm_x64.dasc @ 279:b3b547563ec7

Add Google connector service and agent wiki Implement the C/Seobeo Google Drive and Gmail connector with encrypted OAuth storage, Zenbu authentication, browser testing, AI tool discovery, chunked HTTP decoding, and Bazel coverage. Consolidate repository guidance into progressive wiki documentation and enforce arena-first allocation for new first-party C code. Co-authored-by: Copilot <[email protected]> Copilot-Session: 84c338fd-0939-4bb3-b7f3-1062eb213e5d

author	MrJuneJune <me@mrjunejune.com>
date	Mon, 17 Aug 2026 22:22:36 -0700
parents	94705b5986b3
children

rev	line source
178 94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1 \|// Low-level VM code for x64 CPUs in LJ_GC64 mode.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2 \|// Bytecode interpreter, fast functions and helper functions.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3 \|// Copyright (C) 2005-2023 Mike Pall. See Copyright Notice in luajit.h
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5 \|.arch x64
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6 \|.section code_op, code_sub
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	7 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	8 \|.actionlist build_actionlist
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	9 \|.globals GLOB_
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	10 \|.globalnames globnames
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	11 \|.externnames extnames
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	12 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	13 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	14 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	15 \|.if WIN
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	16 \|.define X64WIN, 1 // Windows/x64 calling conventions.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	17 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	18 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	19 \|// Fixed register assignments for the interpreter.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	20 \|// This is very fragile and has many dependencies. Caveat emptor.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	21 \|.define BASE, rdx // Not C callee-save, refetched anyway.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	22 \|.if X64WIN
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	23 \|.define KBASE, rdi // Must be C callee-save.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	24 \|.define PC, rsi // Must be C callee-save.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	25 \|.define DISPATCH, rbx // Must be C callee-save.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	26 \|.define KBASEd, edi
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	27 \|.define PCd, esi
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	28 \|.define DISPATCHd, ebx
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	29 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	30 \|.define KBASE, r15 // Must be C callee-save.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	31 \|.define PC, rbx // Must be C callee-save.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	32 \|.define DISPATCH, r14 // Must be C callee-save.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	33 \|.define KBASEd, r15d
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	34 \|.define PCd, ebx
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	35 \|.define DISPATCHd, r14d
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	36 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	37 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	38 \|.define RA, rcx
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	39 \|.define RAd, ecx
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	40 \|.define RAH, ch
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	41 \|.define RAL, cl
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	42 \|.define RB, rbp // Must be rbp (C callee-save).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	43 \|.define RBd, ebp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	44 \|.define RC, rax // Must be rax.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	45 \|.define RCd, eax
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	46 \|.define RCW, ax
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	47 \|.define RCH, ah
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	48 \|.define RCL, al
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	49 \|.define OP, RBd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	50 \|.define RD, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	51 \|.define RDd, RCd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	52 \|.define RDW, RCW
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	53 \|.define RDL, RCL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	54 \|.define TMPR, r10
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	55 \|.define TMPRd, r10d
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	56 \|.define ITYPE, r11
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	57 \|.define ITYPEd, r11d
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	58 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	59 \|.if X64WIN
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	60 \|.define CARG1, rcx // x64/WIN64 C call arguments.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	61 \|.define CARG2, rdx
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	62 \|.define CARG3, r8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	63 \|.define CARG4, r9
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	64 \|.define CARG1d, ecx
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	65 \|.define CARG2d, edx
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	66 \|.define CARG3d, r8d
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	67 \|.define CARG4d, r9d
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	68 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	69 \|.define CARG1, rdi // x64/POSIX C call arguments.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	70 \|.define CARG2, rsi
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	71 \|.define CARG3, rdx
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	72 \|.define CARG4, rcx
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	73 \|.define CARG5, r8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	74 \|.define CARG6, r9
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	75 \|.define CARG1d, edi
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	76 \|.define CARG2d, esi
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	77 \|.define CARG3d, edx
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	78 \|.define CARG4d, ecx
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	79 \|.define CARG5d, r8d
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	80 \|.define CARG6d, r9d
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	81 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	82 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	83 \|// Type definitions. Some of these are only used for documentation.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	84 \|.type L, lua_State
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	85 \|.type GL, global_State
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	86 \|.type TVALUE, TValue
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	87 \|.type GCOBJ, GCobj
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	88 \|.type STR, GCstr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	89 \|.type TAB, GCtab
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	90 \|.type LFUNC, GCfuncL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	91 \|.type CFUNC, GCfuncC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	92 \|.type PROTO, GCproto
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	93 \|.type UPVAL, GCupval
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	94 \|.type NODE, Node
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	95 \|.type NARGS, int
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	96 \|.type TRACE, GCtrace
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	97 \|.type SBUF, SBuf
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	98 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	99 \|// Stack layout while in interpreter. Must match with lj_frame.h.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	100 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	101 \|.if X64WIN // x64/Windows stack layout
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	102 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	103 \|.define CFRAME_SPACE, aword*5 // Delta for rsp (see <--).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	104 \|.macro saveregs_
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	105 \| push rdi; push rsi; push rbx
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	106 \| sub rsp, CFRAME_SPACE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	107 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	108 \|.macro saveregs
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	109 \| push rbp; saveregs_
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	110 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	111 \|.macro restoreregs
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	112 \| add rsp, CFRAME_SPACE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	113 \| pop rbx; pop rsi; pop rdi; pop rbp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	114 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	115 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	116 \|.define SAVE_CFRAME, aword [rsp+aword*13]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	117 \|.define SAVE_PC, aword [rsp+aword*12]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	118 \|.define SAVE_L, aword [rsp+aword*11]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	119 \|.define SAVE_ERRF, dword [rsp+dword*21]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	120 \|.define SAVE_NRES, dword [rsp+dword*20]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	121 \|//----- 16 byte aligned, ^^^ 32 byte register save area, owned by interpreter
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	122 \|.define SAVE_RET, aword [rsp+aword*9] //<-- rsp entering interpreter.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	123 \|.define SAVE_R4, aword [rsp+aword*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	124 \|.define SAVE_R3, aword [rsp+aword*7]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	125 \|.define SAVE_R2, aword [rsp+aword*6]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	126 \|.define SAVE_R1, aword [rsp+aword*5] //<-- rsp after register saves.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	127 \|.define ARG5, aword [rsp+aword*4]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	128 \|.define CSAVE_4, aword [rsp+aword*3]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	129 \|.define CSAVE_3, aword [rsp+aword*2]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	130 \|.define CSAVE_2, aword [rsp+aword*1]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	131 \|.define CSAVE_1, aword [rsp] //<-- rsp while in interpreter.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	132 \|//----- 16 byte aligned, ^^^ 32 byte register save area, owned by callee
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	133 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	134 \|.define ARG5d, dword [rsp+dword*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	135 \|.define TMP1, ARG5 // TMP1 overlaps ARG5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	136 \|.define TMP1d, ARG5d
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	137 \|.define TMP1hi, dword [rsp+dword*9]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	138 \|.define MULTRES, TMP1d // MULTRES overlaps TMP1d.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	139 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	140 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	141 \|.else // x64/POSIX stack layout
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	142 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	143 \|.define CFRAME_SPACE, aword*5 // Delta for rsp (see <--).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	144 \|.macro saveregs_
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	145 \| push rbx; push r15; push r14
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	146 \|.if NO_UNWIND
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	147 \| push r13; push r12
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	148 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	149 \| sub rsp, CFRAME_SPACE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	150 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	151 \|.macro saveregs
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	152 \| push rbp; saveregs_
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	153 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	154 \|.macro restoreregs
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	155 \| add rsp, CFRAME_SPACE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	156 \|.if NO_UNWIND
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	157 \| pop r12; pop r13
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	158 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	159 \| pop r14; pop r15; pop rbx; pop rbp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	160 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	161 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	162 \|//----- 16 byte aligned,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	163 \|.if NO_UNWIND
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	164 \|.define SAVE_RET, aword [rsp+aword*11] //<-- rsp entering interpreter.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	165 \|.define SAVE_R4, aword [rsp+aword*10]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	166 \|.define SAVE_R3, aword [rsp+aword*9]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	167 \|.define SAVE_R2, aword [rsp+aword*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	168 \|.define SAVE_R1, aword [rsp+aword*7]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	169 \|.define SAVE_RU2, aword [rsp+aword*6]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	170 \|.define SAVE_RU1, aword [rsp+aword*5] //<-- rsp after register saves.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	171 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	172 \|.define SAVE_RET, aword [rsp+aword*9] //<-- rsp entering interpreter.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	173 \|.define SAVE_R4, aword [rsp+aword*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	174 \|.define SAVE_R3, aword [rsp+aword*7]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	175 \|.define SAVE_R2, aword [rsp+aword*6]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	176 \|.define SAVE_R1, aword [rsp+aword*5] //<-- rsp after register saves.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	177 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	178 \|.define SAVE_CFRAME, aword [rsp+aword*4]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	179 \|.define SAVE_PC, aword [rsp+aword*3]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	180 \|.define SAVE_L, aword [rsp+aword*2]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	181 \|.define SAVE_ERRF, dword [rsp+dword*3]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	182 \|.define SAVE_NRES, dword [rsp+dword*2]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	183 \|.define TMP1, aword [rsp] //<-- rsp while in interpreter.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	184 \|//----- 16 byte aligned
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	185 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	186 \|.define TMP1d, dword [rsp]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	187 \|.define TMP1hi, dword [rsp+dword*1]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	188 \|.define MULTRES, TMP1d // MULTRES overlaps TMP1d.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	189 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	190 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	191 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	192 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	193 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	194 \|// Instruction headers.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	195 \|.macro ins_A; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	196 \|.macro ins_AD; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	197 \|.macro ins_AJ; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	198 \|.macro ins_ABC; movzx RBd, RCH; movzx RCd, RCL; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	199 \|.macro ins_AB_; movzx RBd, RCH; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	200 \|.macro ins_A_C; movzx RCd, RCL; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	201 \|.macro ins_AND; not RD; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	202 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	203 \|// Instruction decode+dispatch. Carefully tuned (nope, lodsd is not faster).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	204 \|.macro ins_NEXT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	205 \| mov RCd, [PC]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	206 \| movzx RAd, RCH
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	207 \| movzx OP, RCL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	208 \| add PC, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	209 \| shr RCd, 16
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	210 \| jmp aword [DISPATCH+OP*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	211 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	212 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	213 \|// Instruction footer.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	214 \|.if 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	215 \| // Replicated dispatch. Less unpredictable branches, but higher I-Cache use.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	216 \| .define ins_next, ins_NEXT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	217 \| .define ins_next_, ins_NEXT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	218 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	219 \| // Common dispatch. Lower I-Cache use, only one (very) unpredictable branch.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	220 \| // Affects only certain kinds of benchmarks (and only with -j off).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	221 \| // Around 10%-30% slower on Core2, a lot more slower on P4.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	222 \| .macro ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	223 \| jmp ->ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	224 \| .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	225 \| .macro ins_next_
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	226 \| ->ins_next:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	227 \| ins_NEXT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	228 \| .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	229 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	230 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	231 \|// Call decode and dispatch.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	232 \|.macro ins_callt
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	233 \| // BASE = new base, RB = LFUNC, RD = nargs+1, [BASE-8] = PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	234 \| mov PC, LFUNC:RB->pc
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	235 \| mov RAd, [PC]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	236 \| movzx OP, RAL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	237 \| movzx RAd, RAH
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	238 \| add PC, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	239 \| jmp aword [DISPATCH+OP*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	240 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	241 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	242 \|.macro ins_call
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	243 \| // BASE = new base, RB = LFUNC, RD = nargs+1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	244 \| mov [BASE-8], PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	245 \| ins_callt
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	246 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	247 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	248 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	249 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	250 \|// Macros to clear or set tags.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	251 \|.macro cleartp, reg; shl reg, 17; shr reg, 17; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	252 \|.macro settp, reg, tp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	253 \| mov64 ITYPE, ((uint64_t)tp<<47)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	254 \| or reg, ITYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	255 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	256 \|.macro settp, dst, reg, tp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	257 \| mov64 dst, ((uint64_t)tp<<47)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	258 \| or dst, reg
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	259 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	260 \|.macro setint, reg
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	261 \| settp reg, LJ_TISNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	262 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	263 \|.macro setint, dst, reg
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	264 \| settp dst, reg, LJ_TISNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	265 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	266 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	267 \|// Macros to test operand types.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	268 \|.macro checktp_nc, reg, tp, target
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	269 \| mov ITYPE, reg
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	270 \| sar ITYPE, 47
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	271 \| cmp ITYPEd, tp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	272 \| jne target
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	273 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	274 \|.macro checktp, reg, tp, target
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	275 \| mov ITYPE, reg
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	276 \| cleartp reg
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	277 \| sar ITYPE, 47
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	278 \| cmp ITYPEd, tp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	279 \| jne target
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	280 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	281 \|.macro checktptp, src, tp, target
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	282 \| mov ITYPE, src
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	283 \| sar ITYPE, 47
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	284 \| cmp ITYPEd, tp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	285 \| jne target
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	286 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	287 \|.macro checkstr, reg, target; checktp reg, LJ_TSTR, target; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	288 \|.macro checktab, reg, target; checktp reg, LJ_TTAB, target; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	289 \|.macro checkfunc, reg, target; checktp reg, LJ_TFUNC, target; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	290 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	291 \|.macro checknumx, reg, target, jump
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	292 \| mov ITYPE, reg
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	293 \| sar ITYPE, 47
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	294 \| cmp ITYPEd, LJ_TISNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	295 \| jump target
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	296 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	297 \|.macro checkint, reg, target; checknumx reg, target, jne; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	298 \|.macro checkinttp, src, target; checknumx src, target, jne; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	299 \|.macro checknum, reg, target; checknumx reg, target, jae; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	300 \|.macro checknumtp, src, target; checknumx src, target, jae; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	301 \|.macro checknumber, src, target; checknumx src, target, ja; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	302 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	303 \|.macro mov_false, reg; mov64 reg, (int64_t)~((uint64_t)1<<47); .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	304 \|.macro mov_true, reg; mov64 reg, (int64_t)~((uint64_t)2<<47); .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	305 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	306 \|// These operands must be used with movzx.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	307 \|.define PC_OP, byte [PC-4]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	308 \|.define PC_RA, byte [PC-3]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	309 \|.define PC_RB, byte [PC-1]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	310 \|.define PC_RC, byte [PC-2]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	311 \|.define PC_RD, word [PC-2]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	312 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	313 \|.macro branchPC, reg
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	314 \| lea PC, [PC+reg4-BCBIAS_J4]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	315 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	316 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	317 \|// Assumes DISPATCH is relative to GL.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	318 #define DISPATCH_GL(field) (GG_DISP2G + (int)offsetof(global_State, field))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	319 #define DISPATCH_J(field) (GG_DISP2J + (int)offsetof(jit_State, field))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	320 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	321 #define PC2PROTO(field) ((int)offsetof(GCproto, field)-(int)sizeof(GCproto))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	322 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	323 \|// Decrement hashed hotcount and trigger trace recorder if zero.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	324 \|.macro hotloop, reg
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	325 \| mov reg, PCd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	326 \| shr reg, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	327 \| and reg, HOTCOUNT_PCMASK
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	328 \| sub word [DISPATCH+reg+GG_DISP2HOT], HOTCOUNT_LOOP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	329 \| jb ->vm_hotloop
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	330 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	331 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	332 \|.macro hotcall, reg
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	333 \| mov reg, PCd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	334 \| shr reg, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	335 \| and reg, HOTCOUNT_PCMASK
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	336 \| sub word [DISPATCH+reg+GG_DISP2HOT], HOTCOUNT_CALL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	337 \| jb ->vm_hotcall
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	338 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	339 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	340 \|// Set current VM state.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	341 \|.macro set_vmstate, st
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	342 \| mov dword [DISPATCH+DISPATCH_GL(vmstate)], ~LJ_VMST_..st
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	343 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	344 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	345 \|.macro fpop1; fstp st1; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	346 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	347 \|// Synthesize SSE FP constants.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	348 \|.macro sseconst_abs, reg, tmp // Synthesize abs mask.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	349 \| mov64 tmp, U64x(7fffffff,ffffffff); movd reg, tmp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	350 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	351 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	352 \|.macro sseconst_hi, reg, tmp, val // Synthesize hi-32 bit const.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	353 \| mov64 tmp, U64x(val,00000000); movd reg, tmp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	354 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	355 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	356 \|.macro sseconst_sign, reg, tmp // Synthesize sign mask.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	357 \| sseconst_hi reg, tmp, 80000000
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	358 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	359 \|.macro sseconst_1, reg, tmp // Synthesize 1.0.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	360 \| sseconst_hi reg, tmp, 3ff00000
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	361 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	362 \|.macro sseconst_2p52, reg, tmp // Synthesize 2^52.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	363 \| sseconst_hi reg, tmp, 43300000
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	364 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	365 \|.macro sseconst_tobit, reg, tmp // Synthesize 2^52 + 2^51.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	366 \| sseconst_hi reg, tmp, 43380000
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	367 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	368 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	369 \|// Move table write barrier back. Overwrites reg.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	370 \|.macro barrierback, tab, reg
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	371 \| and byte tab->marked, (uint8_t)~LJ_GC_BLACK // black2gray(tab)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	372 \| mov reg, [DISPATCH+DISPATCH_GL(gc.grayagain)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	373 \| mov [DISPATCH+DISPATCH_GL(gc.grayagain)], tab
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	374 \| mov tab->gclist, reg
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	375 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	376 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	377 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	378
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	379 /* Generate subroutines used by opcodes and other parts of the VM. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	380 /* The .code_sub section should be last to help static branch prediction. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	381 static void build_subroutines(BuildCtx *ctx)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	382 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	383 \|.code_sub
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	384 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	385 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	386 \|//-- Return handling ----------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	387 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	388 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	389 \|->vm_returnp:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	390 \| test PCd, FRAME_P
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	391 \| jz ->cont_dispatch
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	392 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	393 \| // Return from pcall or xpcall fast func.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	394 \| and PC, -8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	395 \| sub BASE, PC // Restore caller base.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	396 \| lea RA, [RA+PC-8] // Rebase RA and prepend one result.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	397 \| mov PC, [BASE-8] // Fetch PC of previous frame.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	398 \| // Prepending may overwrite the pcall frame, so do it at the end.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	399 \| mov_true ITYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	400 \| mov aword [BASE+RA], ITYPE // Prepend true to results.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	401 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	402 \|->vm_returnc:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	403 \| add RDd, 1 // RD = nresults+1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	404 \| jz ->vm_unwind_yield
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	405 \| mov MULTRES, RDd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	406 \| test PC, FRAME_TYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	407 \| jz ->BC_RET_Z // Handle regular return to Lua.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	408 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	409 \|->vm_return:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	410 \| // BASE = base, RA = resultofs, RD = nresults+1 (= MULTRES), PC = return
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	411 \| xor PC, FRAME_C
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	412 \| test PCd, FRAME_TYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	413 \| jnz ->vm_returnp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	414 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	415 \| // Return to C.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	416 \| set_vmstate C
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	417 \| and PC, -8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	418 \| sub PC, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	419 \| neg PC // Previous base = BASE - delta.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	420 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	421 \| sub RDd, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	422 \| jz >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	423 \|1: // Move results down.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	424 \| mov RB, [BASE+RA]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	425 \| mov [BASE-16], RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	426 \| add BASE, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	427 \| sub RDd, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	428 \| jnz <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	429 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	430 \| mov L:RB, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	431 \| mov L:RB->base, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	432 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	433 \| mov RDd, MULTRES
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	434 \| mov RAd, SAVE_NRES // RA = wanted nresults+1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	435 \|4:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	436 \| cmp RAd, RDd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	437 \| jne >6 // More/less results wanted?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	438 \|5:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	439 \| sub BASE, 16
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	440 \| mov L:RB->top, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	441 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	442 \|->vm_leave_cp:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	443 \| mov RA, SAVE_CFRAME // Restore previous C frame.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	444 \| mov L:RB->cframe, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	445 \| xor eax, eax // Ok return status for vm_pcall.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	446 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	447 \|->vm_leave_unw:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	448 \| restoreregs
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	449 \| ret
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	450 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	451 \|6:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	452 \| jb >7 // Less results wanted?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	453 \| // More results wanted. Check stack size and fill up results with nil.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	454 \| cmp BASE, L:RB->maxstack
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	455 \| ja >8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	456 \| mov aword [BASE-16], LJ_TNIL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	457 \| add BASE, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	458 \| add RDd, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	459 \| jmp <4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	460 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	461 \|7: // Less results wanted.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	462 \| test RAd, RAd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	463 \| jz <5 // But check for LUA_MULTRET+1.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	464 \| sub RA, RD // Negative result!
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	465 \| lea BASE, [BASE+RA*8] // Correct top.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	466 \| jmp <5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	467 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	468 \|8: // Corner case: need to grow stack for filling up results.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	469 \| // This can happen if:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	470 \| // - A C function grows the stack (a lot).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	471 \| // - The GC shrinks the stack in between.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	472 \| // - A return back from a lua_call() with (high) nresults adjustment.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	473 \| mov L:RB->top, BASE // Save current top held in BASE (yes).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	474 \| mov MULTRES, RDd // Need to fill only remainder with nil.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	475 \| mov CARG2d, RAd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	476 \| mov CARG1, L:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	477 \| call extern lj_state_growstack // (lua_State *L, int n)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	478 \| mov BASE, L:RB->top // Need the (realloced) L->top in BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	479 \| jmp <3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	480 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	481 \|->vm_unwind_yield:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	482 \| mov al, LUA_YIELD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	483 \| jmp ->vm_unwind_c_eh
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	484 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	485 \|->vm_unwind_c: // Unwind C stack, return from vm_pcall.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	486 \| // (void *cframe, int errcode)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	487 \| mov eax, CARG2d // Error return status for vm_pcall.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	488 \| mov rsp, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	489 \|->vm_unwind_c_eh: // Landing pad for external unwinder.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	490 \| mov L:RB, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	491 \| mov GL:RB, L:RB->glref
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	492 \| mov dword GL:RB->vmstate, ~LJ_VMST_C
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	493 \| jmp ->vm_leave_unw
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	494 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	495 \|->vm_unwind_rethrow:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	496 \|.if not X64WIN
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	497 \| mov CARG1, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	498 \| mov CARG2d, eax
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	499 \| restoreregs
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	500 \| jmp extern lj_err_throw // (lua_State *L, int errcode)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	501 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	502 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	503 \|->vm_unwind_ff: // Unwind C stack, return from ff pcall.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	504 \| // (void *cframe)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	505 \| and CARG1, CFRAME_RAWMASK
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	506 \| mov rsp, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	507 \|->vm_unwind_ff_eh: // Landing pad for external unwinder.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	508 \| mov L:RB, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	509 \| mov RDd, 1+1 // Really 1+2 results, incr. later.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	510 \| mov BASE, L:RB->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	511 \| mov DISPATCH, L:RB->glref // Setup pointer to dispatch table.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	512 \| add DISPATCH, GG_G2DISP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	513 \| mov PC, [BASE-8] // Fetch PC of previous frame.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	514 \| mov_false RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	515 \| mov RB, [BASE]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	516 \| mov [BASE-16], RA // Prepend false to error message.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	517 \| mov [BASE-8], RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	518 \| mov RA, -16 // Results start at BASE+RA = BASE-16.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	519 \| set_vmstate INTERP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	520 \| jmp ->vm_returnc // Increments RD/MULTRES and returns.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	521 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	522 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	523 \|//-- Grow stack for calls -----------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	524 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	525 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	526 \|->vm_growstack_c: // Grow stack for C function.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	527 \| mov CARG2d, LUA_MINSTACK
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	528 \| jmp >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	529 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	530 \|->vm_growstack_v: // Grow stack for vararg Lua function.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	531 \| sub RD, 16 // LJ_FR2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	532 \| jmp >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	533 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	534 \|->vm_growstack_f: // Grow stack for fixarg Lua function.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	535 \| // BASE = new base, RD = nargs+1, RB = L, PC = first PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	536 \| lea RD, [BASE+NARGS:RD*8-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	537 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	538 \| movzx RAd, byte [PC-4+PC2PROTO(framesize)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	539 \| add PC, 4 // Must point after first instruction.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	540 \| mov L:RB->base, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	541 \| mov L:RB->top, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	542 \| mov SAVE_PC, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	543 \| mov CARG2, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	544 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	545 \| // RB = L, L->base = new base, L->top = top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	546 \| mov CARG1, L:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	547 \| call extern lj_state_growstack // (lua_State *L, int n)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	548 \| mov BASE, L:RB->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	549 \| mov RD, L:RB->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	550 \| mov LFUNC:RB, [BASE-16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	551 \| cleartp LFUNC:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	552 \| sub RD, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	553 \| shr RDd, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	554 \| add NARGS:RDd, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	555 \| // BASE = new base, RB = LFUNC, RD = nargs+1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	556 \| ins_callt // Just retry the call.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	557 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	558 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	559 \|//-- Entry points into the assembler VM ---------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	560 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	561 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	562 \|->vm_resume: // Setup C frame and resume thread.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	563 \| // (lua_State L, TValue base, int nres1 = 0, ptrdiff_t ef = 0)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	564 \| saveregs
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	565 \| mov L:RB, CARG1 // Caveat: CARG1 may be RA.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	566 \| mov SAVE_L, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	567 \| mov RA, CARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	568 \| mov PCd, FRAME_CP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	569 \| xor RDd, RDd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	570 \| lea KBASE, [esp+CFRAME_RESUME]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	571 \| mov DISPATCH, L:RB->glref // Setup pointer to dispatch table.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	572 \| add DISPATCH, GG_G2DISP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	573 \| mov SAVE_PC, RD // Any value outside of bytecode is ok.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	574 \| mov SAVE_CFRAME, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	575 \| mov SAVE_NRES, RDd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	576 \| mov SAVE_ERRF, RDd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	577 \| mov L:RB->cframe, KBASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	578 \| cmp byte L:RB->status, RDL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	579 \| je >2 // Initial resume (like a call).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	580 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	581 \| // Resume after yield (like a return).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	582 \| mov [DISPATCH+DISPATCH_GL(cur_L)], L:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	583 \| set_vmstate INTERP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	584 \| mov byte L:RB->status, RDL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	585 \| mov BASE, L:RB->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	586 \| mov RD, L:RB->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	587 \| sub RD, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	588 \| shr RDd, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	589 \| add RDd, 1 // RD = nresults+1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	590 \| sub RA, BASE // RA = resultofs
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	591 \| mov PC, [BASE-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	592 \| mov MULTRES, RDd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	593 \| test PCd, FRAME_TYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	594 \| jz ->BC_RET_Z
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	595 \| jmp ->vm_return
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	596 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	597 \|->vm_pcall: // Setup protected C frame and enter VM.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	598 \| // (lua_State L, TValue base, int nres1, ptrdiff_t ef)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	599 \| saveregs
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	600 \| mov PCd, FRAME_CP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	601 \| mov SAVE_ERRF, CARG4d
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	602 \| jmp >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	603 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	604 \|->vm_call: // Setup C frame and enter VM.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	605 \| // (lua_State L, TValue base, int nres1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	606 \| saveregs
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	607 \| mov PCd, FRAME_C
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	608 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	609 \|1: // Entry point for vm_pcall above (PC = ftype).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	610 \| mov SAVE_NRES, CARG3d
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	611 \| mov L:RB, CARG1 // Caveat: CARG1 may be RA.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	612 \| mov SAVE_L, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	613 \| mov RA, CARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	614 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	615 \| mov DISPATCH, L:RB->glref // Setup pointer to dispatch table.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	616 \| mov KBASE, L:RB->cframe // Add our C frame to cframe chain.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	617 \| mov SAVE_CFRAME, KBASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	618 \| mov SAVE_PC, L:RB // Any value outside of bytecode is ok.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	619 \| add DISPATCH, GG_G2DISP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	620 \| mov L:RB->cframe, rsp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	621 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	622 \|2: // Entry point for vm_resume/vm_cpcall (RA = base, RB = L, PC = ftype).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	623 \| mov [DISPATCH+DISPATCH_GL(cur_L)], L:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	624 \| set_vmstate INTERP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	625 \| mov BASE, L:RB->base // BASE = old base (used in vmeta_call).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	626 \| add PC, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	627 \| sub PC, BASE // PC = frame delta + frame type
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	628 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	629 \| mov RD, L:RB->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	630 \| sub RD, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	631 \| shr NARGS:RDd, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	632 \| add NARGS:RDd, 1 // RD = nargs+1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	633 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	634 \|->vm_call_dispatch:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	635 \| mov LFUNC:RB, [RA-16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	636 \| checkfunc LFUNC:RB, ->vmeta_call // Ensure KBASE defined and != BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	637 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	638 \|->vm_call_dispatch_f:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	639 \| mov BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	640 \| ins_call
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	641 \| // BASE = new base, RB = func, RD = nargs+1, PC = caller PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	642 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	643 \|->vm_cpcall: // Setup protected C frame, call C.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	644 \| // (lua_State L, lua_CFunction func, void ud, lua_CPFunction cp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	645 \| saveregs
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	646 \| mov L:RB, CARG1 // Caveat: CARG1 may be RA.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	647 \| mov SAVE_L, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	648 \| mov SAVE_PC, L:RB // Any value outside of bytecode is ok.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	649 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	650 \| mov KBASE, L:RB->stack // Compute -savestack(L, L->top).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	651 \| sub KBASE, L:RB->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	652 \| mov DISPATCH, L:RB->glref // Setup pointer to dispatch table.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	653 \| mov SAVE_ERRF, 0 // No error function.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	654 \| mov SAVE_NRES, KBASEd // Neg. delta means cframe w/o frame.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	655 \| add DISPATCH, GG_G2DISP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	656 \| // Handler may change cframe_nres(L->cframe) or cframe_errfunc(L->cframe).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	657 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	658 \| mov KBASE, L:RB->cframe // Add our C frame to cframe chain.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	659 \| mov SAVE_CFRAME, KBASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	660 \| mov L:RB->cframe, rsp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	661 \| mov [DISPATCH+DISPATCH_GL(cur_L)], L:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	662 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	663 \| call CARG4 // (lua_State L, lua_CFunction func, void ud)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	664 \| // TValue * (new base) or NULL returned in eax (RC).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	665 \| test RC, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	666 \| jz ->vm_leave_cp // No base? Just remove C frame.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	667 \| mov RA, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	668 \| mov PCd, FRAME_CP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	669 \| jmp <2 // Else continue with the call.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	670 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	671 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	672 \|//-- Metamethod handling ------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	673 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	674 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	675 \|//-- Continuation dispatch ----------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	676 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	677 \|->cont_dispatch:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	678 \| // BASE = meta base, RA = resultofs, RD = nresults+1 (also in MULTRES)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	679 \| add RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	680 \| and PC, -8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	681 \| mov RB, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	682 \| sub BASE, PC // Restore caller BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	683 \| mov aword [RA+RD*8-8], LJ_TNIL // Ensure one valid arg.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	684 \| mov RC, RA // ... in [RC]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	685 \| mov PC, [RB-24] // Restore PC from [cont\|PC].
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	686 \| mov RA, qword [RB-32] // May be negative on WIN64 with debug.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	687 \|.if FFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	688 \| cmp RA, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	689 \| jbe >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	690 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	691 \| mov LFUNC:KBASE, [BASE-16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	692 \| cleartp LFUNC:KBASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	693 \| mov KBASE, LFUNC:KBASE->pc
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	694 \| mov KBASE, [KBASE+PC2PROTO(k)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	695 \| // BASE = base, RC = result, RB = meta base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	696 \| jmp RA // Jump to continuation.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	697 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	698 \|.if FFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	699 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	700 \| je ->cont_ffi_callback // cont = 1: return from FFI callback.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	701 \| // cont = 0: Tail call from C function.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	702 \| sub RB, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	703 \| shr RBd, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	704 \| lea RDd, [RBd-3]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	705 \| jmp ->vm_call_tail
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	706 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	707 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	708 \|->cont_cat: // BASE = base, RC = result, RB = mbase
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	709 \| movzx RAd, PC_RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	710 \| sub RB, 32
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	711 \| lea RA, [BASE+RA*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	712 \| sub RA, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	713 \| je ->cont_ra
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	714 \| neg RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	715 \| shr RAd, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	716 \|.if X64WIN
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	717 \| mov CARG3d, RAd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	718 \| mov L:CARG1, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	719 \| mov L:CARG1->base, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	720 \| mov RC, [RC]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	721 \| mov [RB], RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	722 \| mov CARG2, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	723 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	724 \| mov L:CARG1, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	725 \| mov L:CARG1->base, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	726 \| mov CARG3d, RAd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	727 \| mov RA, [RC]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	728 \| mov [RB], RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	729 \| mov CARG2, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	730 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	731 \| jmp ->BC_CAT_Z
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	732 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	733 \|//-- Table indexing metamethods -----------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	734 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	735 \|->vmeta_tgets:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	736 \| settp STR:RC, LJ_TSTR // STR:RC = GCstr *
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	737 \| mov TMP1, STR:RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	738 \| lea RC, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	739 \| cmp PC_OP, BC_GGET
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	740 \| jne >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	741 \| settp TAB:RA, TAB:RB, LJ_TTAB // TAB:RB = GCtab *
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	742 \| lea RB, [DISPATCH+DISPATCH_GL(tmptv)] // Store fn->l.env in g->tmptv.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	743 \| mov [RB], TAB:RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	744 \| jmp >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	745 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	746 \|->vmeta_tgetb:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	747 \| movzx RCd, PC_RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	748 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	749 \| setint RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	750 \| mov TMP1, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	751 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	752 \| cvtsi2sd xmm0, RCd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	753 \| movsd TMP1, xmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	754 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	755 \| lea RC, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	756 \| jmp >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	757 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	758 \|->vmeta_tgetv:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	759 \| movzx RCd, PC_RC // Reload TValue *k from RC.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	760 \| lea RC, [BASE+RC*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	761 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	762 \| movzx RBd, PC_RB // Reload TValue *t from RB.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	763 \| lea RB, [BASE+RB*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	764 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	765 \| mov L:CARG1, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	766 \| mov L:CARG1->base, BASE // Caveat: CARG2/CARG3 may be BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	767 \| mov CARG2, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	768 \| mov CARG3, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	769 \| mov L:RB, L:CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	770 \| mov SAVE_PC, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	771 \| call extern lj_meta_tget // (lua_State L, TValue o, TValue *k)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	772 \| // TValue * (finished) or NULL (metamethod) returned in eax (RC).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	773 \| mov BASE, L:RB->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	774 \| test RC, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	775 \| jz >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	776 \|->cont_ra: // BASE = base, RC = result
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	777 \| movzx RAd, PC_RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	778 \| mov RB, [RC]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	779 \| mov [BASE+RA*8], RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	780 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	781 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	782 \|3: // Call __index metamethod.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	783 \| // BASE = base, L->top = new base, stack = cont/func/t/k
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	784 \| mov RA, L:RB->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	785 \| mov [RA-24], PC // [cont\|PC]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	786 \| lea PC, [RA+FRAME_CONT]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	787 \| sub PC, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	788 \| mov LFUNC:RB, [RA-16] // Guaranteed to be a function here.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	789 \| mov NARGS:RDd, 2+1 // 2 args for func(t, k).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	790 \| cleartp LFUNC:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	791 \| jmp ->vm_call_dispatch_f
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	792 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	793 \|->vmeta_tgetr:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	794 \| mov CARG1, TAB:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	795 \| mov RB, BASE // Save BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	796 \| mov CARG2d, RCd // Caveat: CARG2 == BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	797 \| call extern lj_tab_getinth // (GCtab *t, int32_t key)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	798 \| // cTValue * or NULL returned in eax (RC).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	799 \| movzx RAd, PC_RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	800 \| mov BASE, RB // Restore BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	801 \| test RC, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	802 \| jnz ->BC_TGETR_Z
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	803 \| mov ITYPE, LJ_TNIL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	804 \| jmp ->BC_TGETR2_Z
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	805 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	806 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	807 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	808 \|->vmeta_tsets:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	809 \| settp STR:RC, LJ_TSTR // STR:RC = GCstr *
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	810 \| mov TMP1, STR:RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	811 \| lea RC, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	812 \| cmp PC_OP, BC_GSET
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	813 \| jne >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	814 \| settp TAB:RA, TAB:RB, LJ_TTAB // TAB:RB = GCtab *
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	815 \| lea RB, [DISPATCH+DISPATCH_GL(tmptv)] // Store fn->l.env in g->tmptv.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	816 \| mov [RB], TAB:RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	817 \| jmp >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	818 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	819 \|->vmeta_tsetb:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	820 \| movzx RCd, PC_RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	821 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	822 \| setint RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	823 \| mov TMP1, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	824 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	825 \| cvtsi2sd xmm0, RCd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	826 \| movsd TMP1, xmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	827 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	828 \| lea RC, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	829 \| jmp >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	830 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	831 \|->vmeta_tsetv:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	832 \| movzx RCd, PC_RC // Reload TValue *k from RC.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	833 \| lea RC, [BASE+RC*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	834 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	835 \| movzx RBd, PC_RB // Reload TValue *t from RB.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	836 \| lea RB, [BASE+RB*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	837 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	838 \| mov L:CARG1, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	839 \| mov L:CARG1->base, BASE // Caveat: CARG2/CARG3 may be BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	840 \| mov CARG2, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	841 \| mov CARG3, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	842 \| mov L:RB, L:CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	843 \| mov SAVE_PC, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	844 \| call extern lj_meta_tset // (lua_State L, TValue o, TValue *k)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	845 \| // TValue * (finished) or NULL (metamethod) returned in eax (RC).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	846 \| mov BASE, L:RB->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	847 \| test RC, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	848 \| jz >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	849 \| // NOBARRIER: lj_meta_tset ensures the table is not black.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	850 \| movzx RAd, PC_RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	851 \| mov RB, [BASE+RA*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	852 \| mov [RC], RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	853 \|->cont_nop: // BASE = base, (RC = result)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	854 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	855 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	856 \|3: // Call __newindex metamethod.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	857 \| // BASE = base, L->top = new base, stack = cont/func/t/k/(v)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	858 \| mov RA, L:RB->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	859 \| mov [RA-24], PC // [cont\|PC]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	860 \| movzx RCd, PC_RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	861 \| // Copy value to third argument.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	862 \| mov RB, [BASE+RC*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	863 \| mov [RA+16], RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	864 \| lea PC, [RA+FRAME_CONT]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	865 \| sub PC, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	866 \| mov LFUNC:RB, [RA-16] // Guaranteed to be a function here.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	867 \| mov NARGS:RDd, 3+1 // 3 args for func(t, k, v).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	868 \| cleartp LFUNC:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	869 \| jmp ->vm_call_dispatch_f
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	870 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	871 \|->vmeta_tsetr:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	872 \|.if X64WIN
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	873 \| mov L:CARG1, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	874 \| mov CARG3d, RCd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	875 \| mov L:CARG1->base, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	876 \| xchg CARG2, TAB:RB // Caveat: CARG2 == BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	877 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	878 \| mov L:CARG1, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	879 \| mov CARG2, TAB:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	880 \| mov L:CARG1->base, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	881 \| mov RB, BASE // Save BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	882 \| mov CARG3d, RCd // Caveat: CARG3 == BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	883 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	884 \| mov SAVE_PC, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	885 \| call extern lj_tab_setinth // (lua_State L, GCtab t, int32_t key)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	886 \| // TValue * returned in eax (RC).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	887 \| movzx RAd, PC_RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	888 \| mov BASE, RB // Restore BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	889 \| jmp ->BC_TSETR_Z
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	890 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	891 \|//-- Comparison metamethods ---------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	892 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	893 \|->vmeta_comp:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	894 \| movzx RDd, PC_RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	895 \| movzx RAd, PC_RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	896 \| mov L:RB, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	897 \| mov L:RB->base, BASE // Caveat: CARG2/CARG3 == BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	898 \|.if X64WIN
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	899 \| lea CARG3, [BASE+RD*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	900 \| lea CARG2, [BASE+RA*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	901 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	902 \| lea CARG2, [BASE+RA*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	903 \| lea CARG3, [BASE+RD*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	904 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	905 \| mov CARG1, L:RB // Caveat: CARG1/CARG4 == RA.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	906 \| movzx CARG4d, PC_OP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	907 \| mov SAVE_PC, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	908 \| call extern lj_meta_comp // (lua_State L, TValue o1, *o2, int op)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	909 \| // 0/1 or TValue * (metamethod) returned in eax (RC).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	910 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	911 \| mov BASE, L:RB->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	912 \| cmp RC, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	913 \| ja ->vmeta_binop
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	914 \|4:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	915 \| lea PC, [PC+4]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	916 \| jb >6
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	917 \|5:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	918 \| movzx RDd, PC_RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	919 \| branchPC RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	920 \|6:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	921 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	922 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	923 \|->cont_condt: // BASE = base, RC = result
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	924 \| add PC, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	925 \| mov ITYPE, [RC]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	926 \| sar ITYPE, 47
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	927 \| cmp ITYPEd, LJ_TISTRUECOND // Branch if result is true.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	928 \| jb <5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	929 \| jmp <6
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	930 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	931 \|->cont_condf: // BASE = base, RC = result
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	932 \| mov ITYPE, [RC]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	933 \| sar ITYPE, 47
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	934 \| cmp ITYPEd, LJ_TISTRUECOND // Branch if result is false.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	935 \| jmp <4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	936 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	937 \|->vmeta_equal:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	938 \| cleartp TAB:RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	939 \| sub PC, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	940 \|.if X64WIN
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	941 \| mov CARG3, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	942 \| mov CARG4d, RBd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	943 \| mov L:RB, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	944 \| mov L:RB->base, BASE // Caveat: CARG2 == BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	945 \| mov CARG2, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	946 \| mov CARG1, L:RB // Caveat: CARG1 == RA.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	947 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	948 \| mov CARG2, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	949 \| mov CARG4d, RBd // Caveat: CARG4 == RA.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	950 \| mov L:RB, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	951 \| mov L:RB->base, BASE // Caveat: CARG3 == BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	952 \| mov CARG3, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	953 \| mov CARG1, L:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	954 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	955 \| mov SAVE_PC, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	956 \| call extern lj_meta_equal // (lua_State L, GCobj o1, *o2, int ne)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	957 \| // 0/1 or TValue * (metamethod) returned in eax (RC).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	958 \| jmp <3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	959 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	960 \|->vmeta_equal_cd:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	961 \|.if FFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	962 \| sub PC, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	963 \| mov L:RB, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	964 \| mov L:RB->base, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	965 \| mov CARG1, L:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	966 \| mov CARG2d, dword [PC-4]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	967 \| mov SAVE_PC, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	968 \| call extern lj_meta_equal_cd // (lua_State *L, BCIns ins)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	969 \| // 0/1 or TValue * (metamethod) returned in eax (RC).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	970 \| jmp <3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	971 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	972 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	973 \|->vmeta_istype:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	974 \| mov L:RB, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	975 \| mov L:RB->base, BASE // Caveat: CARG2/CARG3 may be BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	976 \| mov CARG2d, RAd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	977 \| mov CARG3d, RDd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	978 \| mov L:CARG1, L:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	979 \| mov SAVE_PC, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	980 \| call extern lj_meta_istype // (lua_State *L, BCReg ra, BCReg tp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	981 \| mov BASE, L:RB->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	982 \| jmp <6
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	983 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	984 \|//-- Arithmetic metamethods ---------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	985 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	986 \|->vmeta_arith_vno:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	987 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	988 \| movzx RBd, PC_RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	989 \| movzx RCd, PC_RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	990 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	991 \|->vmeta_arith_vn:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	992 \| lea RC, [KBASE+RC*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	993 \| jmp >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	994 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	995 \|->vmeta_arith_nvo:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	996 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	997 \| movzx RBd, PC_RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	998 \| movzx RCd, PC_RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	999 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1000 \|->vmeta_arith_nv:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1001 \| lea TMPR, [KBASE+RC*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1002 \| lea RC, [BASE+RB*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1003 \| mov RB, TMPR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1004 \| jmp >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1005 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1006 \|->vmeta_unm:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1007 \| lea RC, [BASE+RD*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1008 \| mov RB, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1009 \| jmp >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1010 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1011 \|->vmeta_arith_vvo:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1012 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1013 \| movzx RBd, PC_RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1014 \| movzx RCd, PC_RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1015 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1016 \|->vmeta_arith_vv:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1017 \| lea RC, [BASE+RC*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1018 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1019 \| lea RB, [BASE+RB*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1020 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1021 \| lea RA, [BASE+RA*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1022 \|.if X64WIN
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1023 \| mov CARG3, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1024 \| mov CARG4, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1025 \| movzx RCd, PC_OP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1026 \| mov ARG5d, RCd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1027 \| mov L:RB, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1028 \| mov L:RB->base, BASE // Caveat: CARG2 == BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1029 \| mov CARG2, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1030 \| mov CARG1, L:RB // Caveat: CARG1 == RA.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1031 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1032 \| movzx CARG5d, PC_OP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1033 \| mov CARG2, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1034 \| mov CARG4, RC // Caveat: CARG4 == RA.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1035 \| mov L:CARG1, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1036 \| mov L:CARG1->base, BASE // Caveat: CARG3 == BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1037 \| mov CARG3, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1038 \| mov L:RB, L:CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1039 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1040 \| mov SAVE_PC, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1041 \| call extern lj_meta_arith // (lua_State L, TValue ra,rb,rc, BCReg op)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1042 \| // NULL (finished) or TValue * (metamethod) returned in eax (RC).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1043 \| mov BASE, L:RB->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1044 \| test RC, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1045 \| jz ->cont_nop
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1046 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1047 \| // Call metamethod for binary op.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1048 \|->vmeta_binop:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1049 \| // BASE = base, RC = new base, stack = cont/func/o1/o2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1050 \| mov RA, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1051 \| sub RC, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1052 \| mov [RA-24], PC // [cont\|PC]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1053 \| lea PC, [RC+FRAME_CONT]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1054 \| mov NARGS:RDd, 2+1 // 2 args for func(o1, o2).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1055 \| jmp ->vm_call_dispatch
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1056 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1057 \|->vmeta_len:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1058 \| movzx RDd, PC_RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1059 \| mov L:RB, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1060 \| mov L:RB->base, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1061 \| lea CARG2, [BASE+RD*8] // Caveat: CARG2 == BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1062 \| mov L:CARG1, L:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1063 \| mov SAVE_PC, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1064 \| call extern lj_meta_len // (lua_State L, TValue o)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1065 \| // NULL (retry) or TValue * (metamethod) returned in eax (RC).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1066 \| mov BASE, L:RB->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1067 #if LJ_52
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1068 \| test RC, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1069 \| jne ->vmeta_binop // Binop call for compatibility.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1070 \| movzx RDd, PC_RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1071 \| mov TAB:CARG1, [BASE+RD*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1072 \| cleartp TAB:CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1073 \| jmp ->BC_LEN_Z
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1074 #else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1075 \| jmp ->vmeta_binop // Binop call for compatibility.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1076 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1077 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1078 \|//-- Call metamethod ----------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1079 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1080 \|->vmeta_call_ra:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1081 \| lea RA, [BASE+RA*8+16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1082 \|->vmeta_call: // Resolve and call __call metamethod.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1083 \| // BASE = old base, RA = new base, RC = nargs+1, PC = return
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1084 \| mov TMP1d, NARGS:RDd // Save RA, RC for us.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1085 \| mov RB, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1086 \|.if X64WIN
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1087 \| mov L:TMPR, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1088 \| mov L:TMPR->base, BASE // Caveat: CARG2 is BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1089 \| lea CARG2, [RA-16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1090 \| lea CARG3, [RA+NARGS:RD*8-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1091 \| mov CARG1, L:TMPR // Caveat: CARG1 is RA.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1092 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1093 \| mov L:CARG1, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1094 \| mov L:CARG1->base, BASE // Caveat: CARG3 is BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1095 \| lea CARG2, [RA-16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1096 \| lea CARG3, [RA+NARGS:RD*8-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1097 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1098 \| mov SAVE_PC, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1099 \| call extern lj_meta_call // (lua_State L, TValue func, TValue *top)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1100 \| mov RA, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1101 \| mov L:RB, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1102 \| mov BASE, L:RB->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1103 \| mov NARGS:RDd, TMP1d
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1104 \| mov LFUNC:RB, [RA-16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1105 \| add NARGS:RDd, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1106 \| // This is fragile. L->base must not move, KBASE must always be defined.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1107 \| cmp KBASE, BASE // Continue with CALLT if flag set.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1108 \| je ->BC_CALLT_Z
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1109 \| cleartp LFUNC:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1110 \| mov BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1111 \| ins_call // Otherwise call resolved metamethod.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1112 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1113 \|//-- Argument coercion for 'for' statement ------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1114 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1115 \|->vmeta_for:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1116 \| mov L:RB, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1117 \| mov L:RB->base, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1118 \| mov CARG2, RA // Caveat: CARG2 == BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1119 \| mov L:CARG1, L:RB // Caveat: CARG1 == RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1120 \| mov SAVE_PC, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1121 \| call extern lj_meta_for // (lua_State L, TValue base)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1122 \| mov BASE, L:RB->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1123 \| mov RCd, [PC-4]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1124 \| movzx RAd, RCH
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1125 \| movzx OP, RCL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1126 \| shr RCd, 16
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1127 \| jmp aword [DISPATCH+OP*8+GG_DISP2STATIC] // Retry FORI or JFORI.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1128 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1129 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1130 \|//-- Fast functions -----------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1131 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1132 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1133 \|.macro .ffunc, name
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1134 \|->ff_ .. name:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1135 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1136 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1137 \|.macro .ffunc_1, name
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1138 \|->ff_ .. name:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1139 \| cmp NARGS:RDd, 1+1; jb ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1140 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1141 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1142 \|.macro .ffunc_2, name
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1143 \|->ff_ .. name:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1144 \| cmp NARGS:RDd, 2+1; jb ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1145 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1146 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1147 \|.macro .ffunc_n, name, op
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1148 \| .ffunc_1 name
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1149 \| checknumtp [BASE], ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1150 \| op xmm0, qword [BASE]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1151 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1152 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1153 \|.macro .ffunc_n, name
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1154 \| .ffunc_n name, movsd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1155 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1156 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1157 \|.macro .ffunc_nn, name
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1158 \| .ffunc_2 name
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1159 \| checknumtp [BASE], ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1160 \| checknumtp [BASE+8], ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1161 \| movsd xmm0, qword [BASE]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1162 \| movsd xmm1, qword [BASE+8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1163 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1164 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1165 \|// Inlined GC threshold check. Caveat: uses label 1.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1166 \|.macro ffgccheck
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1167 \| mov RB, [DISPATCH+DISPATCH_GL(gc.total)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1168 \| cmp RB, [DISPATCH+DISPATCH_GL(gc.threshold)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1169 \| jb >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1170 \| call ->fff_gcstep
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1171 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1172 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1173 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1174 \|//-- Base library: checks -----------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1175 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1176 \|.ffunc_1 assert
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1177 \| mov ITYPE, [BASE]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1178 \| mov RB, ITYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1179 \| sar ITYPE, 47
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1180 \| cmp ITYPEd, LJ_TISTRUECOND; jae ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1181 \| mov PC, [BASE-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1182 \| mov MULTRES, RDd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1183 \| mov RB, [BASE]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1184 \| mov [BASE-16], RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1185 \| sub RDd, 2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1186 \| jz >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1187 \| mov RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1188 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1189 \| add RA, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1190 \| mov RB, [RA]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1191 \| mov [RA-16], RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1192 \| sub RDd, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1193 \| jnz <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1194 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1195 \| mov RDd, MULTRES
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1196 \| jmp ->fff_res_
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1197 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1198 \|.ffunc_1 type
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1199 \| mov RC, [BASE]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1200 \| sar RC, 47
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1201 \| mov RBd, LJ_TISNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1202 \| cmp RCd, RBd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1203 \| cmovb RCd, RBd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1204 \| not RCd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1205 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1206 \| mov CFUNC:RB, [BASE-16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1207 \| cleartp CFUNC:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1208 \| mov STR:RC, [CFUNC:RB+RC8+((char )(&((GCfuncC *)0)->upvalue))]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1209 \| mov PC, [BASE-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1210 \| settp STR:RC, LJ_TSTR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1211 \| mov [BASE-16], STR:RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1212 \| jmp ->fff_res1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1213 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1214 \|//-- Base library: getters and setters ---------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1215 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1216 \|.ffunc_1 getmetatable
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1217 \| mov TAB:RB, [BASE]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1218 \| mov PC, [BASE-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1219 \| checktab TAB:RB, >6
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1220 \|1: // Field metatable must be at same offset for GCtab and GCudata!
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1221 \| mov TAB:RB, TAB:RB->metatable
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1222 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1223 \| test TAB:RB, TAB:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1224 \| mov aword [BASE-16], LJ_TNIL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1225 \| jz ->fff_res1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1226 \| settp TAB:RC, TAB:RB, LJ_TTAB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1227 \| mov [BASE-16], TAB:RC // Store metatable as default result.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1228 \| mov STR:RC, [DISPATCH+DISPATCH_GL(gcroot)+8*(GCROOT_MMNAME+MM_metatable)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1229 \| mov RAd, TAB:RB->hmask
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1230 \| and RAd, STR:RC->sid
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1231 \| settp STR:RC, LJ_TSTR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1232 \| imul RAd, #NODE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1233 \| add NODE:RA, TAB:RB->node
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1234 \|3: // Rearranged logic, because we expect _not_ to find the key.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1235 \| cmp NODE:RA->key, STR:RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1236 \| je >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1237 \|4:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1238 \| mov NODE:RA, NODE:RA->next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1239 \| test NODE:RA, NODE:RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1240 \| jnz <3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1241 \| jmp ->fff_res1 // Not found, keep default result.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1242 \|5:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1243 \| mov RB, NODE:RA->val
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1244 \| cmp RB, LJ_TNIL; je ->fff_res1 // Ditto for nil value.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1245 \| mov [BASE-16], RB // Return value of mt.__metatable.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1246 \| jmp ->fff_res1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1247 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1248 \|6:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1249 \| cmp ITYPEd, LJ_TUDATA; je <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1250 \| cmp ITYPEd, LJ_TISNUM; ja >7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1251 \| mov ITYPEd, LJ_TISNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1252 \|7:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1253 \| not ITYPEd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1254 \| mov TAB:RB, [DISPATCH+ITYPE*8+DISPATCH_GL(gcroot[GCROOT_BASEMT])]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1255 \| jmp <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1256 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1257 \|.ffunc_2 setmetatable
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1258 \| mov TAB:RB, [BASE]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1259 \| mov TAB:TMPR, TAB:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1260 \| checktab TAB:RB, ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1261 \| // Fast path: no mt for table yet and not clearing the mt.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1262 \| cmp aword TAB:RB->metatable, 0; jne ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1263 \| mov TAB:RA, [BASE+8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1264 \| checktab TAB:RA, ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1265 \| mov TAB:RB->metatable, TAB:RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1266 \| mov PC, [BASE-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1267 \| mov [BASE-16], TAB:TMPR // Return original table.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1268 \| test byte TAB:RB->marked, LJ_GC_BLACK // isblack(table)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1269 \| jz >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1270 \| // Possible write barrier. Table is black, but skip iswhite(mt) check.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1271 \| barrierback TAB:RB, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1272 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1273 \| jmp ->fff_res1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1274 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1275 \|.ffunc_2 rawget
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1276 \|.if X64WIN
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1277 \| mov TAB:RA, [BASE]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1278 \| checktab TAB:RA, ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1279 \| mov RB, BASE // Save BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1280 \| lea CARG3, [BASE+8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1281 \| mov CARG2, TAB:RA // Caveat: CARG2 == BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1282 \| mov CARG1, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1283 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1284 \| mov TAB:CARG2, [BASE]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1285 \| checktab TAB:CARG2, ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1286 \| mov RB, BASE // Save BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1287 \| lea CARG3, [BASE+8] // Caveat: CARG3 == BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1288 \| mov CARG1, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1289 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1290 \| call extern lj_tab_get // (lua_State L, GCtab t, cTValue *key)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1291 \| // cTValue * returned in eax (RD).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1292 \| mov BASE, RB // Restore BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1293 \| // Copy table slot.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1294 \| mov RB, [RD]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1295 \| mov PC, [BASE-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1296 \| mov [BASE-16], RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1297 \| jmp ->fff_res1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1298 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1299 \|//-- Base library: conversions ------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1300 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1301 \|.ffunc tonumber
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1302 \| // Only handles the number case inline (without a base argument).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1303 \| cmp NARGS:RDd, 1+1; jne ->fff_fallback // Exactly one argument.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1304 \| mov RB, [BASE]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1305 \| checknumber RB, ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1306 \| mov PC, [BASE-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1307 \| mov [BASE-16], RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1308 \| jmp ->fff_res1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1309 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1310 \|.ffunc_1 tostring
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1311 \| // Only handles the string or number case inline.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1312 \| mov PC, [BASE-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1313 \| mov STR:RB, [BASE]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1314 \| checktp_nc STR:RB, LJ_TSTR, >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1315 \| // A __tostring method in the string base metatable is ignored.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1316 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1317 \| mov [BASE-16], STR:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1318 \| jmp ->fff_res1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1319 \|3: // Handle numbers inline, unless a number base metatable is present.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1320 \| cmp ITYPEd, LJ_TISNUM; ja ->fff_fallback_1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1321 \| cmp aword [DISPATCH+DISPATCH_GL(gcroot[GCROOT_BASEMT_NUM])], 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1322 \| jne ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1323 \| ffgccheck // Caveat: uses label 1.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1324 \| mov L:RB, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1325 \| mov L:RB->base, BASE // Add frame since C call can throw.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1326 \| mov SAVE_PC, PC // Redundant (but a defined value).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1327 \|.if not X64WIN
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1328 \| mov CARG2, BASE // Otherwise: CARG2 == BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1329 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1330 \| mov L:CARG1, L:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1331 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1332 \| call extern lj_strfmt_number // (lua_State L, cTValue o)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1333 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1334 \| call extern lj_strfmt_num // (lua_State L, lua_Number np)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1335 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1336 \| // GCstr returned in eax (RD).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1337 \| mov BASE, L:RB->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1338 \| settp STR:RB, RD, LJ_TSTR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1339 \| jmp <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1340 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1341 \|//-- Base library: iterators -------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1342 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1343 \|.ffunc_1 next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1344 \| je >2 // Missing 2nd arg?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1345 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1346 \| mov CARG1, [BASE]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1347 \| mov PC, [BASE-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1348 \| checktab CARG1, ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1349 \| mov RB, BASE // Save BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1350 \|.if X64WIN
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1351 \| lea CARG3, [BASE-16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1352 \| lea CARG2, [BASE+8] // Caveat: CARG2 == BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1353 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1354 \| lea CARG2, [BASE+8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1355 \| lea CARG3, [BASE-16] // Caveat: CARG3 == BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1356 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1357 \| call extern lj_tab_next // (GCtab t, cTValue key, TValue *o)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1358 \| // 1=found, 0=end, -1=error returned in eax (RD).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1359 \| mov BASE, RB // Restore BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1360 \| test RDd, RDd; jg ->fff_res2 // Found key/value.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1361 \| js ->fff_fallback_2 // Invalid key.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1362 \| // End of traversal: return nil.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1363 \| mov aword [BASE-16], LJ_TNIL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1364 \| jmp ->fff_res1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1365 \|2: // Set missing 2nd arg to nil.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1366 \| mov aword [BASE+8], LJ_TNIL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1367 \| jmp <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1368 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1369 \|.ffunc_1 pairs
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1370 \| mov TAB:RB, [BASE]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1371 \| mov TMPR, TAB:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1372 \| checktab TAB:RB, ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1373 #if LJ_52
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1374 \| cmp aword TAB:RB->metatable, 0; jne ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1375 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1376 \| mov CFUNC:RD, [BASE-16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1377 \| cleartp CFUNC:RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1378 \| mov CFUNC:RD, CFUNC:RD->upvalue[0]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1379 \| settp CFUNC:RD, LJ_TFUNC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1380 \| mov PC, [BASE-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1381 \| mov [BASE-16], CFUNC:RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1382 \| mov [BASE-8], TMPR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1383 \| mov aword [BASE], LJ_TNIL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1384 \| mov RDd, 1+3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1385 \| jmp ->fff_res
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1386 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1387 \|.ffunc_2 ipairs_aux
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1388 \| mov TAB:RB, [BASE]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1389 \| checktab TAB:RB, ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1390 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1391 \| mov RA, [BASE+8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1392 \| checkint RA, ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1393 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1394 \| checknumtp [BASE+8], ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1395 \| movsd xmm0, qword [BASE+8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1396 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1397 \| mov PC, [BASE-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1398 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1399 \| add RAd, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1400 \| setint ITYPE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1401 \| mov [BASE-16], ITYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1402 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1403 \| sseconst_1 xmm1, TMPR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1404 \| addsd xmm0, xmm1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1405 \| cvttsd2si RAd, xmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1406 \| movsd qword [BASE-16], xmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1407 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1408 \| cmp RAd, TAB:RB->asize; jae >2 // Not in array part?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1409 \| mov RD, TAB:RB->array
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1410 \| lea RD, [RD+RA*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1411 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1412 \| cmp aword [RD], LJ_TNIL; je ->fff_res0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1413 \| // Copy array slot.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1414 \| mov RB, [RD]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1415 \| mov [BASE-8], RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1416 \|->fff_res2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1417 \| mov RDd, 1+2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1418 \| jmp ->fff_res
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1419 \|2: // Check for empty hash part first. Otherwise call C function.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1420 \| cmp dword TAB:RB->hmask, 0; je ->fff_res0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1421 \|.if X64WIN
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1422 \| mov TMPR, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1423 \| mov CARG2d, RAd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1424 \| mov CARG1, TAB:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1425 \| mov RB, TMPR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1426 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1427 \| mov CARG1, TAB:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1428 \| mov RB, BASE // Save BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1429 \| mov CARG2d, RAd // Caveat: CARG2 == BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1430 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1431 \| call extern lj_tab_getinth // (GCtab *t, int32_t key)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1432 \| // cTValue * or NULL returned in eax (RD).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1433 \| mov BASE, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1434 \| test RD, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1435 \| jnz <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1436 \|->fff_res0:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1437 \| mov RDd, 1+0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1438 \| jmp ->fff_res
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1439 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1440 \|.ffunc_1 ipairs
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1441 \| mov TAB:RB, [BASE]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1442 \| mov TMPR, TAB:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1443 \| checktab TAB:RB, ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1444 #if LJ_52
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1445 \| cmp aword TAB:RB->metatable, 0; jne ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1446 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1447 \| mov CFUNC:RD, [BASE-16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1448 \| cleartp CFUNC:RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1449 \| mov CFUNC:RD, CFUNC:RD->upvalue[0]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1450 \| settp CFUNC:RD, LJ_TFUNC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1451 \| mov PC, [BASE-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1452 \| mov [BASE-16], CFUNC:RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1453 \| mov [BASE-8], TMPR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1454 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1455 \| mov64 RD, ((uint64_t)LJ_TISNUM<<47)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1456 \| mov [BASE], RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1457 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1458 \| mov qword [BASE], 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1459 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1460 \| mov RDd, 1+3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1461 \| jmp ->fff_res
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1462 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1463 \|//-- Base library: catch errors ----------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1464 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1465 \|.ffunc_1 pcall
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1466 \| lea RA, [BASE+16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1467 \| sub NARGS:RDd, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1468 \| mov PCd, 16+FRAME_PCALL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1469 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1470 \| movzx RBd, byte [DISPATCH+DISPATCH_GL(hookmask)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1471 \| shr RB, HOOK_ACTIVE_SHIFT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1472 \| and RB, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1473 \| add PC, RB // Remember active hook before pcall.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1474 \| // Note: this does a (harmless) copy of the function to the PC slot, too.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1475 \| mov KBASE, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1476 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1477 \| mov RB, [RA+KBASE*8-24]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1478 \| mov [RA+KBASE*8-16], RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1479 \| sub KBASE, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1480 \| ja <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1481 \| jmp ->vm_call_dispatch
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1482 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1483 \|.ffunc_2 xpcall
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1484 \| mov LFUNC:RA, [BASE+8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1485 \| checktp_nc LFUNC:RA, LJ_TFUNC, ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1486 \| mov LFUNC:RB, [BASE] // Swap function and traceback.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1487 \| mov [BASE], LFUNC:RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1488 \| mov [BASE+8], LFUNC:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1489 \| lea RA, [BASE+24]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1490 \| sub NARGS:RDd, 2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1491 \| mov PCd, 24+FRAME_PCALL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1492 \| jmp <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1493 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1494 \|//-- Coroutine library --------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1495 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1496 \|.macro coroutine_resume_wrap, resume
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1497 \|.if resume
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1498 \|.ffunc_1 coroutine_resume
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1499 \| mov L:RB, [BASE]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1500 \| cleartp L:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1501 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1502 \|.ffunc coroutine_wrap_aux
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1503 \| mov CFUNC:RB, [BASE-16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1504 \| cleartp CFUNC:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1505 \| mov L:RB, CFUNC:RB->upvalue[0].gcr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1506 \| cleartp L:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1507 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1508 \| mov PC, [BASE-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1509 \| mov SAVE_PC, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1510 \| mov TMP1, L:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1511 \|.if resume
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1512 \| checktptp [BASE], LJ_TTHREAD, ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1513 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1514 \| cmp aword L:RB->cframe, 0; jne ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1515 \| cmp byte L:RB->status, LUA_YIELD; ja ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1516 \| mov RA, L:RB->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1517 \| je >1 // Status != LUA_YIELD (i.e. 0)?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1518 \| cmp RA, L:RB->base // Check for presence of initial func.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1519 \| je ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1520 \| mov PC, [RA-8] // Move initial function up.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1521 \| mov [RA], PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1522 \| add RA, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1523 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1524 \|.if resume
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1525 \| lea PC, [RA+NARGS:RD*8-16] // Check stack space (-1-thread).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1526 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1527 \| lea PC, [RA+NARGS:RD*8-8] // Check stack space (-1).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1528 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1529 \| cmp PC, L:RB->maxstack; ja ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1530 \| mov L:RB->top, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1531 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1532 \| mov L:RB, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1533 \| mov L:RB->base, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1534 \|.if resume
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1535 \| add BASE, 8 // Keep resumed thread in stack for GC.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1536 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1537 \| mov L:RB->top, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1538 \|.if resume
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1539 \| lea RB, [BASE+NARGS:RD*8-24] // RB = end of source for stack move.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1540 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1541 \| lea RB, [BASE+NARGS:RD*8-16] // RB = end of source for stack move.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1542 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1543 \| sub RB, PC // Relative to PC.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1544 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1545 \| cmp PC, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1546 \| je >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1547 \|2: // Move args to coroutine.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1548 \| mov RC, [PC+RB]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1549 \| mov [PC-8], RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1550 \| sub PC, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1551 \| cmp PC, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1552 \| jne <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1553 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1554 \| mov CARG2, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1555 \| mov CARG1, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1556 \| call ->vm_resume // (lua_State L, TValue base, 0, 0)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1557 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1558 \| mov L:RB, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1559 \| mov L:PC, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1560 \| mov BASE, L:RB->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1561 \| mov [DISPATCH+DISPATCH_GL(cur_L)], L:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1562 \| set_vmstate INTERP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1563 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1564 \| cmp eax, LUA_YIELD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1565 \| ja >8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1566 \|4:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1567 \| mov RA, L:PC->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1568 \| mov KBASE, L:PC->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1569 \| mov L:PC->top, RA // Clear coroutine stack.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1570 \| mov PC, KBASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1571 \| sub PC, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1572 \| je >6 // No results?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1573 \| lea RD, [BASE+PC]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1574 \| shr PCd, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1575 \| cmp RD, L:RB->maxstack
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1576 \| ja >9 // Need to grow stack?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1577 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1578 \| mov RB, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1579 \| sub RB, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1580 \|5: // Move results from coroutine.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1581 \| mov RD, [RA]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1582 \| mov [RA+RB], RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1583 \| add RA, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1584 \| cmp RA, KBASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1585 \| jne <5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1586 \|6:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1587 \|.if resume
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1588 \| lea RDd, [PCd+2] // nresults+1 = 1 + true + results.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1589 \| mov_true ITYPE // Prepend true to results.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1590 \| mov [BASE-8], ITYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1591 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1592 \| lea RDd, [PCd+1] // nresults+1 = 1 + results.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1593 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1594 \|7:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1595 \| mov PC, SAVE_PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1596 \| mov MULTRES, RDd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1597 \|.if resume
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1598 \| mov RA, -8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1599 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1600 \| xor RAd, RAd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1601 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1602 \| test PCd, FRAME_TYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1603 \| jz ->BC_RET_Z
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1604 \| jmp ->vm_return
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1605 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1606 \|8: // Coroutine returned with error (at co->top-1).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1607 \|.if resume
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1608 \| mov_false ITYPE // Prepend false to results.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1609 \| mov [BASE-8], ITYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1610 \| mov RA, L:PC->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1611 \| sub RA, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1612 \| mov L:PC->top, RA // Clear error from coroutine stack.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1613 \| // Copy error message.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1614 \| mov RD, [RA]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1615 \| mov [BASE], RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1616 \| mov RDd, 1+2 // nresults+1 = 1 + false + error.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1617 \| jmp <7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1618 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1619 \| mov CARG2, L:PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1620 \| mov CARG1, L:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1621 \| call extern lj_ffh_coroutine_wrap_err // (lua_State L, lua_State co)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1622 \| // Error function does not return.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1623 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1624 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1625 \|9: // Handle stack expansion on return from yield.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1626 \| mov L:RA, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1627 \| mov L:RA->top, KBASE // Undo coroutine stack clearing.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1628 \| mov CARG2, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1629 \| mov CARG1, L:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1630 \| call extern lj_state_growstack // (lua_State *L, int n)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1631 \| mov L:PC, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1632 \| mov BASE, L:RB->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1633 \| jmp <4 // Retry the stack move.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1634 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1635 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1636 \| coroutine_resume_wrap 1 // coroutine.resume
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1637 \| coroutine_resume_wrap 0 // coroutine.wrap
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1638 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1639 \|.ffunc coroutine_yield
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1640 \| mov L:RB, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1641 \| test aword L:RB->cframe, CFRAME_RESUME
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1642 \| jz ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1643 \| mov L:RB->base, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1644 \| lea RD, [BASE+NARGS:RD*8-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1645 \| mov L:RB->top, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1646 \| xor RDd, RDd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1647 \| mov aword L:RB->cframe, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1648 \| mov al, LUA_YIELD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1649 \| mov byte L:RB->status, al
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1650 \| jmp ->vm_leave_unw
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1651 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1652 \|//-- Math library -------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1653 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1654 \| .ffunc_1 math_abs
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1655 \| mov RB, [BASE]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1656 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1657 \| checkint RB, >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1658 \| cmp RBd, 0; jns ->fff_resi
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1659 \| neg RBd; js >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1660 \|->fff_resbit:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1661 \|->fff_resi:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1662 \| setint RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1663 \|->fff_resRB:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1664 \| mov PC, [BASE-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1665 \| mov [BASE-16], RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1666 \| jmp ->fff_res1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1667 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1668 \| mov64 RB, U64x(41e00000,00000000) // 2^31.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1669 \| jmp ->fff_resRB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1670 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1671 \| ja ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1672 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1673 \| checknum RB, ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1674 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1675 \| shl RB, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1676 \| shr RB, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1677 \| mov PC, [BASE-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1678 \| mov [BASE-16], RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1679 \| jmp ->fff_res1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1680 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1681 \|.ffunc_n math_sqrt, sqrtsd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1682 \|->fff_resxmm0:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1683 \| mov PC, [BASE-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1684 \| movsd qword [BASE-16], xmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1685 \| // fallthrough
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1686 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1687 \|->fff_res1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1688 \| mov RDd, 1+1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1689 \|->fff_res:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1690 \| mov MULTRES, RDd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1691 \|->fff_res_:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1692 \| test PCd, FRAME_TYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1693 \| jnz >7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1694 \|5:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1695 \| cmp PC_RB, RDL // More results expected?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1696 \| ja >6
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1697 \| // Adjust BASE. KBASE is assumed to be set for the calling frame.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1698 \| movzx RAd, PC_RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1699 \| neg RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1700 \| lea BASE, [BASE+RA8-16] // base = base - (RA+2)8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1701 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1702 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1703 \|6: // Fill up results with nil.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1704 \| mov aword [BASE+RD*8-24], LJ_TNIL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1705 \| add RD, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1706 \| jmp <5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1707 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1708 \|7: // Non-standard return case.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1709 \| mov RA, -16 // Results start at BASE+RA = BASE-16.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1710 \| jmp ->vm_return
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1711 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1712 \|.macro math_round, func
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1713 \| .ffunc math_ .. func
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1714 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1715 \| mov RB, [BASE]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1716 \| checknumx RB, ->fff_resRB, je
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1717 \| ja ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1718 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1719 \| checknumtp [BASE], ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1720 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1721 \| movsd xmm0, qword [BASE]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1722 \| call ->vm_ .. func .. _sse
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1723 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1724 \| cvttsd2si RBd, xmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1725 \| cmp RBd, 0x80000000
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1726 \| jne ->fff_resi
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1727 \| cvtsi2sd xmm1, RBd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1728 \| ucomisd xmm0, xmm1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1729 \| jp ->fff_resxmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1730 \| je ->fff_resi
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1731 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1732 \| jmp ->fff_resxmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1733 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1734 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1735 \| math_round floor
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1736 \| math_round ceil
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1737 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1738 \|.ffunc math_log
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1739 \| cmp NARGS:RDd, 1+1; jne ->fff_fallback // Exactly one argument.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1740 \| checknumtp [BASE], ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1741 \| movsd xmm0, qword [BASE]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1742 \| mov RB, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1743 \| call extern log
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1744 \| mov BASE, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1745 \| jmp ->fff_resxmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1746 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1747 \|.macro math_extern, func
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1748 \| .ffunc_n math_ .. func
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1749 \| mov RB, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1750 \| call extern func
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1751 \| mov BASE, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1752 \| jmp ->fff_resxmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1753 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1754 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1755 \|.macro math_extern2, func
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1756 \| .ffunc_nn math_ .. func
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1757 \| mov RB, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1758 \| call extern func
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1759 \| mov BASE, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1760 \| jmp ->fff_resxmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1761 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1762 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1763 \| math_extern log10
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1764 \| math_extern exp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1765 \| math_extern sin
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1766 \| math_extern cos
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1767 \| math_extern tan
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1768 \| math_extern asin
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1769 \| math_extern acos
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1770 \| math_extern atan
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1771 \| math_extern sinh
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1772 \| math_extern cosh
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1773 \| math_extern tanh
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1774 \| math_extern2 pow
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1775 \| math_extern2 atan2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1776 \| math_extern2 fmod
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1777 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1778 \|.ffunc_2 math_ldexp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1779 \| checknumtp [BASE], ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1780 \| checknumtp [BASE+8], ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1781 \| fld qword [BASE+8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1782 \| fld qword [BASE]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1783 \| fscale
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1784 \| fpop1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1785 \| mov PC, [BASE-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1786 \| fstp qword [BASE-16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1787 \| jmp ->fff_res1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1788 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1789 \|.ffunc_n math_frexp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1790 \| mov RB, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1791 \|.if X64WIN
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1792 \| lea CARG2, TMP1 // Caveat: CARG2 == BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1793 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1794 \| lea CARG1, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1795 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1796 \| call extern frexp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1797 \| mov BASE, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1798 \| mov RBd, TMP1d
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1799 \| mov PC, [BASE-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1800 \| movsd qword [BASE-16], xmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1801 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1802 \| setint RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1803 \| mov [BASE-8], RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1804 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1805 \| cvtsi2sd xmm1, RBd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1806 \| movsd qword [BASE-8], xmm1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1807 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1808 \| mov RDd, 1+2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1809 \| jmp ->fff_res
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1810 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1811 \|.ffunc_n math_modf
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1812 \| mov RB, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1813 \|.if X64WIN
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1814 \| lea CARG2, [BASE-16] // Caveat: CARG2 == BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1815 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1816 \| lea CARG1, [BASE-16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1817 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1818 \| call extern modf
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1819 \| mov BASE, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1820 \| mov PC, [BASE-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1821 \| movsd qword [BASE-8], xmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1822 \| mov RDd, 1+2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1823 \| jmp ->fff_res
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1824 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1825 \|.macro math_minmax, name, cmovop, sseop
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1826 \| .ffunc_1 name
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1827 \| mov RAd, 2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1828 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1829 \| mov RB, [BASE]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1830 \| checkint RB, >4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1831 \|1: // Handle integers.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1832 \| cmp RAd, RDd; jae ->fff_resRB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1833 \| mov TMPR, [BASE+RA*8-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1834 \| checkint TMPR, >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1835 \| cmp RBd, TMPRd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1836 \| cmovop RB, TMPR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1837 \| add RAd, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1838 \| jmp <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1839 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1840 \| ja ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1841 \| // Convert intermediate result to number and continue below.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1842 \| cvtsi2sd xmm0, RBd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1843 \| jmp >6
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1844 \|4:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1845 \| ja ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1846 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1847 \| checknumtp [BASE], ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1848 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1849 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1850 \| movsd xmm0, qword [BASE]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1851 \|5: // Handle numbers or integers.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1852 \| cmp RAd, RDd; jae ->fff_resxmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1853 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1854 \| mov RB, [BASE+RA*8-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1855 \| checknumx RB, >6, jb
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1856 \| ja ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1857 \| cvtsi2sd xmm1, RBd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1858 \| jmp >7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1859 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1860 \| checknumtp [BASE+RA*8-8], ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1861 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1862 \|6:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1863 \| movsd xmm1, qword [BASE+RA*8-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1864 \|7:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1865 \| sseop xmm0, xmm1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1866 \| add RAd, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1867 \| jmp <5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1868 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1869 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1870 \| math_minmax math_min, cmovg, minsd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1871 \| math_minmax math_max, cmovl, maxsd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1872 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1873 \|//-- String library -----------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1874 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1875 \|.ffunc string_byte // Only handle the 1-arg case here.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1876 \| cmp NARGS:RDd, 1+1; jne ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1877 \| mov STR:RB, [BASE]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1878 \| checkstr STR:RB, ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1879 \| mov PC, [BASE-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1880 \| cmp dword STR:RB->len, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1881 \| jb ->fff_res0 // Return no results for empty string.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1882 \| movzx RBd, byte STR:RB[1]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1883 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1884 \| jmp ->fff_resi
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1885 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1886 \| cvtsi2sd xmm0, RBd; jmp ->fff_resxmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1887 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1888 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1889 \|.ffunc string_char // Only handle the 1-arg case here.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1890 \| ffgccheck
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1891 \| cmp NARGS:RDd, 1+1; jne ->fff_fallback // Exactly 1 arg.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1892 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1893 \| mov RB, [BASE]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1894 \| checkint RB, ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1895 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1896 \| checknumtp [BASE], ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1897 \| cvttsd2si RBd, qword [BASE]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1898 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1899 \| cmp RBd, 255; ja ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1900 \| mov TMP1d, RBd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1901 \| mov TMPRd, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1902 \| lea RD, TMP1 // Points to stack. Little-endian.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1903 \|->fff_newstr:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1904 \| mov L:RB, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1905 \| mov L:RB->base, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1906 \| mov CARG3d, TMPRd // Zero-extended to size_t.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1907 \| mov CARG2, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1908 \| mov CARG1, L:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1909 \| mov SAVE_PC, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1910 \| call extern lj_str_new // (lua_State L, char str, size_t l)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1911 \|->fff_resstr:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1912 \| // GCstr * returned in eax (RD).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1913 \| mov BASE, L:RB->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1914 \| mov PC, [BASE-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1915 \| settp STR:RD, LJ_TSTR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1916 \| mov [BASE-16], STR:RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1917 \| jmp ->fff_res1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1918 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1919 \|.ffunc string_sub
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1920 \| ffgccheck
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1921 \| mov TMPRd, -1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1922 \| cmp NARGS:RDd, 1+2; jb ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1923 \| jna >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1924 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1925 \| mov TMPR, [BASE+16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1926 \| checkint TMPR, ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1927 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1928 \| checknumtp [BASE+16], ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1929 \| cvttsd2si TMPRd, qword [BASE+16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1930 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1931 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1932 \| mov STR:RB, [BASE]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1933 \| checkstr STR:RB, ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1934 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1935 \| mov ITYPE, [BASE+8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1936 \| mov RAd, ITYPEd // Must clear hiword for lea below.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1937 \| sar ITYPE, 47
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1938 \| cmp ITYPEd, LJ_TISNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1939 \| jne ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1940 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1941 \| checknumtp [BASE+8], ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1942 \| cvttsd2si RAd, qword [BASE+8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1943 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1944 \| mov RCd, STR:RB->len
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1945 \| cmp RCd, TMPRd // len < end? (unsigned compare)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1946 \| jb >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1947 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1948 \| test RAd, RAd // start <= 0?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1949 \| jle >7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1950 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1951 \| sub TMPRd, RAd // start > end?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1952 \| jl ->fff_emptystr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1953 \| lea RD, [STR:RB+RAd+#STR-1]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1954 \| add TMPRd, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1955 \|4:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1956 \| jmp ->fff_newstr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1957 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1958 \|5: // Negative end or overflow.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1959 \| jl >6
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1960 \| lea TMPRd, [TMPRd+RCd+1] // end = end+(len+1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1961 \| jmp <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1962 \|6: // Overflow.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1963 \| mov TMPRd, RCd // end = len
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1964 \| jmp <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1965 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1966 \|7: // Negative start or underflow.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1967 \| je >8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1968 \| add RAd, RCd // start = start+(len+1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1969 \| add RAd, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1970 \| jg <3 // start > 0?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1971 \|8: // Underflow.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1972 \| mov RAd, 1 // start = 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1973 \| jmp <3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1974 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1975 \|->fff_emptystr: // Range underflow.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1976 \| xor TMPRd, TMPRd // Zero length. Any ptr in RD is ok.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1977 \| jmp <4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1978 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1979 \|.macro ffstring_op, name
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1980 \| .ffunc_1 string_ .. name
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1981 \| ffgccheck
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1982 \|.if X64WIN
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1983 \| mov STR:TMPR, [BASE]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1984 \| checkstr STR:TMPR, ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1985 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1986 \| mov STR:CARG2, [BASE]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1987 \| checkstr STR:CARG2, ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1988 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1989 \| mov L:RB, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1990 \| lea SBUF:CARG1, [DISPATCH+DISPATCH_GL(tmpbuf)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1991 \| mov L:RB->base, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1992 \|.if X64WIN
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1993 \| mov STR:CARG2, STR:TMPR // Caveat: CARG2 == BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1994 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1995 \| mov RC, SBUF:CARG1->b
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1996 \| mov SBUF:CARG1->L, L:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1997 \| mov SBUF:CARG1->w, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1998 \| mov SAVE_PC, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1999 \| call extern lj_buf_putstr_ .. name
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2000 \| mov CARG1, rax
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2001 \| call extern lj_buf_tostr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2002 \| jmp ->fff_resstr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2003 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2004 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2005 \|ffstring_op reverse
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2006 \|ffstring_op lower
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2007 \|ffstring_op upper
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2008 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2009 \|//-- Bit library --------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2010 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2011 \|.macro .ffunc_bit, name, kind, fdef
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2012 \| fdef name
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2013 \|.if kind == 2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2014 \| sseconst_tobit xmm1, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2015 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2016 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2017 \| mov RB, [BASE]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2018 \| checkint RB, >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2019 \|.if kind > 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2020 \| jmp >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2021 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2022 \| jmp ->fff_resbit
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2023 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2024 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2025 \| ja ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2026 \| movd xmm0, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2027 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2028 \| checknumtp [BASE], ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2029 \| movsd xmm0, qword [BASE]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2030 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2031 \|.if kind < 2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2032 \| sseconst_tobit xmm1, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2033 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2034 \| addsd xmm0, xmm1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2035 \| movd RBd, xmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2036 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2037 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2038 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2039 \|.macro .ffunc_bit, name, kind
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2040 \| .ffunc_bit name, kind, .ffunc_1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2041 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2042 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2043 \|.ffunc_bit bit_tobit, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2044 \| jmp ->fff_resbit
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2045 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2046 \|.macro .ffunc_bit_op, name, ins
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2047 \| .ffunc_bit name, 2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2048 \| mov TMPRd, NARGS:RDd // Save for fallback.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2049 \| lea RD, [BASE+NARGS:RD*8-16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2050 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2051 \| cmp RD, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2052 \| jbe ->fff_resbit
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2053 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2054 \| mov RA, [RD]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2055 \| checkint RA, >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2056 \| ins RBd, RAd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2057 \| sub RD, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2058 \| jmp <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2059 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2060 \| ja ->fff_fallback_bit_op
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2061 \| movd xmm0, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2062 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2063 \| checknumtp [RD], ->fff_fallback_bit_op
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2064 \| movsd xmm0, qword [RD]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2065 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2066 \| addsd xmm0, xmm1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2067 \| movd RAd, xmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2068 \| ins RBd, RAd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2069 \| sub RD, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2070 \| jmp <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2071 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2072 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2073 \|.ffunc_bit_op bit_band, and
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2074 \|.ffunc_bit_op bit_bor, or
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2075 \|.ffunc_bit_op bit_bxor, xor
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2076 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2077 \|.ffunc_bit bit_bswap, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2078 \| bswap RBd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2079 \| jmp ->fff_resbit
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2080 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2081 \|.ffunc_bit bit_bnot, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2082 \| not RBd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2083 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2084 \| jmp ->fff_resbit
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2085 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2086 \|->fff_resbit:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2087 \| cvtsi2sd xmm0, RBd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2088 \| jmp ->fff_resxmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2089 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2090 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2091 \|->fff_fallback_bit_op:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2092 \| mov NARGS:RDd, TMPRd // Restore for fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2093 \| jmp ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2094 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2095 \|.macro .ffunc_bit_sh, name, ins
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2096 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2097 \| .ffunc_bit name, 1, .ffunc_2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2098 \| // Note: no inline conversion from number for 2nd argument!
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2099 \| mov RA, [BASE+8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2100 \| checkint RA, ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2101 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2102 \| .ffunc_nn name
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2103 \| sseconst_tobit xmm2, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2104 \| addsd xmm0, xmm2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2105 \| addsd xmm1, xmm2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2106 \| movd RBd, xmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2107 \| movd RAd, xmm1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2108 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2109 \| ins RBd, cl // Assumes RA is ecx.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2110 \| jmp ->fff_resbit
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2111 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2112 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2113 \|.ffunc_bit_sh bit_lshift, shl
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2114 \|.ffunc_bit_sh bit_rshift, shr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2115 \|.ffunc_bit_sh bit_arshift, sar
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2116 \|.ffunc_bit_sh bit_rol, rol
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2117 \|.ffunc_bit_sh bit_ror, ror
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2118 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2119 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2120 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2121 \|->fff_fallback_2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2122 \| mov NARGS:RDd, 1+2 // Other args are ignored, anyway.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2123 \| jmp ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2124 \|->fff_fallback_1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2125 \| mov NARGS:RDd, 1+1 // Other args are ignored, anyway.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2126 \|->fff_fallback: // Call fast function fallback handler.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2127 \| // BASE = new base, RD = nargs+1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2128 \| mov L:RB, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2129 \| mov PC, [BASE-8] // Fallback may overwrite PC.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2130 \| mov SAVE_PC, PC // Redundant (but a defined value).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2131 \| mov L:RB->base, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2132 \| lea RD, [BASE+NARGS:RD*8-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2133 \| lea RA, [RD+8*LUA_MINSTACK] // Ensure enough space for handler.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2134 \| mov L:RB->top, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2135 \| mov CFUNC:RD, [BASE-16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2136 \| cleartp CFUNC:RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2137 \| cmp RA, L:RB->maxstack
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2138 \| ja >5 // Need to grow stack.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2139 \| mov CARG1, L:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2140 \| call aword CFUNC:RD->f // (lua_State *L)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2141 \| mov BASE, L:RB->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2142 \| // Either throws an error, or recovers and returns -1, 0 or nresults+1.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2143 \| test RDd, RDd; jg ->fff_res // Returned nresults+1?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2144 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2145 \| mov RA, L:RB->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2146 \| sub RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2147 \| shr RAd, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2148 \| test RDd, RDd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2149 \| lea NARGS:RDd, [RAd+1]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2150 \| mov LFUNC:RB, [BASE-16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2151 \| jne ->vm_call_tail // Returned -1?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2152 \| cleartp LFUNC:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2153 \| ins_callt // Returned 0: retry fast path.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2154 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2155 \|// Reconstruct previous base for vmeta_call during tailcall.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2156 \|->vm_call_tail:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2157 \| mov RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2158 \| test PCd, FRAME_TYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2159 \| jnz >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2160 \| movzx RBd, PC_RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2161 \| neg RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2162 \| lea BASE, [BASE+RB8-16] // base = base - (RB+2)8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2163 \| jmp ->vm_call_dispatch // Resolve again for tailcall.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2164 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2165 \| mov RB, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2166 \| and RB, -8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2167 \| sub BASE, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2168 \| jmp ->vm_call_dispatch // Resolve again for tailcall.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2169 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2170 \|5: // Grow stack for fallback handler.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2171 \| mov CARG2d, LUA_MINSTACK
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2172 \| mov CARG1, L:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2173 \| call extern lj_state_growstack // (lua_State *L, int n)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2174 \| mov BASE, L:RB->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2175 \| xor RDd, RDd // Simulate a return 0.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2176 \| jmp <1 // Dumb retry (goes through ff first).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2177 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2178 \|->fff_gcstep: // Call GC step function.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2179 \| // BASE = new base, RD = nargs+1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2180 \| pop RB // Must keep stack at same level.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2181 \| mov TMP1, RB // Save return address
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2182 \| mov L:RB, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2183 \| mov SAVE_PC, PC // Redundant (but a defined value).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2184 \| mov L:RB->base, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2185 \| lea RD, [BASE+NARGS:RD*8-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2186 \| mov CARG1, L:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2187 \| mov L:RB->top, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2188 \| call extern lj_gc_step // (lua_State *L)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2189 \| mov BASE, L:RB->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2190 \| mov RD, L:RB->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2191 \| sub RD, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2192 \| shr RDd, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2193 \| add NARGS:RDd, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2194 \| mov RB, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2195 \| push RB // Restore return address.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2196 \| ret
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2197 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2198 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2199 \|//-- Special dispatch targets -------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2200 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2201 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2202 \|->vm_record: // Dispatch target for recording phase.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2203 \|.if JIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2204 \| movzx RDd, byte [DISPATCH+DISPATCH_GL(hookmask)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2205 \| test RDL, HOOK_VMEVENT // No recording while in vmevent.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2206 \| jnz >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2207 \| // Decrement the hookcount for consistency, but always do the call.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2208 \| test RDL, HOOK_ACTIVE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2209 \| jnz >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2210 \| test RDL, LUA_MASKLINE\|LUA_MASKCOUNT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2211 \| jz >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2212 \| dec dword [DISPATCH+DISPATCH_GL(hookcount)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2213 \| jmp >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2214 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2215 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2216 \|->vm_rethook: // Dispatch target for return hooks.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2217 \| movzx RDd, byte [DISPATCH+DISPATCH_GL(hookmask)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2218 \| test RDL, HOOK_ACTIVE // Hook already active?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2219 \| jnz >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2220 \| jmp >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2221 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2222 \|->vm_inshook: // Dispatch target for instr/line hooks.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2223 \| movzx RDd, byte [DISPATCH+DISPATCH_GL(hookmask)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2224 \| test RDL, HOOK_ACTIVE // Hook already active?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2225 \| jnz >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2226 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2227 \| test RDL, LUA_MASKLINE\|LUA_MASKCOUNT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2228 \| jz >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2229 \| dec dword [DISPATCH+DISPATCH_GL(hookcount)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2230 \| jz >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2231 \| test RDL, LUA_MASKLINE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2232 \| jz >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2233 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2234 \| mov L:RB, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2235 \| mov L:RB->base, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2236 \| mov CARG2, PC // Caveat: CARG2 == BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2237 \| mov CARG1, L:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2238 \| // SAVE_PC must hold the _previous_ PC. The callee updates it with PC.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2239 \| call extern lj_dispatch_ins // (lua_State L, const BCIns pc)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2240 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2241 \| mov BASE, L:RB->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2242 \|4:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2243 \| movzx RAd, PC_RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2244 \|5:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2245 \| movzx OP, PC_OP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2246 \| movzx RDd, PC_RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2247 \| jmp aword [DISPATCH+OP*8+GG_DISP2STATIC] // Re-dispatch to static ins.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2248 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2249 \|->cont_hook: // Continue from hook yield.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2250 \| add PC, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2251 \| mov RA, [RB-40]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2252 \| mov MULTRES, RAd // Restore MULTRES for *M ins.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2253 \| jmp <4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2254 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2255 \|->vm_hotloop: // Hot loop counter underflow.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2256 \|.if JIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2257 \| mov LFUNC:RB, [BASE-16] // Same as curr_topL(L).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2258 \| cleartp LFUNC:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2259 \| mov RB, LFUNC:RB->pc
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2260 \| movzx RDd, byte [RB+PC2PROTO(framesize)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2261 \| lea RD, [BASE+RD*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2262 \| mov L:RB, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2263 \| mov L:RB->base, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2264 \| mov L:RB->top, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2265 \| mov CARG2, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2266 \| lea CARG1, [DISPATCH+GG_DISP2J]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2267 \| mov aword [DISPATCH+DISPATCH_J(L)], L:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2268 \| mov SAVE_PC, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2269 \| call extern lj_trace_hot // (jit_State J, const BCIns pc)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2270 \| jmp <3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2271 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2272 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2273 \|->vm_callhook: // Dispatch target for call hooks.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2274 \| mov SAVE_PC, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2275 \|.if JIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2276 \| jmp >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2277 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2278 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2279 \|->vm_hotcall: // Hot call counter underflow.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2280 \|.if JIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2281 \| mov SAVE_PC, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2282 \| or PC, 1 // Marker for hot call.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2283 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2284 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2285 \| lea RD, [BASE+NARGS:RD*8-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2286 \| mov L:RB, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2287 \| mov L:RB->base, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2288 \| mov L:RB->top, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2289 \| mov CARG2, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2290 \| mov CARG1, L:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2291 \| call extern lj_dispatch_call // (lua_State L, const BCIns pc)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2292 \| // ASMFunction returned in eax/rax (RD).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2293 \| mov SAVE_PC, 0 // Invalidate for subsequent line hook.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2294 \|.if JIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2295 \| and PC, -2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2296 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2297 \| mov BASE, L:RB->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2298 \| mov RA, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2299 \| mov RD, L:RB->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2300 \| sub RD, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2301 \| mov RB, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2302 \| movzx RAd, PC_RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2303 \| shr RDd, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2304 \| add NARGS:RDd, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2305 \| jmp RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2306 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2307 \|->cont_stitch: // Trace stitching.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2308 \|.if JIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2309 \| // BASE = base, RC = result, RB = mbase
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2310 \| mov TRACE:ITYPE, [RB-40] // Save previous trace.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2311 \| cleartp TRACE:ITYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2312 \| mov TMPRd, MULTRES
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2313 \| movzx RAd, PC_RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2314 \| lea RA, [BASE+RA*8] // Call base.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2315 \| sub TMPRd, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2316 \| jz >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2317 \|1: // Move results down.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2318 \| mov RB, [RC]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2319 \| mov [RA], RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2320 \| add RC, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2321 \| add RA, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2322 \| sub TMPRd, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2323 \| jnz <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2324 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2325 \| movzx RCd, PC_RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2326 \| movzx RBd, PC_RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2327 \| add RC, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2328 \| lea RC, [BASE+RC*8-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2329 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2330 \| cmp RC, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2331 \| ja >9 // More results wanted?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2332 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2333 \| test TRACE:ITYPE, TRACE:ITYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2334 \| jz ->cont_nop
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2335 \| movzx RBd, word TRACE:ITYPE->traceno
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2336 \| movzx RDd, word TRACE:ITYPE->link
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2337 \| cmp RDd, RBd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2338 \| je ->cont_nop // Blacklisted.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2339 \| test RDd, RDd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2340 \| jne =>BC_JLOOP // Jump to stitched trace.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2341 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2342 \| // Stitch a new trace to the previous trace.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2343 \| mov [DISPATCH+DISPATCH_J(exitno)], RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2344 \| mov L:RB, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2345 \| mov L:RB->base, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2346 \| mov CARG2, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2347 \| lea CARG1, [DISPATCH+GG_DISP2J]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2348 \| mov aword [DISPATCH+DISPATCH_J(L)], L:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2349 \| call extern lj_dispatch_stitch // (jit_State J, const BCIns pc)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2350 \| mov BASE, L:RB->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2351 \| jmp ->cont_nop
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2352 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2353 \|9: // Fill up results with nil.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2354 \| mov aword [RA], LJ_TNIL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2355 \| add RA, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2356 \| jmp <3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2357 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2358 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2359 \|->vm_profhook: // Dispatch target for profiler hook.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2360 #if LJ_HASPROFILE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2361 \| mov L:RB, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2362 \| mov L:RB->base, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2363 \| mov CARG2, PC // Caveat: CARG2 == BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2364 \| mov CARG1, L:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2365 \| call extern lj_dispatch_profile // (lua_State L, const BCIns pc)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2366 \| mov BASE, L:RB->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2367 \| // HOOK_PROFILE is off again, so re-dispatch to dynamic instruction.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2368 \| sub PC, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2369 \| jmp ->cont_nop
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2370 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2371 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2372 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2373 \|//-- Trace exit handler -------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2374 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2375 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2376 \|// Called from an exit stub with the exit number on the stack.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2377 \|// The 16 bit exit number is stored with two (sign-extended) push imm8.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2378 \|->vm_exit_handler:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2379 \|.if JIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2380 \| push r13; push r12
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2381 \| push r11; push r10; push r9; push r8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2382 \| push rdi; push rsi; push rbp; lea rbp, [rsp+88]; push rbp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2383 \| push rbx; push rdx; push rcx; push rax
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2384 \| movzx RCd, byte [rbp-8] // Reconstruct exit number.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2385 \| mov RCH, byte [rbp-16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2386 \| mov [rbp-8], r15; mov [rbp-16], r14
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2387 \| // DISPATCH is preserved on-trace in LJ_GC64 mode.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2388 \| mov RAd, [DISPATCH+DISPATCH_GL(vmstate)] // Get trace number.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2389 \| set_vmstate EXIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2390 \| mov [DISPATCH+DISPATCH_J(exitno)], RCd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2391 \| mov [DISPATCH+DISPATCH_J(parent)], RAd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2392 \|.if X64WIN
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2393 \| sub rsp, 168+48 // Room for SSE regs + save area.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2394 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2395 \| sub rsp, 16*8 // Room for SSE regs.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2396 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2397 \| add rbp, -128
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2398 \| movsd qword [rbp-8], xmm15; movsd qword [rbp-16], xmm14
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2399 \| movsd qword [rbp-24], xmm13; movsd qword [rbp-32], xmm12
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2400 \| movsd qword [rbp-40], xmm11; movsd qword [rbp-48], xmm10
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2401 \| movsd qword [rbp-56], xmm9; movsd qword [rbp-64], xmm8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2402 \| movsd qword [rbp-72], xmm7; movsd qword [rbp-80], xmm6
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2403 \| movsd qword [rbp-88], xmm5; movsd qword [rbp-96], xmm4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2404 \| movsd qword [rbp-104], xmm3; movsd qword [rbp-112], xmm2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2405 \| movsd qword [rbp-120], xmm1; movsd qword [rbp-128], xmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2406 \| // Caveat: RB is rbp.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2407 \| mov L:RB, [DISPATCH+DISPATCH_GL(cur_L)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2408 \| mov BASE, [DISPATCH+DISPATCH_GL(jit_base)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2409 \| mov aword [DISPATCH+DISPATCH_J(L)], L:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2410 \| mov L:RB->base, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2411 \|.if X64WIN
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2412 \| lea CARG2, [rsp+4*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2413 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2414 \| mov CARG2, rsp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2415 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2416 \| lea CARG1, [DISPATCH+GG_DISP2J]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2417 \| mov qword [DISPATCH+DISPATCH_GL(jit_base)], 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2418 \| call extern lj_trace_exit // (jit_State J, ExitState ex)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2419 \| // MULTRES or negated error code returned in eax (RD).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2420 \| mov RA, L:RB->cframe
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2421 \| and RA, CFRAME_RAWMASK
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2422 \| mov [RA+CFRAME_OFS_L], L:RB // Set SAVE_L (on-trace resume/yield).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2423 \| mov BASE, L:RB->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2424 \| mov PC, [RA+CFRAME_OFS_PC] // Get SAVE_PC.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2425 \| jmp >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2426 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2427 \|->vm_exit_interp:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2428 \| // RD = MULTRES or negated error code, BASE, PC and DISPATCH set.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2429 \|.if JIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2430 \| // Restore additional callee-save registers only used in compiled code.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2431 \|.if X64WIN
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2432 \| lea RA, [rsp+1016+48]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2433 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2434 \| movdqa xmm15, [RA-10*16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2435 \| movdqa xmm14, [RA-9*16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2436 \| movdqa xmm13, [RA-8*16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2437 \| movdqa xmm12, [RA-7*16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2438 \| movdqa xmm11, [RA-6*16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2439 \| movdqa xmm10, [RA-5*16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2440 \| movdqa xmm9, [RA-4*16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2441 \| movdqa xmm8, [RA-3*16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2442 \| movdqa xmm7, [RA-2*16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2443 \| mov rsp, RA // Reposition stack to C frame.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2444 \| movdqa xmm6, [RA-1*16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2445 \| mov r15, CSAVE_1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2446 \| mov r14, CSAVE_2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2447 \| mov r13, CSAVE_3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2448 \| mov r12, CSAVE_4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2449 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2450 \| lea RA, [rsp+16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2451 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2452 \| mov r13, [RA-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2453 \| mov r12, [RA]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2454 \| mov rsp, RA // Reposition stack to C frame.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2455 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2456 \| cmp RDd, -LUA_ERRERR; jae >9 // Check for error from exit.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2457 \| mov L:RB, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2458 \| mov MULTRES, RDd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2459 \| mov LFUNC:KBASE, [BASE-16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2460 \| cleartp LFUNC:KBASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2461 \| mov KBASE, LFUNC:KBASE->pc
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2462 \| mov KBASE, [KBASE+PC2PROTO(k)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2463 \| mov L:RB->base, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2464 \| mov qword [DISPATCH+DISPATCH_GL(jit_base)], 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2465 \| set_vmstate INTERP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2466 \| // Modified copy of ins_next which handles function header dispatch, too.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2467 \| mov RCd, [PC]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2468 \| movzx RAd, RCH
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2469 \| movzx OP, RCL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2470 \| add PC, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2471 \| shr RCd, 16
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2472 \| cmp MULTRES, -17 // Static dispatch?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2473 \| je >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2474 \| cmp OP, BC_FUNCF // Function header?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2475 \| jb >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2476 \| cmp OP, BC_FUNCC+2 // Fast function?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2477 \| jae >4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2478 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2479 \| mov RCd, MULTRES // RC/RD holds nres+1.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2480 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2481 \| jmp aword [DISPATCH+OP*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2482 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2483 \|4: // Check frame below fast function.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2484 \| mov RC, [BASE-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2485 \| test RCd, FRAME_TYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2486 \| jnz <2 // Trace stitching continuation?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2487 \| // Otherwise set KBASE for Lua function below fast function.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2488 \| movzx RCd, byte [RC-3]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2489 \| neg RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2490 \| mov LFUNC:KBASE, [BASE+RC*8-32]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2491 \| cleartp LFUNC:KBASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2492 \| mov KBASE, LFUNC:KBASE->pc
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2493 \| mov KBASE, [KBASE+PC2PROTO(k)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2494 \| jmp <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2495 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2496 \|5: // Dispatch to static entry of original ins replaced by BC_JLOOP.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2497 \| mov RA, [DISPATCH+DISPATCH_J(trace)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2498 \| mov TRACE:RA, [RA+RD*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2499 \| mov RCd, TRACE:RA->startins
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2500 \| movzx RAd, RCH
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2501 \| movzx OP, RCL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2502 \| shr RCd, 16
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2503 \| jmp aword [DISPATCH+OP*8+GG_DISP2STATIC]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2504 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2505 \|9: // Rethrow error from the right C frame.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2506 \| mov CARG2d, RDd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2507 \| mov CARG1, L:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2508 \| neg CARG2d
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2509 \| call extern lj_err_trace // (lua_State *L, int errcode)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2510 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2511 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2512 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2513 \|//-- Math helper functions ----------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2514 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2515 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2516 \|// FP value rounding. Called by math.floor/math.ceil fast functions
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2517 \|// and from JIT code. arg/ret is xmm0. xmm0-xmm3 and RD (eax) modified.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2518 \|.macro vm_round, name, mode, cond
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2519 \|->name:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2520 \|->name .. _sse:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2521 \| sseconst_abs xmm2, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2522 \| sseconst_2p52 xmm3, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2523 \| movaps xmm1, xmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2524 \| andpd xmm1, xmm2 // \|x\|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2525 \| ucomisd xmm3, xmm1 // No truncation if 2^52 <= \|x\|.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2526 \| jbe >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2527 \| andnpd xmm2, xmm0 // Isolate sign bit.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2528 \|.if mode == 2 // trunc(x)?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2529 \| movaps xmm0, xmm1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2530 \| addsd xmm1, xmm3 // (\|x\| + 2^52) - 2^52
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2531 \| subsd xmm1, xmm3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2532 \| sseconst_1 xmm3, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2533 \| cmpsd xmm0, xmm1, 1 // \|x\| < result?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2534 \| andpd xmm0, xmm3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2535 \| subsd xmm1, xmm0 // If yes, subtract -1.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2536 \| orpd xmm1, xmm2 // Merge sign bit back in.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2537 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2538 \| addsd xmm1, xmm3 // (\|x\| + 2^52) - 2^52
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2539 \| subsd xmm1, xmm3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2540 \| orpd xmm1, xmm2 // Merge sign bit back in.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2541 \| sseconst_1 xmm3, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2542 \| .if mode == 1 // ceil(x)?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2543 \| cmpsd xmm0, xmm1, 6 // x > result?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2544 \| andpd xmm0, xmm3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2545 \| addsd xmm1, xmm0 // If yes, add 1.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2546 \| orpd xmm1, xmm2 // Merge sign bit back in (again).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2547 \| .else // floor(x)?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2548 \| cmpsd xmm0, xmm1, 1 // x < result?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2549 \| andpd xmm0, xmm3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2550 \| subsd xmm1, xmm0 // If yes, subtract 1.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2551 \| .endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2552 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2553 \| movaps xmm0, xmm1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2554 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2555 \| ret
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2556 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2557 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2558 \| vm_round vm_floor, 0, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2559 \| vm_round vm_ceil, 1, JIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2560 \| vm_round vm_trunc, 2, JIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2561 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2562 \|// FP modulo x%y. Called by BC_MOD* and vm_arith.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2563 \|->vm_mod:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2564 \|// Args in xmm0/xmm1, return value in xmm0.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2565 \|// Caveat: xmm0-xmm5 and RC (eax) modified!
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2566 \| movaps xmm5, xmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2567 \| divsd xmm0, xmm1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2568 \| sseconst_abs xmm2, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2569 \| sseconst_2p52 xmm3, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2570 \| movaps xmm4, xmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2571 \| andpd xmm4, xmm2 // \|x/y\|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2572 \| ucomisd xmm3, xmm4 // No truncation if 2^52 <= \|x/y\|.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2573 \| jbe >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2574 \| andnpd xmm2, xmm0 // Isolate sign bit.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2575 \| addsd xmm4, xmm3 // (\|x/y\| + 2^52) - 2^52
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2576 \| subsd xmm4, xmm3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2577 \| orpd xmm4, xmm2 // Merge sign bit back in.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2578 \| sseconst_1 xmm2, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2579 \| cmpsd xmm0, xmm4, 1 // x/y < result?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2580 \| andpd xmm0, xmm2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2581 \| subsd xmm4, xmm0 // If yes, subtract 1.0.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2582 \| movaps xmm0, xmm5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2583 \| mulsd xmm1, xmm4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2584 \| subsd xmm0, xmm1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2585 \| ret
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2586 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2587 \| mulsd xmm1, xmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2588 \| movaps xmm0, xmm5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2589 \| subsd xmm0, xmm1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2590 \| ret
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2591 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2592 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2593 \|//-- Miscellaneous functions --------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2594 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2595 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2596 \|// int lj_vm_cpuid(uint32_t f, uint32_t res[4])
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2597 \|->vm_cpuid:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2598 \| mov eax, CARG1d
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2599 \| .if X64WIN; push rsi; mov rsi, CARG2; .endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2600 \| push rbx
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2601 \| xor ecx, ecx
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2602 \| cpuid
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2603 \| mov [rsi], eax
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2604 \| mov [rsi+4], ebx
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2605 \| mov [rsi+8], ecx
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2606 \| mov [rsi+12], edx
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2607 \| pop rbx
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2608 \| .if X64WIN; pop rsi; .endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2609 \| ret
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2610 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2611 \|.define NEXT_TAB, TAB:CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2612 \|.define NEXT_IDX, CARG2d
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2613 \|.define NEXT_IDXa, CARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2614 \|.define NEXT_PTR, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2615 \|.define NEXT_PTRd, RCd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2616 \|.define NEXT_TMP, CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2617 \|.define NEXT_ASIZE, CARG4d
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2618 \|.macro NEXT_RES_IDXL, op2; lea edx, [NEXT_IDX+op2]; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2619 \|.if X64WIN
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2620 \|.define NEXT_RES_PTR, [rsp+aword*5]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2621 \|.macro NEXT_RES_IDX, op2; add NEXT_IDX, op2; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2622 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2623 \|.define NEXT_RES_PTR, [rsp+aword*1]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2624 \|.macro NEXT_RES_IDX, op2; lea edx, [NEXT_IDX+op2]; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2625 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2626 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2627 \|// TValue lj_vm_next(GCtab t, uint32_t idx)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2628 \|// Next idx returned in edx.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2629 \|->vm_next:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2630 \|.if JIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2631 \| mov NEXT_ASIZE, NEXT_TAB->asize
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2632 \|1: // Traverse array part.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2633 \| cmp NEXT_IDX, NEXT_ASIZE; jae >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2634 \| mov NEXT_TMP, NEXT_TAB->array
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2635 \| mov NEXT_TMP, qword [NEXT_TMP+NEXT_IDX*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2636 \| cmp NEXT_TMP, LJ_TNIL; je >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2637 \| lea NEXT_PTR, NEXT_RES_PTR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2638 \| mov qword [NEXT_PTR], NEXT_TMP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2639 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2640 \| setint NEXT_TMP, NEXT_IDXa
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2641 \| mov qword [NEXT_PTR+qword*1], NEXT_TMP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2642 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2643 \| cvtsi2sd xmm0, NEXT_IDX
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2644 \| movsd qword [NEXT_PTR+qword*1], xmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2645 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2646 \| NEXT_RES_IDX 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2647 \| ret
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2648 \|2: // Skip holes in array part.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2649 \| add NEXT_IDX, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2650 \| jmp <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2651 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2652 \|5: // Traverse hash part.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2653 \| sub NEXT_IDX, NEXT_ASIZE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2654 \|6:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2655 \| cmp NEXT_IDX, NEXT_TAB->hmask; ja >9
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2656 \| imul NEXT_PTRd, NEXT_IDX, #NODE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2657 \| add NODE:NEXT_PTR, NEXT_TAB->node
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2658 \| cmp qword NODE:NEXT_PTR->val, LJ_TNIL; je >7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2659 \| NEXT_RES_IDXL NEXT_ASIZE+1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2660 \| ret
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2661 \|7: // Skip holes in hash part.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2662 \| add NEXT_IDX, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2663 \| jmp <6
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2664 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2665 \|9: // End of iteration. Set the key to nil (not the value).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2666 \| NEXT_RES_IDX NEXT_ASIZE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2667 \| lea NEXT_PTR, NEXT_RES_PTR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2668 \| mov qword [NEXT_PTR+qword*1], LJ_TNIL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2669 \| ret
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2670 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2671 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2672 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2673 \|//-- Assertions ---------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2674 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2675 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2676 \|->assert_bad_for_arg_type:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2677 #ifdef LUA_USE_ASSERT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2678 \| int3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2679 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2680 \| int3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2681 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2682 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2683 \|//-- FFI helper functions -----------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2684 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2685 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2686 \|// Handler for callback functions. Callback slot number in ah/al.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2687 \|->vm_ffi_callback:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2688 \|.if FFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2689 \|.type CTSTATE, CTState, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2690 \| saveregs_ // ebp/rbp already saved. ebp now holds global_State *.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2691 \| lea DISPATCH, [ebp+GG_G2DISP]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2692 \| mov CTSTATE, GL:ebp->ctype_state
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2693 \| movzx eax, ax
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2694 \| mov CTSTATE->cb.slot, eax
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2695 \| mov CTSTATE->cb.gpr[0], CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2696 \| mov CTSTATE->cb.gpr[1], CARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2697 \| mov CTSTATE->cb.gpr[2], CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2698 \| mov CTSTATE->cb.gpr[3], CARG4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2699 \| movsd qword CTSTATE->cb.fpr[0], xmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2700 \| movsd qword CTSTATE->cb.fpr[1], xmm1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2701 \| movsd qword CTSTATE->cb.fpr[2], xmm2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2702 \| movsd qword CTSTATE->cb.fpr[3], xmm3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2703 \|.if X64WIN
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2704 \| lea rax, [rsp+CFRAME_SIZE+4*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2705 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2706 \| lea rax, [rsp+CFRAME_SIZE]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2707 \| mov CTSTATE->cb.gpr[4], CARG5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2708 \| mov CTSTATE->cb.gpr[5], CARG6
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2709 \| movsd qword CTSTATE->cb.fpr[4], xmm4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2710 \| movsd qword CTSTATE->cb.fpr[5], xmm5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2711 \| movsd qword CTSTATE->cb.fpr[6], xmm6
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2712 \| movsd qword CTSTATE->cb.fpr[7], xmm7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2713 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2714 \| mov CTSTATE->cb.stack, rax
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2715 \| mov CARG2, rsp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2716 \| mov SAVE_PC, CTSTATE // Any value outside of bytecode is ok.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2717 \| mov CARG1, CTSTATE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2718 \| call extern lj_ccallback_enter // (CTState cts, void cf)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2719 \| // lua_State * returned in eax (RD).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2720 \| set_vmstate INTERP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2721 \| mov BASE, L:RD->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2722 \| mov RD, L:RD->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2723 \| sub RD, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2724 \| mov LFUNC:RB, [BASE-16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2725 \| cleartp LFUNC:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2726 \| shr RD, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2727 \| add RD, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2728 \| ins_callt
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2729 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2730 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2731 \|->cont_ffi_callback: // Return from FFI callback.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2732 \|.if FFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2733 \| mov L:RA, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2734 \| mov CTSTATE, [DISPATCH+DISPATCH_GL(ctype_state)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2735 \| mov aword CTSTATE->L, L:RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2736 \| mov L:RA->base, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2737 \| mov L:RA->top, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2738 \| mov CARG1, CTSTATE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2739 \| mov CARG2, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2740 \| call extern lj_ccallback_leave // (CTState cts, TValue o)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2741 \| mov rax, CTSTATE->cb.gpr[0]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2742 \| movsd xmm0, qword CTSTATE->cb.fpr[0]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2743 \| jmp ->vm_leave_unw
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2744 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2745 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2746 \|->vm_ffi_call: // Call C function via FFI.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2747 \| // Caveat: needs special frame unwinding, see below.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2748 \|.if FFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2749 \| .type CCSTATE, CCallState, rbx
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2750 \| push rbp; mov rbp, rsp; push rbx; mov CCSTATE, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2751 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2752 \| // Readjust stack.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2753 \| mov eax, CCSTATE->spadj
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2754 \| sub rsp, rax
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2755 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2756 \| // Copy stack slots.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2757 \| movzx ecx, byte CCSTATE->nsp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2758 \| sub ecx, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2759 \| js >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2760 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2761 \| mov rax, [CCSTATE+rcx*8+offsetof(CCallState, stack)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2762 \| mov [rsp+rcx8+CCALL_SPS_EXTRA8], rax
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2763 \| sub ecx, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2764 \| jns <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2765 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2766 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2767 \| movzx eax, byte CCSTATE->nfpr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2768 \| mov CARG1, CCSTATE->gpr[0]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2769 \| mov CARG2, CCSTATE->gpr[1]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2770 \| mov CARG3, CCSTATE->gpr[2]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2771 \| mov CARG4, CCSTATE->gpr[3]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2772 \|.if not X64WIN
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2773 \| mov CARG5, CCSTATE->gpr[4]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2774 \| mov CARG6, CCSTATE->gpr[5]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2775 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2776 \| test eax, eax; jz >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2777 \| movaps xmm0, CCSTATE->fpr[0]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2778 \| movaps xmm1, CCSTATE->fpr[1]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2779 \| movaps xmm2, CCSTATE->fpr[2]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2780 \| movaps xmm3, CCSTATE->fpr[3]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2781 \|.if not X64WIN
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2782 \| cmp eax, 4; jbe >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2783 \| movaps xmm4, CCSTATE->fpr[4]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2784 \| movaps xmm5, CCSTATE->fpr[5]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2785 \| movaps xmm6, CCSTATE->fpr[6]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2786 \| movaps xmm7, CCSTATE->fpr[7]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2787 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2788 \|5:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2789 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2790 \| call aword CCSTATE->func
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2791 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2792 \| mov CCSTATE->gpr[0], rax
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2793 \| movaps CCSTATE->fpr[0], xmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2794 \|.if not X64WIN
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2795 \| mov CCSTATE->gpr[1], rdx
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2796 \| movaps CCSTATE->fpr[1], xmm1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2797 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2798 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2799 \| mov rbx, [rbp-8]; leave; ret
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2800 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2801 \|// Note: vm_ffi_call must be the last function in this object file!
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2802 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2803 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2804 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2805
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2806 /* Generate the code for a single instruction. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2807 static void build_ins(BuildCtx *ctx, BCOp op, int defop)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2808 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2809 int vk = 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2810 \|// Note: aligning all instructions does not pay off.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2811 \|=>defop:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2812
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2813 switch (op) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2814
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2815 /* -- Comparison ops ---------------------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2816
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2817 /* Remember: all ops branch for a true comparison, fall through otherwise. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2818
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2819 \|.macro jmp_comp, lt, ge, le, gt, target
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2820 \|\|switch (op) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2821 \|\|case BC_ISLT:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2822 \| lt target
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2823 \|\|break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2824 \|\|case BC_ISGE:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2825 \| ge target
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2826 \|\|break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2827 \|\|case BC_ISLE:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2828 \| le target
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2829 \|\|break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2830 \|\|case BC_ISGT:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2831 \| gt target
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2832 \|\|break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2833 \|\|default: break; /* Shut up GCC. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2834 \|\|}
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2835 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2836
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2837 case BC_ISLT: case BC_ISGE: case BC_ISLE: case BC_ISGT:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2838 \| // RA = src1, RD = src2, JMP with RD = target
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2839 \| ins_AD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2840 \| mov ITYPE, [BASE+RA*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2841 \| mov RB, [BASE+RD*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2842 \| mov RA, ITYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2843 \| mov RD, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2844 \| sar ITYPE, 47
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2845 \| sar RB, 47
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2846 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2847 \| cmp ITYPEd, LJ_TISNUM; jne >7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2848 \| cmp RBd, LJ_TISNUM; jne >8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2849 \| add PC, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2850 \| cmp RAd, RDd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2851 \| jmp_comp jge, jl, jg, jle, >9
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2852 \|6:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2853 \| movzx RDd, PC_RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2854 \| branchPC RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2855 \|9:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2856 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2857 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2858 \|7: // RA is not an integer.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2859 \| ja ->vmeta_comp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2860 \| // RA is a number.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2861 \| cmp RBd, LJ_TISNUM; jb >1; jne ->vmeta_comp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2862 \| // RA is a number, RD is an integer.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2863 \| cvtsi2sd xmm0, RDd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2864 \| jmp >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2865 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2866 \|8: // RA is an integer, RD is not an integer.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2867 \| ja ->vmeta_comp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2868 \| // RA is an integer, RD is a number.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2869 \| cvtsi2sd xmm1, RAd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2870 \| movd xmm0, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2871 \| jmp >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2872 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2873 \| cmp ITYPEd, LJ_TISNUM; jae ->vmeta_comp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2874 \| cmp RBd, LJ_TISNUM; jae ->vmeta_comp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2875 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2876 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2877 \| movd xmm0, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2878 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2879 \| movd xmm1, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2880 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2881 \| add PC, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2882 \| ucomisd xmm0, xmm1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2883 \| // Unordered: all of ZF CF PF set, ordered: PF clear.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2884 \| // To preserve NaN semantics GE/GT branch on unordered, but LT/LE don't.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2885 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2886 \| jmp_comp jbe, ja, jb, jae, <9
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2887 \| jmp <6
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2888 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2889 \| jmp_comp jbe, ja, jb, jae, >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2890 \| movzx RDd, PC_RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2891 \| branchPC RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2892 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2893 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2894 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2895 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2896
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2897 case BC_ISEQV: case BC_ISNEV:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2898 vk = op == BC_ISEQV;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2899 \| ins_AD // RA = src1, RD = src2, JMP with RD = target
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2900 \| mov RB, [BASE+RD*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2901 \| mov ITYPE, [BASE+RA*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2902 \| add PC, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2903 \| mov RD, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2904 \| mov RA, ITYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2905 \| sar RB, 47
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2906 \| sar ITYPE, 47
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2907 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2908 \| cmp RBd, LJ_TISNUM; jne >7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2909 \| cmp ITYPEd, LJ_TISNUM; jne >8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2910 \| cmp RDd, RAd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2911 if (vk) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2912 \| jne >9
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2913 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2914 \| je >9
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2915 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2916 \| movzx RDd, PC_RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2917 \| branchPC RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2918 \|9:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2919 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2920 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2921 \|7: // RD is not an integer.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2922 \| ja >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2923 \| // RD is a number.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2924 \| movd xmm1, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2925 \| cmp ITYPEd, LJ_TISNUM; jb >1; jne >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2926 \| // RD is a number, RA is an integer.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2927 \| cvtsi2sd xmm0, RAd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2928 \| jmp >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2929 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2930 \|8: // RD is an integer, RA is not an integer.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2931 \| ja >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2932 \| // RD is an integer, RA is a number.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2933 \| cvtsi2sd xmm1, RDd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2934 \| jmp >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2935 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2936 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2937 \| cmp RBd, LJ_TISNUM; jae >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2938 \| cmp ITYPEd, LJ_TISNUM; jae >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2939 \| movd xmm1, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2940 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2941 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2942 \| movd xmm0, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2943 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2944 \| ucomisd xmm0, xmm1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2945 \|4:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2946 iseqne_fp:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2947 if (vk) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2948 \| jp >2 // Unordered means not equal.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2949 \| jne >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2950 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2951 \| jp >2 // Unordered means not equal.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2952 \| je >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2953 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2954 iseqne_end:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2955 if (vk) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2956 \|1: // EQ: Branch to the target.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2957 \| movzx RDd, PC_RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2958 \| branchPC RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2959 \|2: // NE: Fallthrough to next instruction.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2960 \|.if not FFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2961 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2962 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2963 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2964 \|.if not FFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2965 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2966 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2967 \|2: // NE: Branch to the target.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2968 \| movzx RDd, PC_RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2969 \| branchPC RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2970 \|1: // EQ: Fallthrough to next instruction.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2971 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2972 if (LJ_DUALNUM && (op == BC_ISEQV \|\| op == BC_ISNEV \|\|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2973 op == BC_ISEQN \|\| op == BC_ISNEN)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2974 \| jmp <9
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2975 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2976 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2977 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2978 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2979 if (op == BC_ISEQV \|\| op == BC_ISNEV) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2980 \|5: // Either or both types are not numbers.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2981 \|.if FFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2982 \| cmp RBd, LJ_TCDATA; je ->vmeta_equal_cd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2983 \| cmp ITYPEd, LJ_TCDATA; je ->vmeta_equal_cd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2984 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2985 \| cmp RA, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2986 \| je <1 // Same GCobjs or pvalues?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2987 \| cmp RBd, ITYPEd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2988 \| jne <2 // Not the same type?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2989 \| cmp RBd, LJ_TISTABUD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2990 \| ja <2 // Different objects and not table/ud?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2991 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2992 \| // Different tables or userdatas. Need to check __eq metamethod.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2993 \| // Field metatable must be at same offset for GCtab and GCudata!
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2994 \| cleartp TAB:RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2995 \| mov TAB:RB, TAB:RA->metatable
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2996 \| test TAB:RB, TAB:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2997 \| jz <2 // No metatable?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2998 \| test byte TAB:RB->nomm, 1<<MM_eq
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2999 \| jnz <2 // Or 'no __eq' flag set?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3000 if (vk) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3001 \| xor RBd, RBd // ne = 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3002 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3003 \| mov RBd, 1 // ne = 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3004 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3005 \| jmp ->vmeta_equal // Handle __eq metamethod.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3006 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3007 \|.if FFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3008 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3009 \| cmp ITYPEd, LJ_TCDATA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3010 if (LJ_DUALNUM && vk) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3011 \| jne <9
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3012 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3013 \| jne <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3014 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3015 \| jmp ->vmeta_equal_cd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3016 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3017 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3018 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3019 case BC_ISEQS: case BC_ISNES:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3020 vk = op == BC_ISEQS;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3021 \| ins_AND // RA = src, RD = str const, JMP with RD = target
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3022 \| mov RB, [BASE+RA*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3023 \| add PC, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3024 \| checkstr RB, >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3025 \| cmp RB, [KBASE+RD*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3026 iseqne_test:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3027 if (vk) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3028 \| jne >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3029 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3030 \| je >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3031 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3032 goto iseqne_end;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3033 case BC_ISEQN: case BC_ISNEN:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3034 vk = op == BC_ISEQN;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3035 \| ins_AD // RA = src, RD = num const, JMP with RD = target
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3036 \| mov RB, [BASE+RA*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3037 \| add PC, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3038 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3039 \| checkint RB, >7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3040 \| mov RD, [KBASE+RD*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3041 \| checkint RD, >8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3042 \| cmp RBd, RDd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3043 if (vk) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3044 \| jne >9
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3045 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3046 \| je >9
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3047 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3048 \| movzx RDd, PC_RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3049 \| branchPC RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3050 \|9:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3051 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3052 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3053 \|7: // RA is not an integer.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3054 \| ja >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3055 \| // RA is a number.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3056 \| mov RD, [KBASE+RD*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3057 \| checkint RD, >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3058 \| // RA is a number, RD is an integer.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3059 \| cvtsi2sd xmm0, RDd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3060 \| jmp >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3061 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3062 \|8: // RA is an integer, RD is a number.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3063 \| cvtsi2sd xmm0, RBd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3064 \| movd xmm1, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3065 \| ucomisd xmm0, xmm1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3066 \| jmp >4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3067 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3068 \| movd xmm0, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3069 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3070 \| checknum RB, >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3071 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3072 \| movsd xmm0, qword [KBASE+RD*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3073 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3074 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3075 \| ucomisd xmm0, qword [BASE+RA*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3076 \|4:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3077 goto iseqne_fp;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3078 case BC_ISEQP: case BC_ISNEP:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3079 vk = op == BC_ISEQP;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3080 \| ins_AND // RA = src, RD = primitive type (~), JMP with RD = target
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3081 \| mov RB, [BASE+RA*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3082 \| sar RB, 47
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3083 \| add PC, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3084 \| cmp RBd, RDd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3085 if (!LJ_HASFFI) goto iseqne_test;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3086 if (vk) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3087 \| jne >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3088 \| movzx RDd, PC_RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3089 \| branchPC RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3090 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3091 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3092 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3093 \| cmp RBd, LJ_TCDATA; jne <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3094 \| jmp ->vmeta_equal_cd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3095 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3096 \| je >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3097 \| cmp RBd, LJ_TCDATA; je ->vmeta_equal_cd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3098 \| movzx RDd, PC_RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3099 \| branchPC RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3100 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3101 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3102 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3103 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3104
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3105 /* -- Unary test and copy ops ------------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3106
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3107 case BC_ISTC: case BC_ISFC: case BC_IST: case BC_ISF:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3108 \| ins_AD // RA = dst or unused, RD = src, JMP with RD = target
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3109 \| mov ITYPE, [BASE+RD*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3110 \| add PC, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3111 if (op == BC_ISTC \|\| op == BC_ISFC) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3112 \| mov RB, ITYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3113 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3114 \| sar ITYPE, 47
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3115 \| cmp ITYPEd, LJ_TISTRUECOND
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3116 if (op == BC_IST \|\| op == BC_ISTC) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3117 \| jae >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3118 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3119 \| jb >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3120 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3121 if (op == BC_ISTC \|\| op == BC_ISFC) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3122 \| mov [BASE+RA*8], RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3123 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3124 \| movzx RDd, PC_RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3125 \| branchPC RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3126 \|1: // Fallthrough to the next instruction.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3127 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3128 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3129
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3130 case BC_ISTYPE:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3131 \| ins_AD // RA = src, RD = -type
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3132 \| mov RB, [BASE+RA*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3133 \| sar RB, 47
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3134 \| add RBd, RDd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3135 \| jne ->vmeta_istype
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3136 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3137 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3138 case BC_ISNUM:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3139 \| ins_AD // RA = src, RD = -(TISNUM-1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3140 \| checknumtp [BASE+RA*8], ->vmeta_istype
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3141 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3142 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3143
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3144 /* -- Unary ops --------------------------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3145
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3146 case BC_MOV:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3147 \| ins_AD // RA = dst, RD = src
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3148 \| mov RB, [BASE+RD*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3149 \| mov [BASE+RA*8], RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3150 \| ins_next_
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3151 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3152 case BC_NOT:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3153 \| ins_AD // RA = dst, RD = src
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3154 \| mov RB, [BASE+RD*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3155 \| sar RB, 47
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3156 \| mov RCd, 2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3157 \| cmp RB, LJ_TISTRUECOND
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3158 \| sbb RCd, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3159 \| shl RC, 47
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3160 \| not RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3161 \| mov [BASE+RA*8], RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3162 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3163 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3164 case BC_UNM:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3165 \| ins_AD // RA = dst, RD = src
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3166 \| mov RB, [BASE+RD*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3167 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3168 \| checkint RB, >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3169 \| neg RBd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3170 \| jo >4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3171 \| setint RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3172 \|9:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3173 \| mov [BASE+RA*8], RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3174 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3175 \|4:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3176 \| mov64 RB, U64x(41e00000,00000000) // 2^31.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3177 \| jmp <9
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3178 \|5:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3179 \| ja ->vmeta_unm
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3180 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3181 \| checknum RB, ->vmeta_unm
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3182 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3183 \| mov64 RD, U64x(80000000,00000000)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3184 \| xor RB, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3185 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3186 \| jmp <9
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3187 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3188 \| mov [BASE+RA*8], RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3189 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3190 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3191 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3192 case BC_LEN:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3193 \| ins_AD // RA = dst, RD = src
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3194 \| mov RD, [BASE+RD*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3195 \| checkstr RD, >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3196 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3197 \| mov RDd, dword STR:RD->len
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3198 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3199 \| setint RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3200 \| mov [BASE+RA*8], RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3201 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3202 \| xorps xmm0, xmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3203 \| cvtsi2sd xmm0, dword STR:RD->len
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3204 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3205 \| movsd qword [BASE+RA*8], xmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3206 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3207 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3208 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3209 \| cmp ITYPEd, LJ_TTAB; jne ->vmeta_len
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3210 \| mov TAB:CARG1, TAB:RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3211 #if LJ_52
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3212 \| mov TAB:RB, TAB:RD->metatable
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3213 \| cmp TAB:RB, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3214 \| jnz >9
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3215 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3216 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3217 \|->BC_LEN_Z:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3218 \| mov RB, BASE // Save BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3219 \| call extern lj_tab_len // (GCtab *t)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3220 \| // Length of table returned in eax (RD).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3221 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3222 \| // Nothing to do.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3223 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3224 \| cvtsi2sd xmm0, RDd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3225 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3226 \| mov BASE, RB // Restore BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3227 \| movzx RAd, PC_RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3228 \| jmp <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3229 #if LJ_52
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3230 \|9: // Check for __len.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3231 \| test byte TAB:RB->nomm, 1<<MM_len
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3232 \| jnz <3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3233 \| jmp ->vmeta_len // 'no __len' flag NOT set: check.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3234 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3235 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3236
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3237 /* -- Binary ops -------------------------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3238
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3239 \|.macro ins_arithpre, sseins, ssereg
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3240 \| ins_ABC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3241 \|\|vk = ((int)op - BC_ADDVN) / (BC_ADDNV-BC_ADDVN);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3242 \|\|switch (vk) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3243 \|\|case 0:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3244 \| checknumtp [BASE+RB*8], ->vmeta_arith_vn
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3245 \| .if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3246 \| checknumtp [KBASE+RC*8], ->vmeta_arith_vn
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3247 \| .endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3248 \| movsd xmm0, qword [BASE+RB*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3249 \| sseins ssereg, qword [KBASE+RC*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3250 \|\| break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3251 \|\|case 1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3252 \| checknumtp [BASE+RB*8], ->vmeta_arith_nv
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3253 \| .if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3254 \| checknumtp [KBASE+RC*8], ->vmeta_arith_nv
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3255 \| .endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3256 \| movsd xmm0, qword [KBASE+RC*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3257 \| sseins ssereg, qword [BASE+RB*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3258 \|\| break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3259 \|\|default:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3260 \| checknumtp [BASE+RB*8], ->vmeta_arith_vv
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3261 \| checknumtp [BASE+RC*8], ->vmeta_arith_vv
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3262 \| movsd xmm0, qword [BASE+RB*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3263 \| sseins ssereg, qword [BASE+RC*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3264 \|\| break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3265 \|\|}
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3266 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3267 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3268 \|.macro ins_arithdn, intins
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3269 \| ins_ABC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3270 \|\|vk = ((int)op - BC_ADDVN) / (BC_ADDNV-BC_ADDVN);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3271 \|\|switch (vk) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3272 \|\|case 0:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3273 \| mov RB, [BASE+RB*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3274 \| mov RC, [KBASE+RC*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3275 \| checkint RB, ->vmeta_arith_vno
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3276 \| checkint RC, ->vmeta_arith_vno
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3277 \| intins RBd, RCd; jo ->vmeta_arith_vno
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3278 \|\| break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3279 \|\|case 1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3280 \| mov RB, [BASE+RB*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3281 \| mov RC, [KBASE+RC*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3282 \| checkint RB, ->vmeta_arith_nvo
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3283 \| checkint RC, ->vmeta_arith_nvo
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3284 \| intins RCd, RBd; jo ->vmeta_arith_nvo
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3285 \|\| break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3286 \|\|default:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3287 \| mov RB, [BASE+RB*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3288 \| mov RC, [BASE+RC*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3289 \| checkint RB, ->vmeta_arith_vvo
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3290 \| checkint RC, ->vmeta_arith_vvo
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3291 \| intins RBd, RCd; jo ->vmeta_arith_vvo
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3292 \|\| break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3293 \|\|}
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3294 \|\|if (vk == 1) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3295 \| setint RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3296 \| mov [BASE+RA*8], RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3297 \|\|} else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3298 \| setint RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3299 \| mov [BASE+RA*8], RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3300 \|\|}
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3301 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3302 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3303 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3304 \|.macro ins_arithpost
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3305 \| movsd qword [BASE+RA*8], xmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3306 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3307 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3308 \|.macro ins_arith, sseins
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3309 \| ins_arithpre sseins, xmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3310 \| ins_arithpost
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3311 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3312 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3313 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3314 \|.macro ins_arith, intins, sseins
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3315 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3316 \| ins_arithdn intins
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3317 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3318 \| ins_arith, sseins
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3319 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3320 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3321
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3322 \| // RA = dst, RB = src1 or num const, RC = src2 or num const
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3323 case BC_ADDVN: case BC_ADDNV: case BC_ADDVV:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3324 \| ins_arith add, addsd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3325 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3326 case BC_SUBVN: case BC_SUBNV: case BC_SUBVV:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3327 \| ins_arith sub, subsd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3328 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3329 case BC_MULVN: case BC_MULNV: case BC_MULVV:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3330 \| ins_arith imul, mulsd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3331 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3332 case BC_DIVVN: case BC_DIVNV: case BC_DIVVV:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3333 \| ins_arith divsd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3334 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3335 case BC_MODVN:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3336 \| ins_arithpre movsd, xmm1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3337 \|->BC_MODVN_Z:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3338 \| call ->vm_mod
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3339 \| ins_arithpost
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3340 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3341 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3342 case BC_MODNV: case BC_MODVV:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3343 \| ins_arithpre movsd, xmm1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3344 \| jmp ->BC_MODVN_Z // Avoid 3 copies. It's slow anyway.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3345 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3346 case BC_POW:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3347 \| ins_arithpre movsd, xmm1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3348 \| mov RB, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3349 \| call extern pow
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3350 \| movzx RAd, PC_RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3351 \| mov BASE, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3352 \| ins_arithpost
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3353 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3354 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3355
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3356 case BC_CAT:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3357 \| ins_ABC // RA = dst, RB = src_start, RC = src_end
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3358 \| mov L:CARG1, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3359 \| mov L:CARG1->base, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3360 \| lea CARG2, [BASE+RC*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3361 \| mov CARG3d, RCd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3362 \| sub CARG3d, RBd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3363 \|->BC_CAT_Z:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3364 \| mov L:RB, L:CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3365 \| mov SAVE_PC, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3366 \| call extern lj_meta_cat // (lua_State L, TValue top, int left)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3367 \| // NULL (finished) or TValue * (metamethod) returned in eax (RC).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3368 \| mov BASE, L:RB->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3369 \| test RC, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3370 \| jnz ->vmeta_binop
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3371 \| movzx RBd, PC_RB // Copy result to Stk[RA] from Stk[RB].
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3372 \| movzx RAd, PC_RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3373 \| mov RC, [BASE+RB*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3374 \| mov [BASE+RA*8], RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3375 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3376 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3377
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3378 /* -- Constant ops ------------------------------------------------------ */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3379
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3380 case BC_KSTR:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3381 \| ins_AND // RA = dst, RD = str const (~)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3382 \| mov RD, [KBASE+RD*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3383 \| settp RD, LJ_TSTR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3384 \| mov [BASE+RA*8], RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3385 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3386 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3387 case BC_KCDATA:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3388 \|.if FFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3389 \| ins_AND // RA = dst, RD = cdata const (~)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3390 \| mov RD, [KBASE+RD*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3391 \| settp RD, LJ_TCDATA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3392 \| mov [BASE+RA*8], RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3393 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3394 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3395 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3396 case BC_KSHORT:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3397 \| ins_AD // RA = dst, RD = signed int16 literal
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3398 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3399 \| movsx RDd, RDW
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3400 \| setint RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3401 \| mov [BASE+RA*8], RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3402 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3403 \| movsx RDd, RDW // Sign-extend literal.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3404 \| cvtsi2sd xmm0, RDd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3405 \| movsd qword [BASE+RA*8], xmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3406 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3407 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3408 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3409 case BC_KNUM:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3410 \| ins_AD // RA = dst, RD = num const
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3411 \| movsd xmm0, qword [KBASE+RD*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3412 \| movsd qword [BASE+RA*8], xmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3413 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3414 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3415 case BC_KPRI:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3416 \| ins_AD // RA = dst, RD = primitive type (~)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3417 \| shl RD, 47
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3418 \| not RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3419 \| mov [BASE+RA*8], RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3420 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3421 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3422 case BC_KNIL:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3423 \| ins_AD // RA = dst_start, RD = dst_end
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3424 \| lea RA, [BASE+RA*8+8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3425 \| lea RD, [BASE+RD*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3426 \| mov RB, LJ_TNIL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3427 \| mov [RA-8], RB // Sets minimum 2 slots.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3428 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3429 \| mov [RA], RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3430 \| add RA, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3431 \| cmp RA, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3432 \| jbe <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3433 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3434 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3435
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3436 /* -- Upvalue and function ops ------------------------------------------ */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3437
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3438 case BC_UGET:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3439 \| ins_AD // RA = dst, RD = upvalue #
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3440 \| mov LFUNC:RB, [BASE-16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3441 \| cleartp LFUNC:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3442 \| mov UPVAL:RB, [LFUNC:RB+RD*8+offsetof(GCfuncL, uvptr)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3443 \| mov RB, UPVAL:RB->v
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3444 \| mov RD, [RB]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3445 \| mov [BASE+RA*8], RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3446 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3447 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3448 case BC_USETV:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3449 #define TV2MARKOFS \
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3450 ((int32_t)offsetof(GCupval, marked)-(int32_t)offsetof(GCupval, tv))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3451 \| ins_AD // RA = upvalue #, RD = src
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3452 \| mov LFUNC:RB, [BASE-16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3453 \| cleartp LFUNC:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3454 \| mov UPVAL:RB, [LFUNC:RB+RA*8+offsetof(GCfuncL, uvptr)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3455 \| cmp byte UPVAL:RB->closed, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3456 \| mov RB, UPVAL:RB->v
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3457 \| mov RA, [BASE+RD*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3458 \| mov [RB], RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3459 \| jz >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3460 \| // Check barrier for closed upvalue.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3461 \| test byte [RB+TV2MARKOFS], LJ_GC_BLACK // isblack(uv)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3462 \| jnz >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3463 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3464 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3465 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3466 \|2: // Upvalue is black. Check if new value is collectable and white.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3467 \| mov RD, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3468 \| sar RD, 47
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3469 \| sub RDd, LJ_TISGCV
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3470 \| cmp RDd, LJ_TNUMX - LJ_TISGCV // tvisgcv(v)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3471 \| jbe <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3472 \| cleartp GCOBJ:RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3473 \| test byte GCOBJ:RA->gch.marked, LJ_GC_WHITES // iswhite(v)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3474 \| jz <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3475 \| // Crossed a write barrier. Move the barrier forward.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3476 \|.if not X64WIN
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3477 \| mov CARG2, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3478 \| mov RB, BASE // Save BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3479 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3480 \| xchg CARG2, RB // Save BASE (CARG2 == BASE).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3481 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3482 \| lea GL:CARG1, [DISPATCH+GG_DISP2G]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3483 \| call extern lj_gc_barrieruv // (global_State g, TValue tv)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3484 \| mov BASE, RB // Restore BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3485 \| jmp <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3486 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3487 #undef TV2MARKOFS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3488 case BC_USETS:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3489 \| ins_AND // RA = upvalue #, RD = str const (~)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3490 \| mov LFUNC:RB, [BASE-16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3491 \| cleartp LFUNC:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3492 \| mov UPVAL:RB, [LFUNC:RB+RA*8+offsetof(GCfuncL, uvptr)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3493 \| mov STR:RA, [KBASE+RD*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3494 \| mov RD, UPVAL:RB->v
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3495 \| settp STR:ITYPE, STR:RA, LJ_TSTR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3496 \| mov [RD], STR:ITYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3497 \| test byte UPVAL:RB->marked, LJ_GC_BLACK // isblack(uv)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3498 \| jnz >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3499 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3500 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3501 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3502 \|2: // Check if string is white and ensure upvalue is closed.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3503 \| test byte GCOBJ:RA->gch.marked, LJ_GC_WHITES // iswhite(str)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3504 \| jz <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3505 \| cmp byte UPVAL:RB->closed, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3506 \| jz <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3507 \| // Crossed a write barrier. Move the barrier forward.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3508 \| mov RB, BASE // Save BASE (CARG2 == BASE).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3509 \| mov CARG2, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3510 \| lea GL:CARG1, [DISPATCH+GG_DISP2G]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3511 \| call extern lj_gc_barrieruv // (global_State g, TValue tv)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3512 \| mov BASE, RB // Restore BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3513 \| jmp <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3514 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3515 case BC_USETN:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3516 \| ins_AD // RA = upvalue #, RD = num const
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3517 \| mov LFUNC:RB, [BASE-16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3518 \| cleartp LFUNC:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3519 \| movsd xmm0, qword [KBASE+RD*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3520 \| mov UPVAL:RB, [LFUNC:RB+RA*8+offsetof(GCfuncL, uvptr)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3521 \| mov RA, UPVAL:RB->v
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3522 \| movsd qword [RA], xmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3523 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3524 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3525 case BC_USETP:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3526 \| ins_AD // RA = upvalue #, RD = primitive type (~)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3527 \| mov LFUNC:RB, [BASE-16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3528 \| cleartp LFUNC:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3529 \| mov UPVAL:RB, [LFUNC:RB+RA*8+offsetof(GCfuncL, uvptr)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3530 \| shl RD, 47
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3531 \| not RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3532 \| mov RA, UPVAL:RB->v
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3533 \| mov [RA], RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3534 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3535 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3536 case BC_UCLO:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3537 \| ins_AD // RA = level, RD = target
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3538 \| branchPC RD // Do this first to free RD.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3539 \| mov L:RB, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3540 \| cmp aword L:RB->openupval, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3541 \| je >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3542 \| mov L:RB->base, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3543 \| lea CARG2, [BASE+RA*8] // Caveat: CARG2 == BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3544 \| mov L:CARG1, L:RB // Caveat: CARG1 == RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3545 \| call extern lj_func_closeuv // (lua_State L, TValue level)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3546 \| mov BASE, L:RB->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3547 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3548 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3549 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3550
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3551 case BC_FNEW:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3552 \| ins_AND // RA = dst, RD = proto const (~) (holding function prototype)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3553 \| mov L:RB, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3554 \| mov L:RB->base, BASE // Caveat: CARG2/CARG3 may be BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3555 \| mov CARG3, [BASE-16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3556 \| cleartp CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3557 \| mov CARG2, [KBASE+RD8] // Fetch GCproto .
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3558 \| mov CARG1, L:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3559 \| mov SAVE_PC, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3560 \| // (lua_State L, GCproto pt, GCfuncL *parent)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3561 \| call extern lj_func_newL_gc
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3562 \| // GCfuncL * returned in eax (RC).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3563 \| mov BASE, L:RB->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3564 \| movzx RAd, PC_RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3565 \| settp LFUNC:RC, LJ_TFUNC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3566 \| mov [BASE+RA*8], LFUNC:RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3567 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3568 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3569
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3570 /* -- Table ops --------------------------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3571
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3572 case BC_TNEW:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3573 \| ins_AD // RA = dst, RD = hbits\|asize
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3574 \| mov L:RB, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3575 \| mov L:RB->base, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3576 \| mov RA, [DISPATCH+DISPATCH_GL(gc.total)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3577 \| cmp RA, [DISPATCH+DISPATCH_GL(gc.threshold)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3578 \| mov SAVE_PC, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3579 \| jae >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3580 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3581 \| mov CARG3d, RDd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3582 \| and RDd, 0x7ff
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3583 \| shr CARG3d, 11
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3584 \| cmp RDd, 0x7ff
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3585 \| je >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3586 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3587 \| mov L:CARG1, L:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3588 \| mov CARG2d, RDd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3589 \| call extern lj_tab_new // (lua_State *L, int32_t asize, uint32_t hbits)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3590 \| // Table * returned in eax (RC).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3591 \| mov BASE, L:RB->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3592 \| movzx RAd, PC_RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3593 \| settp TAB:RC, LJ_TTAB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3594 \| mov [BASE+RA*8], TAB:RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3595 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3596 \|3: // Turn 0x7ff into 0x801.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3597 \| mov RDd, 0x801
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3598 \| jmp <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3599 \|5:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3600 \| mov L:CARG1, L:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3601 \| call extern lj_gc_step_fixtop // (lua_State *L)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3602 \| movzx RDd, PC_RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3603 \| jmp <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3604 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3605 case BC_TDUP:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3606 \| ins_AND // RA = dst, RD = table const (~) (holding template table)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3607 \| mov L:RB, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3608 \| mov RA, [DISPATCH+DISPATCH_GL(gc.total)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3609 \| mov SAVE_PC, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3610 \| cmp RA, [DISPATCH+DISPATCH_GL(gc.threshold)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3611 \| mov L:RB->base, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3612 \| jae >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3613 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3614 \| mov TAB:CARG2, [KBASE+RD*8] // Caveat: CARG2 == BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3615 \| mov L:CARG1, L:RB // Caveat: CARG1 == RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3616 \| call extern lj_tab_dup // (lua_State L, Table kt)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3617 \| // Table * returned in eax (RC).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3618 \| mov BASE, L:RB->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3619 \| movzx RAd, PC_RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3620 \| settp TAB:RC, LJ_TTAB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3621 \| mov [BASE+RA*8], TAB:RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3622 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3623 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3624 \| mov L:CARG1, L:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3625 \| call extern lj_gc_step_fixtop // (lua_State *L)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3626 \| movzx RDd, PC_RD // Need to reload RD.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3627 \| not RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3628 \| jmp <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3629 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3630
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3631 case BC_GGET:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3632 \| ins_AND // RA = dst, RD = str const (~)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3633 \| mov LFUNC:RB, [BASE-16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3634 \| cleartp LFUNC:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3635 \| mov TAB:RB, LFUNC:RB->env
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3636 \| mov STR:RC, [KBASE+RD*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3637 \| jmp ->BC_TGETS_Z
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3638 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3639 case BC_GSET:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3640 \| ins_AND // RA = src, RD = str const (~)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3641 \| mov LFUNC:RB, [BASE-16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3642 \| cleartp LFUNC:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3643 \| mov TAB:RB, LFUNC:RB->env
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3644 \| mov STR:RC, [KBASE+RD*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3645 \| jmp ->BC_TSETS_Z
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3646 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3647
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3648 case BC_TGETV:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3649 \| ins_ABC // RA = dst, RB = table, RC = key
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3650 \| mov TAB:RB, [BASE+RB*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3651 \| mov RC, [BASE+RC*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3652 \| checktab TAB:RB, ->vmeta_tgetv
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3653 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3654 \| // Integer key?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3655 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3656 \| checkint RC, >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3657 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3658 \| // Convert number to int and back and compare.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3659 \| checknum RC, >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3660 \| movd xmm0, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3661 \| cvttsd2si RCd, xmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3662 \| cvtsi2sd xmm1, RCd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3663 \| ucomisd xmm0, xmm1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3664 \| jne ->vmeta_tgetv // Generic numeric key? Use fallback.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3665 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3666 \| cmp RCd, TAB:RB->asize // Takes care of unordered, too.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3667 \| jae ->vmeta_tgetv // Not in array part? Use fallback.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3668 \| shl RCd, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3669 \| add RC, TAB:RB->array
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3670 \| // Get array slot.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3671 \| mov ITYPE, [RC]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3672 \| cmp ITYPE, LJ_TNIL // Avoid overwriting RB in fastpath.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3673 \| je >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3674 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3675 \| mov [BASE+RA*8], ITYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3676 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3677 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3678 \|2: // Check for __index if table value is nil.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3679 \| mov TAB:TMPR, TAB:RB->metatable
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3680 \| test TAB:TMPR, TAB:TMPR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3681 \| jz <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3682 \| test byte TAB:TMPR->nomm, 1<<MM_index
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3683 \| jz ->vmeta_tgetv // 'no __index' flag NOT set: check.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3684 \| jmp <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3685 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3686 \|5: // String key?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3687 \| cmp ITYPEd, LJ_TSTR; jne ->vmeta_tgetv
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3688 \| cleartp STR:RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3689 \| jmp ->BC_TGETS_Z
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3690 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3691 case BC_TGETS:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3692 \| ins_ABC // RA = dst, RB = table, RC = str const (~)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3693 \| mov TAB:RB, [BASE+RB*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3694 \| not RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3695 \| mov STR:RC, [KBASE+RC*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3696 \| checktab TAB:RB, ->vmeta_tgets
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3697 \|->BC_TGETS_Z: // RB = GCtab , RC = GCstr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3698 \| mov TMPRd, TAB:RB->hmask
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3699 \| and TMPRd, STR:RC->sid
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3700 \| imul TMPRd, #NODE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3701 \| add NODE:TMPR, TAB:RB->node
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3702 \| settp ITYPE, STR:RC, LJ_TSTR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3703 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3704 \| cmp NODE:TMPR->key, ITYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3705 \| jne >4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3706 \| // Get node value.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3707 \| mov ITYPE, NODE:TMPR->val
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3708 \| cmp ITYPE, LJ_TNIL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3709 \| je >5 // Key found, but nil value?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3710 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3711 \| mov [BASE+RA*8], ITYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3712 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3713 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3714 \|4: // Follow hash chain.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3715 \| mov NODE:TMPR, NODE:TMPR->next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3716 \| test NODE:TMPR, NODE:TMPR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3717 \| jnz <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3718 \| // End of hash chain: key not found, nil result.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3719 \| mov ITYPE, LJ_TNIL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3720 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3721 \|5: // Check for __index if table value is nil.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3722 \| mov TAB:TMPR, TAB:RB->metatable
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3723 \| test TAB:TMPR, TAB:TMPR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3724 \| jz <2 // No metatable: done.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3725 \| test byte TAB:TMPR->nomm, 1<<MM_index
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3726 \| jnz <2 // 'no __index' flag set: done.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3727 \| jmp ->vmeta_tgets // Caveat: preserve STR:RC.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3728 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3729 case BC_TGETB:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3730 \| ins_ABC // RA = dst, RB = table, RC = byte literal
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3731 \| mov TAB:RB, [BASE+RB*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3732 \| checktab TAB:RB, ->vmeta_tgetb
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3733 \| cmp RCd, TAB:RB->asize
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3734 \| jae ->vmeta_tgetb
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3735 \| shl RCd, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3736 \| add RC, TAB:RB->array
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3737 \| // Get array slot.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3738 \| mov ITYPE, [RC]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3739 \| cmp ITYPE, LJ_TNIL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3740 \| je >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3741 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3742 \| mov [BASE+RA*8], ITYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3743 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3744 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3745 \|2: // Check for __index if table value is nil.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3746 \| mov TAB:TMPR, TAB:RB->metatable
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3747 \| test TAB:TMPR, TAB:TMPR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3748 \| jz <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3749 \| test byte TAB:TMPR->nomm, 1<<MM_index
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3750 \| jz ->vmeta_tgetb // 'no __index' flag NOT set: check.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3751 \| jmp <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3752 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3753 case BC_TGETR:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3754 \| ins_ABC // RA = dst, RB = table, RC = key
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3755 \| mov TAB:RB, [BASE+RB*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3756 \| cleartp TAB:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3757 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3758 \| mov RCd, dword [BASE+RC*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3759 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3760 \| cvttsd2si RCd, qword [BASE+RC*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3761 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3762 \| cmp RCd, TAB:RB->asize
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3763 \| jae ->vmeta_tgetr // Not in array part? Use fallback.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3764 \| shl RCd, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3765 \| add RC, TAB:RB->array
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3766 \| // Get array slot.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3767 \|->BC_TGETR_Z:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3768 \| mov ITYPE, [RC]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3769 \|->BC_TGETR2_Z:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3770 \| mov [BASE+RA*8], ITYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3771 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3772 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3773
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3774 case BC_TSETV:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3775 \| ins_ABC // RA = src, RB = table, RC = key
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3776 \| mov TAB:RB, [BASE+RB*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3777 \| mov RC, [BASE+RC*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3778 \| checktab TAB:RB, ->vmeta_tsetv
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3779 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3780 \| // Integer key?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3781 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3782 \| checkint RC, >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3783 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3784 \| // Convert number to int and back and compare.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3785 \| checknum RC, >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3786 \| movd xmm0, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3787 \| cvttsd2si RCd, xmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3788 \| cvtsi2sd xmm1, RCd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3789 \| ucomisd xmm0, xmm1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3790 \| jne ->vmeta_tsetv // Generic numeric key? Use fallback.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3791 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3792 \| cmp RCd, TAB:RB->asize // Takes care of unordered, too.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3793 \| jae ->vmeta_tsetv
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3794 \| shl RCd, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3795 \| add RC, TAB:RB->array
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3796 \| cmp aword [RC], LJ_TNIL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3797 \| je >3 // Previous value is nil?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3798 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3799 \| test byte TAB:RB->marked, LJ_GC_BLACK // isblack(table)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3800 \| jnz >7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3801 \|2: // Set array slot.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3802 \| mov RB, [BASE+RA*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3803 \| mov [RC], RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3804 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3805 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3806 \|3: // Check for __newindex if previous value is nil.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3807 \| mov TAB:TMPR, TAB:RB->metatable
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3808 \| test TAB:TMPR, TAB:TMPR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3809 \| jz <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3810 \| test byte TAB:TMPR->nomm, 1<<MM_newindex
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3811 \| jz ->vmeta_tsetv // 'no __newindex' flag NOT set: check.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3812 \| jmp <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3813 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3814 \|5: // String key?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3815 \| cmp ITYPEd, LJ_TSTR; jne ->vmeta_tsetv
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3816 \| cleartp STR:RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3817 \| jmp ->BC_TSETS_Z
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3818 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3819 \|7: // Possible table write barrier for the value. Skip valiswhite check.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3820 \| barrierback TAB:RB, TMPR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3821 \| jmp <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3822 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3823 case BC_TSETS:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3824 \| ins_ABC // RA = src, RB = table, RC = str const (~)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3825 \| mov TAB:RB, [BASE+RB*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3826 \| not RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3827 \| mov STR:RC, [KBASE+RC*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3828 \| checktab TAB:RB, ->vmeta_tsets
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3829 \|->BC_TSETS_Z: // RB = GCtab , RC = GCstr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3830 \| mov TMPRd, TAB:RB->hmask
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3831 \| and TMPRd, STR:RC->sid
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3832 \| imul TMPRd, #NODE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3833 \| mov byte TAB:RB->nomm, 0 // Clear metamethod cache.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3834 \| add NODE:TMPR, TAB:RB->node
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3835 \| settp ITYPE, STR:RC, LJ_TSTR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3836 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3837 \| cmp NODE:TMPR->key, ITYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3838 \| jne >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3839 \| // Ok, key found. Assumes: offsetof(Node, val) == 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3840 \| cmp aword [TMPR], LJ_TNIL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3841 \| je >4 // Previous value is nil?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3842 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3843 \| test byte TAB:RB->marked, LJ_GC_BLACK // isblack(table)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3844 \| jnz >7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3845 \|3: // Set node value.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3846 \| mov ITYPE, [BASE+RA*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3847 \| mov [TMPR], ITYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3848 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3849 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3850 \|4: // Check for __newindex if previous value is nil.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3851 \| mov TAB:ITYPE, TAB:RB->metatable
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3852 \| test TAB:ITYPE, TAB:ITYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3853 \| jz <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3854 \| test byte TAB:ITYPE->nomm, 1<<MM_newindex
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3855 \| jz ->vmeta_tsets // 'no __newindex' flag NOT set: check.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3856 \| jmp <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3857 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3858 \|5: // Follow hash chain.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3859 \| mov NODE:TMPR, NODE:TMPR->next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3860 \| test NODE:TMPR, NODE:TMPR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3861 \| jnz <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3862 \| // End of hash chain: key not found, add a new one.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3863 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3864 \| // But check for __newindex first.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3865 \| mov TAB:TMPR, TAB:RB->metatable
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3866 \| test TAB:TMPR, TAB:TMPR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3867 \| jz >6 // No metatable: continue.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3868 \| test byte TAB:TMPR->nomm, 1<<MM_newindex
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3869 \| jz ->vmeta_tsets // 'no __newindex' flag NOT set: check.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3870 \|6:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3871 \| mov TMP1, ITYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3872 \| mov L:CARG1, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3873 \| mov L:CARG1->base, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3874 \| lea CARG3, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3875 \| mov CARG2, TAB:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3876 \| mov SAVE_PC, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3877 \| call extern lj_tab_newkey // (lua_State L, GCtab t, TValue *k)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3878 \| // Handles write barrier for the new key. TValue * returned in eax (RC).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3879 \| mov L:CARG1, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3880 \| mov BASE, L:CARG1->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3881 \| mov TMPR, rax
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3882 \| movzx RAd, PC_RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3883 \| jmp <2 // Must check write barrier for value.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3884 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3885 \|7: // Possible table write barrier for the value. Skip valiswhite check.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3886 \| barrierback TAB:RB, ITYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3887 \| jmp <3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3888 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3889 case BC_TSETB:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3890 \| ins_ABC // RA = src, RB = table, RC = byte literal
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3891 \| mov TAB:RB, [BASE+RB*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3892 \| checktab TAB:RB, ->vmeta_tsetb
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3893 \| cmp RCd, TAB:RB->asize
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3894 \| jae ->vmeta_tsetb
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3895 \| shl RCd, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3896 \| add RC, TAB:RB->array
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3897 \| cmp aword [RC], LJ_TNIL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3898 \| je >3 // Previous value is nil?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3899 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3900 \| test byte TAB:RB->marked, LJ_GC_BLACK // isblack(table)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3901 \| jnz >7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3902 \|2: // Set array slot.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3903 \| mov ITYPE, [BASE+RA*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3904 \| mov [RC], ITYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3905 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3906 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3907 \|3: // Check for __newindex if previous value is nil.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3908 \| mov TAB:TMPR, TAB:RB->metatable
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3909 \| test TAB:TMPR, TAB:TMPR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3910 \| jz <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3911 \| test byte TAB:TMPR->nomm, 1<<MM_newindex
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3912 \| jz ->vmeta_tsetb // 'no __newindex' flag NOT set: check.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3913 \| jmp <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3914 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3915 \|7: // Possible table write barrier for the value. Skip valiswhite check.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3916 \| barrierback TAB:RB, TMPR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3917 \| jmp <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3918 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3919 case BC_TSETR:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3920 \| ins_ABC // RA = src, RB = table, RC = key
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3921 \| mov TAB:RB, [BASE+RB*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3922 \| cleartp TAB:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3923 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3924 \| mov RC, [BASE+RC*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3925 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3926 \| cvttsd2si RCd, qword [BASE+RC*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3927 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3928 \| test byte TAB:RB->marked, LJ_GC_BLACK // isblack(table)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3929 \| jnz >7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3930 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3931 \| cmp RCd, TAB:RB->asize
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3932 \| jae ->vmeta_tsetr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3933 \| shl RCd, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3934 \| add RC, TAB:RB->array
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3935 \| // Set array slot.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3936 \|->BC_TSETR_Z:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3937 \| mov ITYPE, [BASE+RA*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3938 \| mov [RC], ITYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3939 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3940 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3941 \|7: // Possible table write barrier for the value. Skip valiswhite check.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3942 \| barrierback TAB:RB, TMPR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3943 \| jmp <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3944 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3945
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3946 case BC_TSETM:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3947 \| ins_AD // RA = base (table at base-1), RD = num const (start index)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3948 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3949 \| mov TMPRd, dword [KBASE+RD*8] // Integer constant is in lo-word.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3950 \| lea RA, [BASE+RA*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3951 \| mov TAB:RB, [RA-8] // Guaranteed to be a table.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3952 \| cleartp TAB:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3953 \| test byte TAB:RB->marked, LJ_GC_BLACK // isblack(table)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3954 \| jnz >7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3955 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3956 \| mov RDd, MULTRES
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3957 \| sub RDd, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3958 \| jz >4 // Nothing to copy?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3959 \| add RDd, TMPRd // Compute needed size.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3960 \| cmp RDd, TAB:RB->asize
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3961 \| ja >5 // Doesn't fit into array part?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3962 \| sub RDd, TMPRd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3963 \| shl TMPRd, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3964 \| add TMPR, TAB:RB->array
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3965 \|3: // Copy result slots to table.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3966 \| mov RB, [RA]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3967 \| add RA, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3968 \| mov [TMPR], RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3969 \| add TMPR, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3970 \| sub RDd, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3971 \| jnz <3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3972 \|4:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3973 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3974 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3975 \|5: // Need to resize array part.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3976 \| mov L:CARG1, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3977 \| mov L:CARG1->base, BASE // Caveat: CARG2/CARG3 may be BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3978 \| mov CARG2, TAB:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3979 \| mov CARG3d, RDd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3980 \| mov L:RB, L:CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3981 \| mov SAVE_PC, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3982 \| call extern lj_tab_reasize // (lua_State L, GCtab t, int nasize)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3983 \| mov BASE, L:RB->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3984 \| movzx RAd, PC_RA // Restore RA.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3985 \| movzx RDd, PC_RD // Restore RD.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3986 \| jmp <1 // Retry.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3987 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3988 \|7: // Possible table write barrier for any value. Skip valiswhite check.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3989 \| barrierback TAB:RB, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3990 \| jmp <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3991 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3992
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3993 /* -- Calls and vararg handling ----------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3994
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3995 case BC_CALL: case BC_CALLM:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3996 \| ins_A_C // RA = base, (RB = nresults+1,) RC = nargs+1 \| extra_nargs
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3997 if (op == BC_CALLM) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3998 \| add NARGS:RDd, MULTRES
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3999 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4000 \| mov LFUNC:RB, [BASE+RA*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4001 \| checkfunc LFUNC:RB, ->vmeta_call_ra
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4002 \| lea BASE, [BASE+RA*8+16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4003 \| ins_call
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4004 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4005
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4006 case BC_CALLMT:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4007 \| ins_AD // RA = base, RD = extra_nargs
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4008 \| add NARGS:RDd, MULTRES
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4009 \| // Fall through. Assumes BC_CALLT follows and ins_AD is a no-op.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4010 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4011 case BC_CALLT:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4012 \| ins_AD // RA = base, RD = nargs+1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4013 \| lea RA, [BASE+RA*8+16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4014 \| mov KBASE, BASE // Use KBASE for move + vmeta_call hint.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4015 \| mov LFUNC:RB, [RA-16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4016 \| checktp_nc LFUNC:RB, LJ_TFUNC, ->vmeta_call
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4017 \|->BC_CALLT_Z:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4018 \| mov PC, [BASE-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4019 \| test PCd, FRAME_TYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4020 \| jnz >7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4021 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4022 \| mov [BASE-16], LFUNC:RB // Copy func+tag down, reloaded below.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4023 \| mov MULTRES, NARGS:RDd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4024 \| sub NARGS:RDd, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4025 \| jz >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4026 \|2: // Move args down.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4027 \| mov RB, [RA]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4028 \| add RA, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4029 \| mov [KBASE], RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4030 \| add KBASE, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4031 \| sub NARGS:RDd, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4032 \| jnz <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4033 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4034 \| mov LFUNC:RB, [BASE-16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4035 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4036 \| cleartp LFUNC:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4037 \| mov NARGS:RDd, MULTRES
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4038 \| cmp byte LFUNC:RB->ffid, 1 // (> FF_C) Calling a fast function?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4039 \| ja >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4040 \|4:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4041 \| ins_callt
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4042 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4043 \|5: // Tailcall to a fast function.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4044 \| test PCd, FRAME_TYPE // Lua frame below?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4045 \| jnz <4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4046 \| movzx RAd, PC_RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4047 \| neg RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4048 \| mov LFUNC:KBASE, [BASE+RA*8-32] // Need to prepare KBASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4049 \| cleartp LFUNC:KBASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4050 \| mov KBASE, LFUNC:KBASE->pc
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4051 \| mov KBASE, [KBASE+PC2PROTO(k)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4052 \| jmp <4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4053 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4054 \|7: // Tailcall from a vararg function.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4055 \| sub PC, FRAME_VARG
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4056 \| test PCd, FRAME_TYPEP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4057 \| jnz >8 // Vararg frame below?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4058 \| sub BASE, PC // Need to relocate BASE/KBASE down.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4059 \| mov KBASE, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4060 \| mov PC, [BASE-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4061 \| jmp <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4062 \|8:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4063 \| add PCd, FRAME_VARG
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4064 \| jmp <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4065 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4066
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4067 case BC_ITERC:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4068 \| ins_A // RA = base, (RB = nresults+1,) RC = nargs+1 (2+1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4069 \| lea RA, [BASE+RA*8+16] // fb = base+2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4070 \| mov RB, [RA-32] // Copy state. fb[0] = fb[-4].
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4071 \| mov RC, [RA-24] // Copy control var. fb[1] = fb[-3].
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4072 \| mov [RA], RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4073 \| mov [RA+8], RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4074 \| mov LFUNC:RB, [RA-40] // Copy callable. fb[-2] = fb[-5]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4075 \| mov [RA-16], LFUNC:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4076 \| mov NARGS:RDd, 2+1 // Handle like a regular 2-arg call.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4077 \| checkfunc LFUNC:RB, ->vmeta_call
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4078 \| mov BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4079 \| ins_call
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4080 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4081
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4082 case BC_ITERN:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4083 \|.if JIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4084 \| hotloop RBd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4085 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4086 \|->vm_IITERN:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4087 \| ins_A // RA = base, (RB = nresults+1, RC = nargs+1 (2+1))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4088 \| mov TAB:RB, [BASE+RA*8-16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4089 \| cleartp TAB:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4090 \| mov RCd, [BASE+RA*8-8] // Get index from control var.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4091 \| mov TMPRd, TAB:RB->asize
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4092 \| add PC, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4093 \| mov ITYPE, TAB:RB->array
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4094 \|1: // Traverse array part.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4095 \| cmp RCd, TMPRd; jae >5 // Index points after array part?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4096 \| cmp aword [ITYPE+RC*8], LJ_TNIL; je >4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4097 \|.if not DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4098 \| cvtsi2sd xmm0, RCd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4099 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4100 \| // Copy array slot to returned value.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4101 \| mov RB, [ITYPE+RC*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4102 \| mov [BASE+RA*8+8], RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4103 \| // Return array index as a numeric key.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4104 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4105 \| setint ITYPE, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4106 \| mov [BASE+RA*8], ITYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4107 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4108 \| movsd qword [BASE+RA*8], xmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4109 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4110 \| add RCd, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4111 \| mov [BASE+RA*8-8], RCd // Update control var.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4112 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4113 \| movzx RDd, PC_RD // Get target from ITERL.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4114 \| branchPC RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4115 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4116 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4117 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4118 \|4: // Skip holes in array part.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4119 \| add RCd, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4120 \| jmp <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4121 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4122 \|5: // Traverse hash part.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4123 \| sub RCd, TMPRd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4124 \|6:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4125 \| cmp RCd, TAB:RB->hmask; ja <3 // End of iteration? Branch to ITERL+1.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4126 \| imul ITYPEd, RCd, #NODE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4127 \| add NODE:ITYPE, TAB:RB->node
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4128 \| cmp aword NODE:ITYPE->val, LJ_TNIL; je >7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4129 \| lea TMPRd, [RCd+TMPRd+1]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4130 \| // Copy key and value from hash slot.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4131 \| mov RB, NODE:ITYPE->key
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4132 \| mov RC, NODE:ITYPE->val
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4133 \| mov [BASE+RA*8], RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4134 \| mov [BASE+RA*8+8], RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4135 \| mov [BASE+RA*8-8], TMPRd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4136 \| jmp <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4137 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4138 \|7: // Skip holes in hash part.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4139 \| add RCd, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4140 \| jmp <6
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4141 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4142
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4143 case BC_ISNEXT:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4144 \| ins_AD // RA = base, RD = target (points to ITERN)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4145 \| mov CFUNC:RB, [BASE+RA*8-24]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4146 \| checkfunc CFUNC:RB, >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4147 \| checktptp [BASE+RA*8-16], LJ_TTAB, >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4148 \| cmp aword [BASE+RA*8-8], LJ_TNIL; jne >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4149 \| cmp byte CFUNC:RB->ffid, FF_next_N; jne >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4150 \| branchPC RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4151 \| mov64 TMPR, ((uint64_t)LJ_KEYINDEX << 32)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4152 \| mov [BASE+RA*8-8], TMPR // Initialize control var.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4153 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4154 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4155 \|5: // Despecialize bytecode if any of the checks fail.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4156 \| mov PC_OP, BC_JMP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4157 \| branchPC RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4158 \|.if JIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4159 \| cmp byte [PC], BC_ITERN
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4160 \| jne >6
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4161 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4162 \| mov byte [PC], BC_ITERC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4163 \| jmp <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4164 \|.if JIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4165 \|6: // Unpatch JLOOP.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4166 \| mov RA, [DISPATCH+DISPATCH_J(trace)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4167 \| movzx RCd, word [PC+2]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4168 \| mov TRACE:RA, [RA+RC*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4169 \| mov eax, TRACE:RA->startins
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4170 \| mov al, BC_ITERC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4171 \| mov dword [PC], eax
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4172 \| jmp <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4173 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4174 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4175
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4176 case BC_VARG:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4177 \| ins_ABC // RA = base, RB = nresults+1, RC = numparams
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4178 \| lea TMPR, [BASE+RC*8+(16+FRAME_VARG)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4179 \| lea RA, [BASE+RA*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4180 \| sub TMPR, [BASE-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4181 \| // Note: TMPR may now be even _above_ BASE if nargs was < numparams.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4182 \| test RB, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4183 \| jz >5 // Copy all varargs?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4184 \| lea RB, [RA+RB*8-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4185 \| cmp TMPR, BASE // No vararg slots?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4186 \| jnb >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4187 \|1: // Copy vararg slots to destination slots.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4188 \| mov RC, [TMPR-16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4189 \| add TMPR, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4190 \| mov [RA], RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4191 \| add RA, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4192 \| cmp RA, RB // All destination slots filled?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4193 \| jnb >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4194 \| cmp TMPR, BASE // No more vararg slots?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4195 \| jb <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4196 \|2: // Fill up remainder with nil.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4197 \| mov aword [RA], LJ_TNIL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4198 \| add RA, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4199 \| cmp RA, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4200 \| jb <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4201 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4202 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4203 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4204 \|5: // Copy all varargs.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4205 \| mov MULTRES, 1 // MULTRES = 0+1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4206 \| mov RC, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4207 \| sub RC, TMPR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4208 \| jbe <3 // No vararg slots?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4209 \| mov RBd, RCd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4210 \| shr RBd, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4211 \| add RBd, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4212 \| mov MULTRES, RBd // MULTRES = #varargs+1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4213 \| mov L:RB, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4214 \| add RC, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4215 \| cmp RC, L:RB->maxstack
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4216 \| ja >7 // Need to grow stack?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4217 \|6: // Copy all vararg slots.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4218 \| mov RC, [TMPR-16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4219 \| add TMPR, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4220 \| mov [RA], RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4221 \| add RA, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4222 \| cmp TMPR, BASE // No more vararg slots?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4223 \| jb <6
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4224 \| jmp <3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4225 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4226 \|7: // Grow stack for varargs.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4227 \| mov L:RB->base, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4228 \| mov L:RB->top, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4229 \| mov SAVE_PC, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4230 \| sub TMPR, BASE // Need delta, because BASE may change.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4231 \| mov TMP1hi, TMPRd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4232 \| mov CARG2d, MULTRES
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4233 \| sub CARG2d, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4234 \| mov CARG1, L:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4235 \| call extern lj_state_growstack // (lua_State *L, int n)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4236 \| mov BASE, L:RB->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4237 \| movsxd TMPR, TMP1hi
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4238 \| mov RA, L:RB->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4239 \| add TMPR, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4240 \| jmp <6
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4241 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4242
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4243 /* -- Returns ----------------------------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4244
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4245 case BC_RETM:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4246 \| ins_AD // RA = results, RD = extra_nresults
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4247 \| add RDd, MULTRES // MULTRES >=1, so RD >=1.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4248 \| // Fall through. Assumes BC_RET follows and ins_AD is a no-op.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4249 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4250
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4251 case BC_RET: case BC_RET0: case BC_RET1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4252 \| ins_AD // RA = results, RD = nresults+1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4253 if (op != BC_RET0) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4254 \| shl RAd, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4255 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4256 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4257 \| mov PC, [BASE-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4258 \| mov MULTRES, RDd // Save nresults+1.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4259 \| test PCd, FRAME_TYPE // Check frame type marker.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4260 \| jnz >7 // Not returning to a fixarg Lua func?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4261 switch (op) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4262 case BC_RET:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4263 \|->BC_RET_Z:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4264 \| mov KBASE, BASE // Use KBASE for result move.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4265 \| sub RDd, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4266 \| jz >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4267 \|2: // Move results down.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4268 \| mov RB, [KBASE+RA]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4269 \| mov [KBASE-16], RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4270 \| add KBASE, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4271 \| sub RDd, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4272 \| jnz <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4273 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4274 \| mov RDd, MULTRES // Note: MULTRES may be >255.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4275 \| movzx RBd, PC_RB // So cannot compare with RDL!
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4276 \|5:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4277 \| cmp RBd, RDd // More results expected?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4278 \| ja >6
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4279 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4280 case BC_RET1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4281 \| mov RB, [BASE+RA]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4282 \| mov [BASE-16], RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4283 /* fallthrough */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4284 case BC_RET0:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4285 \|5:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4286 \| cmp PC_RB, RDL // More results expected?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4287 \| ja >6
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4288 default:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4289 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4290 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4291 \| movzx RAd, PC_RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4292 \| neg RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4293 \| lea BASE, [BASE+RA8-16] // base = base - (RA+2)8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4294 \| mov LFUNC:KBASE, [BASE-16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4295 \| cleartp LFUNC:KBASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4296 \| mov KBASE, LFUNC:KBASE->pc
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4297 \| mov KBASE, [KBASE+PC2PROTO(k)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4298 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4299 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4300 \|6: // Fill up results with nil.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4301 if (op == BC_RET) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4302 \| mov aword [KBASE-16], LJ_TNIL // Note: relies on shifted base.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4303 \| add KBASE, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4304 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4305 \| mov aword [BASE+RD*8-24], LJ_TNIL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4306 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4307 \| add RD, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4308 \| jmp <5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4309 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4310 \|7: // Non-standard return case.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4311 \| lea RB, [PC-FRAME_VARG]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4312 \| test RBd, FRAME_TYPEP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4313 \| jnz ->vm_return
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4314 \| // Return from vararg function: relocate BASE down and RA up.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4315 \| sub BASE, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4316 if (op != BC_RET0) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4317 \| add RA, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4318 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4319 \| jmp <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4320 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4321
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4322 /* -- Loops and branches ------------------------------------------------ */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4323
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4324 \|.define FOR_IDX, [RA]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4325 \|.define FOR_STOP, [RA+8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4326 \|.define FOR_STEP, [RA+16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4327 \|.define FOR_EXT, [RA+24]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4328
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4329 case BC_FORL:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4330 \|.if JIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4331 \| hotloop RBd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4332 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4333 \| // Fall through. Assumes BC_IFORL follows and ins_AJ is a no-op.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4334 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4335
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4336 case BC_JFORI:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4337 case BC_JFORL:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4338 #if !LJ_HASJIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4339 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4340 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4341 case BC_FORI:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4342 case BC_IFORL:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4343 vk = (op == BC_IFORL \|\| op == BC_JFORL);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4344 \| ins_AJ // RA = base, RD = target (after end of loop or start of loop)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4345 \| lea RA, [BASE+RA*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4346 if (LJ_DUALNUM) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4347 \| mov RB, FOR_IDX
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4348 \| checkint RB, >9
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4349 \| mov TMPR, FOR_STOP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4350 if (!vk) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4351 \| checkint TMPR, ->vmeta_for
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4352 \| mov ITYPE, FOR_STEP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4353 \| test ITYPEd, ITYPEd; js >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4354 \| sar ITYPE, 47;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4355 \| cmp ITYPEd, LJ_TISNUM; jne ->vmeta_for
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4356 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4357 #ifdef LUA_USE_ASSERT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4358 \| checkinttp FOR_STOP, ->assert_bad_for_arg_type
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4359 \| checkinttp FOR_STEP, ->assert_bad_for_arg_type
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4360 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4361 \| mov ITYPE, FOR_STEP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4362 \| test ITYPEd, ITYPEd; js >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4363 \| add RBd, ITYPEd; jo >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4364 \| setint RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4365 \| mov FOR_IDX, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4366 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4367 \| cmp RBd, TMPRd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4368 \| mov FOR_EXT, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4369 if (op == BC_FORI) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4370 \| jle >7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4371 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4372 \|6:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4373 \| branchPC RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4374 } else if (op == BC_JFORI) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4375 \| branchPC RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4376 \| movzx RDd, PC_RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4377 \| jle =>BC_JLOOP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4378 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4379 \|6:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4380 } else if (op == BC_IFORL) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4381 \| jg >7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4382 \|6:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4383 \| branchPC RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4384 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4385 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4386 \| jle =>BC_JLOOP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4387 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4388 \|6:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4389 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4390 \|7:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4391 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4392 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4393 \|5: // Invert check for negative step.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4394 if (!vk) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4395 \| sar ITYPE, 47;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4396 \| cmp ITYPEd, LJ_TISNUM; jne ->vmeta_for
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4397 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4398 \| add RBd, ITYPEd; jo <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4399 \| setint RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4400 \| mov FOR_IDX, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4401 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4402 \| cmp RBd, TMPRd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4403 \| mov FOR_EXT, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4404 if (op == BC_FORI) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4405 \| jge <7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4406 } else if (op == BC_JFORI) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4407 \| branchPC RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4408 \| movzx RDd, PC_RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4409 \| jge =>BC_JLOOP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4410 } else if (op == BC_IFORL) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4411 \| jl <7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4412 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4413 \| jge =>BC_JLOOP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4414 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4415 \| jmp <6
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4416 \|9: // Fallback to FP variant.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4417 if (!vk) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4418 \| jae ->vmeta_for
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4419 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4420 } else if (!vk) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4421 \| checknumtp FOR_IDX, ->vmeta_for
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4422 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4423 if (!vk) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4424 \| checknumtp FOR_STOP, ->vmeta_for
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4425 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4426 #ifdef LUA_USE_ASSERT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4427 \| checknumtp FOR_STOP, ->assert_bad_for_arg_type
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4428 \| checknumtp FOR_STEP, ->assert_bad_for_arg_type
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4429 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4430 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4431 \| mov RB, FOR_STEP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4432 if (!vk) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4433 \| checknum RB, ->vmeta_for
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4434 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4435 \| movsd xmm0, qword FOR_IDX
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4436 \| movsd xmm1, qword FOR_STOP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4437 if (vk) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4438 \| addsd xmm0, qword FOR_STEP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4439 \| movsd qword FOR_IDX, xmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4440 \| test RB, RB; js >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4441 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4442 \| jl >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4443 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4444 \| ucomisd xmm1, xmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4445 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4446 \| movsd qword FOR_EXT, xmm0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4447 if (op == BC_FORI) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4448 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4449 \| jnb <7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4450 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4451 \| jnb >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4452 \| branchPC RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4453 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4454 } else if (op == BC_JFORI) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4455 \| branchPC RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4456 \| movzx RDd, PC_RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4457 \| jnb =>BC_JLOOP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4458 } else if (op == BC_IFORL) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4459 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4460 \| jb <7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4461 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4462 \| jb >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4463 \| branchPC RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4464 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4465 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4466 \| jnb =>BC_JLOOP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4467 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4468 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4469 \| jmp <6
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4470 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4471 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4472 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4473 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4474 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4475 \|3: // Invert comparison if step is negative.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4476 \| ucomisd xmm0, xmm1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4477 \| jmp <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4478 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4479
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4480 case BC_ITERL:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4481 \|.if JIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4482 \| hotloop RBd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4483 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4484 \| // Fall through. Assumes BC_IITERL follows and ins_AJ is a no-op.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4485 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4486
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4487 case BC_JITERL:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4488 #if !LJ_HASJIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4489 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4490 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4491 case BC_IITERL:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4492 \| ins_AJ // RA = base, RD = target
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4493 \| lea RA, [BASE+RA*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4494 \| mov RB, [RA]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4495 \| cmp RB, LJ_TNIL; je >1 // Stop if iterator returned nil.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4496 if (op == BC_JITERL) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4497 \| mov [RA-8], RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4498 \| jmp =>BC_JLOOP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4499 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4500 \| branchPC RD // Otherwise save control var + branch.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4501 \| mov [RA-8], RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4502 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4503 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4504 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4505 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4506
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4507 case BC_LOOP:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4508 \| ins_A // RA = base, RD = target (loop extent)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4509 \| // Note: RA/RD is only used by trace recorder to determine scope/extent
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4510 \| // This opcode does NOT jump, it's only purpose is to detect a hot loop.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4511 \|.if JIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4512 \| hotloop RBd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4513 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4514 \| // Fall through. Assumes BC_ILOOP follows and ins_A is a no-op.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4515 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4516
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4517 case BC_ILOOP:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4518 \| ins_A // RA = base, RD = target (loop extent)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4519 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4520 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4521
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4522 case BC_JLOOP:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4523 \|.if JIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4524 \| ins_AD // RA = base (ignored), RD = traceno
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4525 \| mov RA, [DISPATCH+DISPATCH_J(trace)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4526 \| mov TRACE:RD, [RA+RD*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4527 \| mov RD, TRACE:RD->mcode
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4528 \| mov L:RB, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4529 \| mov [DISPATCH+DISPATCH_GL(jit_base)], BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4530 \| mov [DISPATCH+DISPATCH_GL(tmpbuf.L)], L:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4531 \| // Save additional callee-save registers only used in compiled code.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4532 \|.if X64WIN
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4533 \| mov CSAVE_4, r12
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4534 \| mov CSAVE_3, r13
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4535 \| mov CSAVE_2, r14
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4536 \| mov CSAVE_1, r15
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4537 \| mov RA, rsp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4538 \| sub rsp, 1016+48
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4539 \| movdqa [RA-1*16], xmm6
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4540 \| movdqa [RA-2*16], xmm7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4541 \| movdqa [RA-3*16], xmm8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4542 \| movdqa [RA-4*16], xmm9
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4543 \| movdqa [RA-5*16], xmm10
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4544 \| movdqa [RA-6*16], xmm11
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4545 \| movdqa [RA-7*16], xmm12
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4546 \| movdqa [RA-8*16], xmm13
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4547 \| movdqa [RA-9*16], xmm14
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4548 \| movdqa [RA-10*16], xmm15
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4549 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4550 \| sub rsp, 16
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4551 \| mov [rsp+16], r12
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4552 \| mov [rsp+8], r13
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4553 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4554 \| jmp RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4555 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4556 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4557
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4558 case BC_JMP:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4559 \| ins_AJ // RA = unused, RD = target
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4560 \| branchPC RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4561 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4562 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4563
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4564 /* -- Function headers -------------------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4565
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4566 /*
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4567 ** Reminder: A function may be called with func/args above L->maxstack,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4568 ** i.e. occupying EXTRA_STACK slots. And vmeta_call may add one extra slot,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4569 ** too. This means all FUNC* ops (including fast functions) must check
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4570 ** for stack overflow _before_ adding more slots!
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4571 */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4572
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4573 case BC_FUNCF:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4574 \|.if JIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4575 \| hotcall RBd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4576 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4577 case BC_FUNCV: /* NYI: compiled vararg functions. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4578 \| // Fall through. Assumes BC_IFUNCF/BC_IFUNCV follow and ins_AD is a no-op.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4579 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4580
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4581 case BC_JFUNCF:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4582 #if !LJ_HASJIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4583 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4584 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4585 case BC_IFUNCF:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4586 \| ins_AD // BASE = new base, RA = framesize, RD = nargs+1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4587 \| mov KBASE, [PC-4+PC2PROTO(k)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4588 \| mov L:RB, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4589 \| lea RA, [BASE+RA*8] // Top of frame.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4590 \| cmp RA, L:RB->maxstack
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4591 \| ja ->vm_growstack_f
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4592 \| movzx RAd, byte [PC-4+PC2PROTO(numparams)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4593 \| cmp NARGS:RDd, RAd // Check for missing parameters.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4594 \| jbe >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4595 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4596 if (op == BC_JFUNCF) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4597 \| movzx RDd, PC_RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4598 \| jmp =>BC_JLOOP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4599 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4600 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4601 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4602 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4603 \|3: // Clear missing parameters.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4604 \| mov aword [BASE+NARGS:RD*8-8], LJ_TNIL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4605 \| add NARGS:RDd, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4606 \| cmp NARGS:RDd, RAd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4607 \| jbe <3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4608 \| jmp <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4609 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4610
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4611 case BC_JFUNCV:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4612 #if !LJ_HASJIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4613 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4614 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4615 \| int3 // NYI: compiled vararg functions
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4616 break; /* NYI: compiled vararg functions. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4617
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4618 case BC_IFUNCV:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4619 \| ins_AD // BASE = new base, RA = framesize, RD = nargs+1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4620 \| lea RBd, [NARGS:RD*8+FRAME_VARG+8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4621 \| lea RD, [BASE+NARGS:RD*8+8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4622 \| mov LFUNC:KBASE, [BASE-16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4623 \| mov [RD-8], RB // Store delta + FRAME_VARG.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4624 \| mov [RD-16], LFUNC:KBASE // Store copy of LFUNC.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4625 \| mov L:RB, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4626 \| lea RA, [RD+RA*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4627 \| cmp RA, L:RB->maxstack
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4628 \| ja ->vm_growstack_v // Need to grow stack.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4629 \| mov RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4630 \| mov BASE, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4631 \| movzx RBd, byte [PC-4+PC2PROTO(numparams)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4632 \| test RBd, RBd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4633 \| jz >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4634 \| add RA, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4635 \|1: // Copy fixarg slots up to new frame.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4636 \| add RA, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4637 \| cmp RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4638 \| jnb >3 // Less args than parameters?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4639 \| mov KBASE, [RA-16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4640 \| mov [RD], KBASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4641 \| add RD, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4642 \| mov aword [RA-16], LJ_TNIL // Clear old fixarg slot (help the GC).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4643 \| sub RBd, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4644 \| jnz <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4645 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4646 if (op == BC_JFUNCV) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4647 \| movzx RDd, PC_RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4648 \| jmp =>BC_JLOOP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4649 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4650 \| mov KBASE, [PC-4+PC2PROTO(k)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4651 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4652 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4653 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4654 \|3: // Clear missing parameters.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4655 \| mov aword [RD], LJ_TNIL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4656 \| add RD, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4657 \| sub RBd, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4658 \| jnz <3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4659 \| jmp <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4660 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4661
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4662 case BC_FUNCC:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4663 case BC_FUNCCW:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4664 \| ins_AD // BASE = new base, RA = ins RA\|RD (unused), RD = nargs+1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4665 \| mov CFUNC:RB, [BASE-16]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4666 \| cleartp CFUNC:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4667 \| mov KBASE, CFUNC:RB->f
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4668 \| mov L:RB, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4669 \| lea RD, [BASE+NARGS:RD*8-8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4670 \| mov L:RB->base, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4671 \| lea RA, [RD+8*LUA_MINSTACK]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4672 \| cmp RA, L:RB->maxstack
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4673 \| mov L:RB->top, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4674 if (op == BC_FUNCC) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4675 \| mov CARG1, L:RB // Caveat: CARG1 may be RA.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4676 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4677 \| mov CARG2, KBASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4678 \| mov CARG1, L:RB // Caveat: CARG1 may be RA.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4679 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4680 \| ja ->vm_growstack_c // Need to grow stack.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4681 \| set_vmstate C
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4682 if (op == BC_FUNCC) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4683 \| call KBASE // (lua_State *L)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4684 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4685 \| // (lua_State *L, lua_CFunction f)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4686 \| call aword [DISPATCH+DISPATCH_GL(wrapf)]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4687 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4688 \| // nresults returned in eax (RD).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4689 \| mov BASE, L:RB->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4690 \| mov [DISPATCH+DISPATCH_GL(cur_L)], L:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4691 \| set_vmstate INTERP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4692 \| lea RA, [BASE+RD*8]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4693 \| neg RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4694 \| add RA, L:RB->top // RA = (L->top-(L->base+nresults))*8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4695 \| mov PC, [BASE-8] // Fetch PC of caller.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4696 \| jmp ->vm_returnc
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4697 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4698
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4699 /* ---------------------------------------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4700
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4701 default:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4702 fprintf(stderr, "Error: undefined opcode BC_%s\n", bc_names[op]);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4703 exit(2);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4704 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4705 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4706 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4707
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4708 static int build_backend(BuildCtx *ctx)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4709 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4710 int op;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4711 dasm_growpc(Dst, BC__MAX);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4712 build_subroutines(ctx);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4713 \|.code_op
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4714 for (op = 0; op < BC__MAX; op++)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4715 build_ins(ctx, (BCOp)op, op);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4716 return BC__MAX;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4717 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4718
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4719 /* Emit pseudo frame-info for all assembler functions. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4720 static void emit_asm_debug(BuildCtx *ctx)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4721 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4722 int fcofs = (int)((uint8_t *)ctx->glob[GLOB_vm_ffi_call] - ctx->code);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4723 switch (ctx->mode) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4724 case BUILD_elfasm:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4725 fprintf(ctx->fp, "\t.section .debug_frame,\"\",@progbits\n");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4726 fprintf(ctx->fp,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4727 ".Lframe0:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4728 "\t.long .LECIE0-.LSCIE0\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4729 ".LSCIE0:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4730 "\t.long 0xffffffff\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4731 "\t.byte 0x1\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4732 "\t.string \"\"\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4733 "\t.uleb128 0x1\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4734 "\t.sleb128 -8\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4735 "\t.byte 0x10\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4736 "\t.byte 0xc\n\t.uleb128 0x7\n\t.uleb128 8\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4737 "\t.byte 0x80+0x10\n\t.uleb128 0x1\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4738 "\t.align 8\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4739 ".LECIE0:\n\n");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4740 fprintf(ctx->fp,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4741 ".LSFDE0:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4742 "\t.long .LEFDE0-.LASFDE0\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4743 ".LASFDE0:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4744 "\t.long .Lframe0\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4745 "\t.quad .Lbegin\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4746 "\t.quad %d\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4747 "\t.byte 0xe\n\t.uleb128 %d\n" /* def_cfa_offset */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4748 "\t.byte 0x86\n\t.uleb128 0x2\n" /* offset rbp */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4749 "\t.byte 0x83\n\t.uleb128 0x3\n" /* offset rbx */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4750 "\t.byte 0x8f\n\t.uleb128 0x4\n" /* offset r15 */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4751 "\t.byte 0x8e\n\t.uleb128 0x5\n" /* offset r14 */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4752 #if LJ_NO_UNWIND
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4753 "\t.byte 0x8d\n\t.uleb128 0x6\n" /* offset r13 */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4754 "\t.byte 0x8c\n\t.uleb128 0x7\n" /* offset r12 */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4755 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4756 "\t.align 8\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4757 ".LEFDE0:\n\n", fcofs, CFRAME_SIZE);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4758 #if LJ_HASFFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4759 fprintf(ctx->fp,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4760 ".LSFDE1:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4761 "\t.long .LEFDE1-.LASFDE1\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4762 ".LASFDE1:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4763 "\t.long .Lframe0\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4764 "\t.quad lj_vm_ffi_call\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4765 "\t.quad %d\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4766 "\t.byte 0xe\n\t.uleb128 16\n" /* def_cfa_offset */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4767 "\t.byte 0x86\n\t.uleb128 0x2\n" /* offset rbp */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4768 "\t.byte 0xd\n\t.uleb128 0x6\n" /* def_cfa_register rbp */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4769 "\t.byte 0x83\n\t.uleb128 0x3\n" /* offset rbx */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4770 "\t.align 8\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4771 ".LEFDE1:\n\n", (int)ctx->codesz - fcofs);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4772 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4773 #if !LJ_NO_UNWIND
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4774 #if LJ_TARGET_SOLARIS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4775 fprintf(ctx->fp, "\t.section .eh_frame,\"a\",@unwind\n");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4776 #else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4777 fprintf(ctx->fp, "\t.section .eh_frame,\"a\",@progbits\n");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4778 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4779 fprintf(ctx->fp,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4780 ".Lframe1:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4781 "\t.long .LECIE1-.LSCIE1\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4782 ".LSCIE1:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4783 "\t.long 0\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4784 "\t.byte 0x1\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4785 "\t.string \"zPR\"\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4786 "\t.uleb128 0x1\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4787 "\t.sleb128 -8\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4788 "\t.byte 0x10\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4789 "\t.uleb128 6\n" /* augmentation length */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4790 "\t.byte 0x1b\n" /* pcrel\|sdata4 */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4791 "\t.long lj_err_unwind_dwarf-.\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4792 "\t.byte 0x1b\n" /* pcrel\|sdata4 */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4793 "\t.byte 0xc\n\t.uleb128 0x7\n\t.uleb128 8\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4794 "\t.byte 0x80+0x10\n\t.uleb128 0x1\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4795 "\t.align 8\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4796 ".LECIE1:\n\n");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4797 fprintf(ctx->fp,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4798 ".LSFDE2:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4799 "\t.long .LEFDE2-.LASFDE2\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4800 ".LASFDE2:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4801 "\t.long .LASFDE2-.Lframe1\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4802 "\t.long .Lbegin-.\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4803 "\t.long %d\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4804 "\t.uleb128 0\n" /* augmentation length */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4805 "\t.byte 0xe\n\t.uleb128 %d\n" /* def_cfa_offset */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4806 "\t.byte 0x86\n\t.uleb128 0x2\n" /* offset rbp */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4807 "\t.byte 0x83\n\t.uleb128 0x3\n" /* offset rbx */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4808 "\t.byte 0x8f\n\t.uleb128 0x4\n" /* offset r15 */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4809 "\t.byte 0x8e\n\t.uleb128 0x5\n" /* offset r14 */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4810 "\t.align 8\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4811 ".LEFDE2:\n\n", fcofs, CFRAME_SIZE);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4812 #if LJ_HASFFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4813 fprintf(ctx->fp,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4814 ".Lframe2:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4815 "\t.long .LECIE2-.LSCIE2\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4816 ".LSCIE2:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4817 "\t.long 0\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4818 "\t.byte 0x1\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4819 "\t.string \"zR\"\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4820 "\t.uleb128 0x1\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4821 "\t.sleb128 -8\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4822 "\t.byte 0x10\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4823 "\t.uleb128 1\n" /* augmentation length */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4824 "\t.byte 0x1b\n" /* pcrel\|sdata4 */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4825 "\t.byte 0xc\n\t.uleb128 0x7\n\t.uleb128 8\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4826 "\t.byte 0x80+0x10\n\t.uleb128 0x1\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4827 "\t.align 8\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4828 ".LECIE2:\n\n");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4829 fprintf(ctx->fp,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4830 ".LSFDE3:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4831 "\t.long .LEFDE3-.LASFDE3\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4832 ".LASFDE3:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4833 "\t.long .LASFDE3-.Lframe2\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4834 "\t.long lj_vm_ffi_call-.\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4835 "\t.long %d\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4836 "\t.uleb128 0\n" /* augmentation length */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4837 "\t.byte 0xe\n\t.uleb128 16\n" /* def_cfa_offset */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4838 "\t.byte 0x86\n\t.uleb128 0x2\n" /* offset rbp */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4839 "\t.byte 0xd\n\t.uleb128 0x6\n" /* def_cfa_register rbp */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4840 "\t.byte 0x83\n\t.uleb128 0x3\n" /* offset rbx */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4841 "\t.align 8\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4842 ".LEFDE3:\n\n", (int)ctx->codesz - fcofs);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4843 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4844 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4845 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4846 #if !LJ_NO_UNWIND
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4847 /* Mental note: never let Apple design an assembler.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4848 ** Or a linker. Or a plastic case. But I digress.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4849 */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4850 case BUILD_machasm: {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4851 #if LJ_HASFFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4852 int fcsize = 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4853 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4854 int i;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4855 fprintf(ctx->fp, "\t.section __TEXT,__eh_frame,coalesced,no_toc+strip_static_syms+live_support\n");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4856 fprintf(ctx->fp,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4857 "EH_frame1:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4858 "\t.set L$set$x,LECIEX-LSCIEX\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4859 "\t.long L$set$x\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4860 "LSCIEX:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4861 "\t.long 0\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4862 "\t.byte 0x1\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4863 "\t.ascii \"zPR\\0\"\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4864 "\t.byte 0x1\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4865 "\t.byte 128-8\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4866 "\t.byte 0x10\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4867 "\t.byte 6\n" /* augmentation length */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4868 "\t.byte 0x9b\n" /* indirect\|pcrel\|sdata4 */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4869 "\t.long _lj_err_unwind_dwarf+4@GOTPCREL\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4870 "\t.byte 0x1b\n" /* pcrel\|sdata4 */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4871 "\t.byte 0xc\n\t.byte 0x7\n\t.byte 8\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4872 "\t.byte 0x80+0x10\n\t.byte 0x1\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4873 "\t.align 3\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4874 "LECIEX:\n\n");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4875 for (i = 0; i < ctx->nsym; i++) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4876 const char *name = ctx->sym[i].name;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4877 int32_t size = ctx->sym[i+1].ofs - ctx->sym[i].ofs;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4878 if (size == 0) continue;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4879 #if LJ_HASFFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4880 if (!strcmp(name, "_lj_vm_ffi_call")) { fcsize = size; continue; }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4881 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4882 fprintf(ctx->fp,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4883 "%s.eh:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4884 "LSFDE%d:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4885 "\t.set L$set$%d,LEFDE%d-LASFDE%d\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4886 "\t.long L$set$%d\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4887 "LASFDE%d:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4888 "\t.long LASFDE%d-EH_frame1\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4889 "\t.long %s-.\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4890 "\t.long %d\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4891 "\t.byte 0\n" /* augmentation length */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4892 "\t.byte 0xe\n\t.byte %d\n" /* def_cfa_offset */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4893 "\t.byte 0x86\n\t.byte 0x2\n" /* offset rbp */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4894 "\t.byte 0x83\n\t.byte 0x3\n" /* offset rbx */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4895 "\t.byte 0x8f\n\t.byte 0x4\n" /* offset r15 */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4896 "\t.byte 0x8e\n\t.byte 0x5\n" /* offset r14 */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4897 "\t.align 3\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4898 "LEFDE%d:\n\n",
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4899 name, i, i, i, i, i, i, i, name, size, CFRAME_SIZE, i);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4900 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4901 #if LJ_HASFFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4902 if (fcsize) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4903 fprintf(ctx->fp,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4904 "EH_frame2:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4905 "\t.set L$set$y,LECIEY-LSCIEY\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4906 "\t.long L$set$y\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4907 "LSCIEY:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4908 "\t.long 0\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4909 "\t.byte 0x1\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4910 "\t.ascii \"zR\\0\"\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4911 "\t.byte 0x1\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4912 "\t.byte 128-8\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4913 "\t.byte 0x10\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4914 "\t.byte 1\n" /* augmentation length */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4915 "\t.byte 0x1b\n" /* pcrel\|sdata4 */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4916 "\t.byte 0xc\n\t.byte 0x7\n\t.byte 8\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4917 "\t.byte 0x80+0x10\n\t.byte 0x1\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4918 "\t.align 3\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4919 "LECIEY:\n\n");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4920 fprintf(ctx->fp,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4921 "_lj_vm_ffi_call.eh:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4922 "LSFDEY:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4923 "\t.set L$set$yy,LEFDEY-LASFDEY\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4924 "\t.long L$set$yy\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4925 "LASFDEY:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4926 "\t.long LASFDEY-EH_frame2\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4927 "\t.long _lj_vm_ffi_call-.\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4928 "\t.long %d\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4929 "\t.byte 0\n" /* augmentation length */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4930 "\t.byte 0xe\n\t.byte 16\n" /* def_cfa_offset */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4931 "\t.byte 0x86\n\t.byte 0x2\n" /* offset rbp */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4932 "\t.byte 0xd\n\t.byte 0x6\n" /* def_cfa_register rbp */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4933 "\t.byte 0x83\n\t.byte 0x3\n" /* offset rbx */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4934 "\t.align 3\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4935 "LEFDEY:\n\n", fcsize);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4936 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4937 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4938 fprintf(ctx->fp, ".subsections_via_symbols\n");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4939 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4940 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4941 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4942 default: /* Difficult for other modes. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4943 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4944 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4945 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4946

Mercurial

annotate third_party/luajit/src/vm_x64.dasc @ 279:b3b547563ec7