/home/mrjunejune/zenbu: third_party/luajit/src/vm

annotate third_party/luajit/src/vm_ppc.dasc @ 279:b3b547563ec7

Add Google connector service and agent wiki Implement the C/Seobeo Google Drive and Gmail connector with encrypted OAuth storage, Zenbu authentication, browser testing, AI tool discovery, chunked HTTP decoding, and Bazel coverage. Consolidate repository guidance into progressive wiki documentation and enforce arena-first allocation for new first-party C code. Co-authored-by: Copilot <[email protected]> Copilot-Session: 84c338fd-0939-4bb3-b7f3-1062eb213e5d

author	MrJuneJune <me@mrjunejune.com>
date	Mon, 17 Aug 2026 22:22:36 -0700
parents	94705b5986b3
children

rev	line source
178 94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1 \|// Low-level VM code for PowerPC 32 bit or 32on64 bit mode.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2 \|// Bytecode interpreter, fast functions and helper functions.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3 \|// Copyright (C) 2005-2023 Mike Pall. See Copyright Notice in luajit.h
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5 \|.arch ppc
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6 \|.section code_op, code_sub
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	7 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	8 \|.actionlist build_actionlist
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	9 \|.globals GLOB_
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	10 \|.globalnames globnames
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	11 \|.externnames extnames
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	12 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	13 \|// Note: The ragged indentation of the instructions is intentional.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	14 \|// The starting columns indicate data dependencies.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	15 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	16 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	17 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	18 \|// DynASM defines used by the PPC port:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	19 \|//
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	20 \|// P64 64 bit pointers (only for GPR64 testing).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	21 \|// GPR64 64 bit registers (but possibly 32 bit pointers, e.g. PS3).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	22 \|// Affects reg saves, stack layout, carry/overflow/dot flags etc.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	23 \|// FRAME32 Use 32 bit frame layout, even with GPR64 (Xbox 360).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	24 \|// TOC Need table of contents (64 bit or 32 bit variant, e.g. PS3).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	25 \|// Function pointers are really a struct: code, TOC, env (optional).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	26 \|// TOCENV Function pointers have an environment pointer, too (not on PS3).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	27 \|// PPE Power Processor Element of Cell (PS3) or Xenon (Xbox 360).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	28 \|// Must avoid (slow) micro-coded instructions.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	29 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	30 \|.if P64
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	31 \|.define TOC, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	32 \|.define TOCENV, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	33 \|.macro lpx, a, b, c; ldx a, b, c; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	34 \|.macro lp, a, b; ld a, b; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	35 \|.macro stp, a, b; std a, b; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	36 \|.define decode_OPP, decode_OP8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	37 \|.if FFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	38 \|// Missing: Calling conventions, 64 bit regs, TOC.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	39 \|.error lib_ffi not yet implemented for PPC64
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	40 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	41 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	42 \|.macro lpx, a, b, c; lwzx a, b, c; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	43 \|.macro lp, a, b; lwz a, b; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	44 \|.macro stp, a, b; stw a, b; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	45 \|.define decode_OPP, decode_OP4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	46 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	47 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	48 \|// Convenience macros for TOC handling.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	49 \|.if TOC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	50 \|// Linker needs a TOC patch area for every external call relocation.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	51 \|.macro blex, target; bl extern target@plt; nop; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	52 \|.macro .toc, a, b; a, b; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	53 \|.if P64
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	54 \|.define TOC_OFS, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	55 \|.define ENV_OFS, 16
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	56 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	57 \|.define TOC_OFS, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	58 \|.define ENV_OFS, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	59 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	60 \|.else // No TOC.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	61 \|.macro blex, target; bl extern target@plt; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	62 \|.macro .toc, a, b; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	63 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	64 \|.macro .tocenv, a, b; .if TOCENV; a, b; .endif; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	65 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	66 \|.macro .gpr64, a, b; .if GPR64; a, b; .endif; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	67 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	68 \|.macro andix., y, a, i
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	69 \|.if PPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	70 \| rlwinm y, a, 0, 31-lj_fls(i), 31-lj_ffs(i)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	71 \| cmpwi y, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	72 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	73 \| andi. y, a, i
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	74 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	75 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	76 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	77 \|.macro clrso, reg
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	78 \|.if PPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	79 \| li reg, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	80 \| mtxer reg
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	81 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	82 \| mcrxr cr0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	83 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	84 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	85 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	86 \|.macro checkov, reg, noov
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	87 \|.if PPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	88 \| mfxer reg
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	89 \| add reg, reg, reg
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	90 \| cmpwi reg, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	91 \| li reg, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	92 \| mtxer reg
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	93 \| bgey noov
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	94 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	95 \| mcrxr cr0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	96 \| bley noov
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	97 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	98 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	99 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	100 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	101 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	102 \|// Fixed register assignments for the interpreter.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	103 \|// Don't use: r1 = sp, r2 and r13 = reserved (TOC, TLS or SDATA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	104 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	105 \|.macro .FPU, a, b
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	106 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	107 \| a, b
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	108 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	109 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	110 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	111 \|.macro .FPU, a, b, c
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	112 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	113 \| a, b, c
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	114 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	115 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	116 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	117 \|// The following must be C callee-save (but BASE is often refetched).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	118 \|.define BASE, r14 // Base of current Lua stack frame.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	119 \|.define KBASE, r15 // Constants of current Lua function.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	120 \|.define PC, r16 // Next PC.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	121 \|.define DISPATCH, r17 // Opcode dispatch table.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	122 \|.define LREG, r18 // Register holding lua_State (also in SAVE_L).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	123 \|.define MULTRES, r19 // Size of multi-result: (nresults+1)*8.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	124 \|.define JGL, r31 // On-trace: global_State + 32768.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	125 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	126 \|// Constants for type-comparisons, stores and conversions. C callee-save.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	127 \|.define TISNUM, r22
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	128 \|.define TISNIL, r23
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	129 \|.define ZERO, r24
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	130 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	131 \|.define TOBIT, f30 // 2^52 + 2^51.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	132 \|.define TONUM, f31 // 2^52 + 2^51 + 2^31.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	133 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	134 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	135 \|// The following temporaries are not saved across C calls, except for RA.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	136 \|.define RA, r20 // Callee-save.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	137 \|.define RB, r10
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	138 \|.define RC, r11
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	139 \|.define RD, r12
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	140 \|.define INS, r7 // Overlaps CARG5.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	141 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	142 \|.define TMP0, r0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	143 \|.define TMP1, r8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	144 \|.define TMP2, r9
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	145 \|.define TMP3, r6 // Overlaps CARG4.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	146 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	147 \|// Saved temporaries.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	148 \|.define SAVE0, r21
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	149 \|.define SAVE1, r25
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	150 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	151 \|// Calling conventions.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	152 \|.define CARG1, r3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	153 \|.define CARG2, r4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	154 \|.define CARG3, r5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	155 \|.define CARG4, r6 // Overlaps TMP3.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	156 \|.define CARG5, r7 // Overlaps INS.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	157 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	158 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	159 \|.define FARG1, f1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	160 \|.define FARG2, f2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	161 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	162 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	163 \|.define CRET1, r3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	164 \|.define CRET2, r4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	165 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	166 \|.define TOCREG, r2 // TOC register (only used by C code).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	167 \|.define ENVREG, r11 // Environment pointer (nested C functions).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	168 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	169 \|// Stack layout while in interpreter. Must match with lj_frame.h.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	170 \|.if GPR64
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	171 \|.if FRAME32
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	172 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	173 \|// 456(sp) // \ 32/64 bit C frame info
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	174 \|.define TONUM_LO, 452(sp) // \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	175 \|.define TONUM_HI, 448(sp) // \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	176 \|.define TMPD_LO, 444(sp) // \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	177 \|.define TMPD_HI, 440(sp) // \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	178 \|.define SAVE_CR, 432(sp) // \| 64 bit CR save.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	179 \|.define SAVE_ERRF, 424(sp) // > Parameter save area.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	180 \|.define SAVE_NRES, 420(sp) // \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	181 \|.define SAVE_L, 416(sp) // \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	182 \|.define SAVE_PC, 412(sp) // \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	183 \|.define SAVE_MULTRES, 408(sp) // \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	184 \|.define SAVE_CFRAME, 400(sp) // / 64 bit C frame chain.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	185 \|// 392(sp) // Reserved.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	186 \|.define CFRAME_SPACE, 384 // Delta for sp.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	187 \|// Back chain for sp: 384(sp) <-- sp entering interpreter
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	188 \|.define SAVE_LR, 376(sp) // 32 bit LR stored in hi-part.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	189 \|.define SAVE_GPR_, 232 // .. 232+18*8: 64 bit GPR saves.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	190 \|.define SAVE_FPR_, 88 // .. 88+18*8: 64 bit FPR saves.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	191 \|// 80(sp) // Needed for 16 byte stack frame alignment.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	192 \|// 16(sp) // Callee parameter save area (ABI mandated).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	193 \|// 8(sp) // Reserved
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	194 \|// Back chain for sp: 0(sp) <-- sp while in interpreter
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	195 \|// 32 bit sp stored in hi-part of 0(sp).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	196 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	197 \|.define TMPD_BLO, 447(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	198 \|.define TMPD, TMPD_HI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	199 \|.define TONUM_D, TONUM_HI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	200 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	201 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	202 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	203 \|// 508(sp) // \ 32 bit C frame info.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	204 \|.define SAVE_ERRF, 472(sp) // \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	205 \|.define SAVE_NRES, 468(sp) // \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	206 \|.define SAVE_L, 464(sp) // > Parameter save area.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	207 \|.define SAVE_PC, 460(sp) // \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	208 \|.define SAVE_MULTRES, 456(sp) // \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	209 \|.define SAVE_CFRAME, 448(sp) // / 64 bit C frame chain.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	210 \|.define SAVE_LR, 416(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	211 \|.define CFRAME_SPACE, 400 // Delta for sp.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	212 \|// Back chain for sp: 400(sp) <-- sp entering interpreter
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	213 \|.define SAVE_FPR_, 256 // .. 256+18*8: 64 bit FPR saves.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	214 \|.define SAVE_GPR_, 112 // .. 112+18*8: 64 bit GPR saves.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	215 \|// 48(sp) // Callee parameter save area (ABI mandated).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	216 \|.define SAVE_TOC, 40(sp) // TOC save area.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	217 \|.define TMPD_LO, 36(sp) // \ Link editor temp (ABI mandated).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	218 \|.define TMPD_HI, 32(sp) // /
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	219 \|.define TONUM_LO, 28(sp) // \ Compiler temp (ABI mandated).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	220 \|.define TONUM_HI, 24(sp) // /
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	221 \|// Next frame lr: 16(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	222 \|.define SAVE_CR, 8(sp) // 64 bit CR save.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	223 \|// Back chain for sp: 0(sp) <-- sp while in interpreter
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	224 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	225 \|.define TMPD_BLO, 39(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	226 \|.define TMPD, TMPD_HI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	227 \|.define TONUM_D, TONUM_HI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	228 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	229 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	230 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	231 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	232 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	233 \|.define SAVE_LR, 276(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	234 \|.define CFRAME_SPACE, 272 // Delta for sp.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	235 \|// Back chain for sp: 272(sp) <-- sp entering interpreter
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	236 \|.define SAVE_FPR_, 128 // .. 128+18*8: 64 bit FPR saves.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	237 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	238 \|.define SAVE_LR, 132(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	239 \|.define CFRAME_SPACE, 128 // Delta for sp.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	240 \|// Back chain for sp: 128(sp) <-- sp entering interpreter
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	241 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	242 \|.define SAVE_GPR_, 56 // .. 56+18*4: 32 bit GPR saves.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	243 \|.define SAVE_CR, 52(sp) // 32 bit CR save.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	244 \|.define SAVE_ERRF, 48(sp) // 32 bit C frame info.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	245 \|.define SAVE_NRES, 44(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	246 \|.define SAVE_CFRAME, 40(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	247 \|.define SAVE_L, 36(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	248 \|.define SAVE_PC, 32(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	249 \|.define SAVE_MULTRES, 28(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	250 \|.define UNUSED1, 24(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	251 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	252 \|.define TMPD_LO, 20(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	253 \|.define TMPD_HI, 16(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	254 \|.define TONUM_LO, 12(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	255 \|.define TONUM_HI, 8(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	256 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	257 \|.define SFSAVE_4, 20(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	258 \|.define SFSAVE_3, 16(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	259 \|.define SFSAVE_2, 12(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	260 \|.define SFSAVE_1, 8(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	261 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	262 \|// Next frame lr: 4(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	263 \|// Back chain for sp: 0(sp) <-- sp while in interpreter
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	264 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	265 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	266 \|.define TMPD_BLO, 23(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	267 \|.define TMPD, TMPD_HI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	268 \|.define TONUM_D, TONUM_HI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	269 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	270 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	271 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	272 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	273 \|.macro save_, reg
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	274 \|.if GPR64
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	275 \| std r..reg, SAVE_GPR_+(reg-14)*8(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	276 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	277 \| stw r..reg, SAVE_GPR_+(reg-14)*4(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	278 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	279 \| .FPU stfd f..reg, SAVE_FPR_+(reg-14)*8(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	280 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	281 \|.macro rest_, reg
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	282 \|.if GPR64
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	283 \| ld r..reg, SAVE_GPR_+(reg-14)*8(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	284 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	285 \| lwz r..reg, SAVE_GPR_+(reg-14)*4(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	286 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	287 \| .FPU lfd f..reg, SAVE_FPR_+(reg-14)*8(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	288 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	289 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	290 \|.macro saveregs
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	291 \|.if GPR64 and not FRAME32
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	292 \| stdu sp, -CFRAME_SPACE(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	293 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	294 \| stwu sp, -CFRAME_SPACE(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	295 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	296 \| save_ 14; save_ 15; save_ 16
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	297 \| mflr r0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	298 \| save_ 17; save_ 18; save_ 19; save_ 20; save_ 21; save_ 22
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	299 \|.if GPR64 and not FRAME32
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	300 \| std r0, SAVE_LR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	301 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	302 \| stw r0, SAVE_LR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	303 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	304 \| save_ 23; save_ 24; save_ 25
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	305 \| mfcr r0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	306 \| save_ 26; save_ 27; save_ 28; save_ 29; save_ 30; save_ 31
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	307 \|.if GPR64
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	308 \| std r0, SAVE_CR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	309 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	310 \| stw r0, SAVE_CR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	311 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	312 \| .toc std TOCREG, SAVE_TOC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	313 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	314 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	315 \|.macro restoreregs
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	316 \|.if GPR64 and not FRAME32
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	317 \| ld r0, SAVE_LR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	318 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	319 \| lwz r0, SAVE_LR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	320 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	321 \|.if GPR64
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	322 \| ld r12, SAVE_CR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	323 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	324 \| lwz r12, SAVE_CR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	325 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	326 \| rest_ 14; rest_ 15; rest_ 16; rest_ 17; rest_ 18; rest_ 19
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	327 \| mtlr r0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	328 \|.if PPE; mtocrf 0x20, r12; .else; mtcrf 0x38, r12; .endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	329 \| rest_ 20; rest_ 21; rest_ 22; rest_ 23; rest_ 24; rest_ 25
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	330 \|.if PPE; mtocrf 0x10, r12; .endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	331 \| rest_ 26; rest_ 27; rest_ 28; rest_ 29; rest_ 30; rest_ 31
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	332 \|.if PPE; mtocrf 0x08, r12; .endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	333 \| addi sp, sp, CFRAME_SPACE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	334 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	335 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	336 \|// Type definitions. Some of these are only used for documentation.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	337 \|.type L, lua_State, LREG
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	338 \|.type GL, global_State
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	339 \|.type TVALUE, TValue
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	340 \|.type GCOBJ, GCobj
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	341 \|.type STR, GCstr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	342 \|.type TAB, GCtab
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	343 \|.type LFUNC, GCfuncL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	344 \|.type CFUNC, GCfuncC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	345 \|.type PROTO, GCproto
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	346 \|.type UPVAL, GCupval
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	347 \|.type NODE, Node
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	348 \|.type NARGS8, int
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	349 \|.type TRACE, GCtrace
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	350 \|.type SBUF, SBuf
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	351 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	352 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	353 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	354 \|// Trap for not-yet-implemented parts.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	355 \|.macro NYI; tw 4, sp, sp; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	356 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	357 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	358 \|// int/FP conversions.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	359 \|.macro tonum_i, freg, reg
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	360 \| xoris reg, reg, 0x8000
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	361 \| stw reg, TONUM_LO
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	362 \| lfd freg, TONUM_D
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	363 \| fsub freg, freg, TONUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	364 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	365 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	366 \|.macro tonum_u, freg, reg
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	367 \| stw reg, TONUM_LO
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	368 \| lfd freg, TONUM_D
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	369 \| fsub freg, freg, TOBIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	370 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	371 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	372 \|.macro toint, reg, freg, tmpfreg
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	373 \| fctiwz tmpfreg, freg
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	374 \| stfd tmpfreg, TMPD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	375 \| lwz reg, TMPD_LO
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	376 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	377 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	378 \|.macro toint, reg, freg
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	379 \| toint reg, freg, freg
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	380 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	381 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	382 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	383 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	384 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	385 \|// Access to frame relative to BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	386 \|.define FRAME_PC, -8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	387 \|.define FRAME_FUNC, -4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	388 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	389 \|// Instruction decode.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	390 \|.macro decode_OP4, dst, ins; rlwinm dst, ins, 2, 22, 29; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	391 \|.macro decode_OP8, dst, ins; rlwinm dst, ins, 3, 21, 28; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	392 \|.macro decode_RA8, dst, ins; rlwinm dst, ins, 27, 21, 28; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	393 \|.macro decode_RB8, dst, ins; rlwinm dst, ins, 11, 21, 28; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	394 \|.macro decode_RC8, dst, ins; rlwinm dst, ins, 19, 21, 28; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	395 \|.macro decode_RD8, dst, ins; rlwinm dst, ins, 19, 13, 28; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	396 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	397 \|.macro decode_OP1, dst, ins; rlwinm dst, ins, 0, 24, 31; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	398 \|.macro decode_RD4, dst, ins; rlwinm dst, ins, 18, 14, 29; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	399 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	400 \|// Instruction fetch.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	401 \|.macro ins_NEXT1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	402 \| lwz INS, 0(PC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	403 \| addi PC, PC, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	404 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	405 \|// Instruction decode+dispatch. Note: optimized for e300!
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	406 \|.macro ins_NEXT2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	407 \| decode_OPP TMP1, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	408 \| lpx TMP0, DISPATCH, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	409 \| mtctr TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	410 \| decode_RB8 RB, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	411 \| decode_RD8 RD, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	412 \| decode_RA8 RA, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	413 \| decode_RC8 RC, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	414 \| bctr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	415 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	416 \|.macro ins_NEXT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	417 \| ins_NEXT1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	418 \| ins_NEXT2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	419 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	420 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	421 \|// Instruction footer.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	422 \|.if 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	423 \| // Replicated dispatch. Less unpredictable branches, but higher I-Cache use.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	424 \| .define ins_next, ins_NEXT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	425 \| .define ins_next_, ins_NEXT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	426 \| .define ins_next1, ins_NEXT1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	427 \| .define ins_next2, ins_NEXT2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	428 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	429 \| // Common dispatch. Lower I-Cache use, only one (very) unpredictable branch.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	430 \| // Affects only certain kinds of benchmarks (and only with -j off).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	431 \| .macro ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	432 \| b ->ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	433 \| .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	434 \| .macro ins_next1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	435 \| .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	436 \| .macro ins_next2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	437 \| b ->ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	438 \| .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	439 \| .macro ins_next_
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	440 \| ->ins_next:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	441 \| ins_NEXT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	442 \| .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	443 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	444 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	445 \|// Call decode and dispatch.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	446 \|.macro ins_callt
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	447 \| // BASE = new base, RB = LFUNC/CFUNC, RC = nargs*8, FRAME_PC(BASE) = PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	448 \| lwz PC, LFUNC:RB->pc
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	449 \| lwz INS, 0(PC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	450 \| addi PC, PC, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	451 \| decode_OPP TMP1, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	452 \| decode_RA8 RA, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	453 \| lpx TMP0, DISPATCH, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	454 \| add RA, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	455 \| mtctr TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	456 \| bctr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	457 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	458 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	459 \|.macro ins_call
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	460 \| // BASE = new base, RB = LFUNC/CFUNC, RC = nargs*8, PC = caller PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	461 \| stw PC, FRAME_PC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	462 \| ins_callt
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	463 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	464 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	465 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	466 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	467 \|// Macros to test operand types.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	468 \|.macro checknum, reg; cmplw reg, TISNUM; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	469 \|.macro checknum, cr, reg; cmplw cr, reg, TISNUM; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	470 \|.macro checkstr, reg; cmpwi reg, LJ_TSTR; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	471 \|.macro checktab, reg; cmpwi reg, LJ_TTAB; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	472 \|.macro checkfunc, reg; cmpwi reg, LJ_TFUNC; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	473 \|.macro checknil, reg; cmpwi reg, LJ_TNIL; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	474 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	475 \|.macro branch_RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	476 \| srwi TMP0, RD, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	477 \| addis PC, PC, -(BCBIAS_J*4 >> 16)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	478 \| add PC, PC, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	479 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	480 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	481 \|// Assumes DISPATCH is relative to GL.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	482 #define DISPATCH_GL(field) (GG_DISP2G + (int)offsetof(global_State, field))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	483 #define DISPATCH_J(field) (GG_DISP2J + (int)offsetof(jit_State, field))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	484 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	485 #define PC2PROTO(field) ((int)offsetof(GCproto, field)-(int)sizeof(GCproto))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	486 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	487 \|.macro hotcheck, delta, target
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	488 \| rlwinm TMP1, PC, 31, 25, 30
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	489 \| addi TMP1, TMP1, GG_DISP2HOT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	490 \| lhzx TMP2, DISPATCH, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	491 \| addic. TMP2, TMP2, -delta
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	492 \| sthx TMP2, DISPATCH, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	493 \| blt target
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	494 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	495 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	496 \|.macro hotloop
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	497 \| hotcheck HOTCOUNT_LOOP, ->vm_hotloop
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	498 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	499 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	500 \|.macro hotcall
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	501 \| hotcheck HOTCOUNT_CALL, ->vm_hotcall
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	502 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	503 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	504 \|// Set current VM state. Uses TMP0.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	505 \|.macro li_vmstate, st; li TMP0, ~LJ_VMST_..st; .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	506 \|.macro st_vmstate; stw TMP0, DISPATCH_GL(vmstate)(DISPATCH); .endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	507 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	508 \|// Move table write barrier back. Overwrites mark and tmp.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	509 \|.macro barrierback, tab, mark, tmp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	510 \| lwz tmp, DISPATCH_GL(gc.grayagain)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	511 \| // Assumes LJ_GC_BLACK is 0x04.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	512 \| rlwinm mark, mark, 0, 30, 28 // black2gray(tab)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	513 \| stw tab, DISPATCH_GL(gc.grayagain)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	514 \| stb mark, tab->marked
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	515 \| stw tmp, tab->gclist
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	516 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	517 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	518 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	519
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	520 /* Generate subroutines used by opcodes and other parts of the VM. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	521 /* The .code_sub section should be last to help static branch prediction. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	522 static void build_subroutines(BuildCtx *ctx)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	523 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	524 \|.code_sub
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	525 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	526 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	527 \|//-- Return handling ----------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	528 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	529 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	530 \|->vm_returnp:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	531 \| // See vm_return. Also: TMP2 = previous base.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	532 \| andix. TMP0, PC, FRAME_P
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	533 \| li TMP1, LJ_TTRUE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	534 \| beq ->cont_dispatch
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	535 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	536 \| // Return from pcall or xpcall fast func.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	537 \| lwz PC, FRAME_PC(TMP2) // Fetch PC of previous frame.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	538 \| mr BASE, TMP2 // Restore caller base.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	539 \| // Prepending may overwrite the pcall frame, so do it at the end.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	540 \| stwu TMP1, FRAME_PC(RA) // Prepend true to results.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	541 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	542 \|->vm_returnc:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	543 \| addi RD, RD, 8 // RD = (nresults+1)*8.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	544 \| andix. TMP0, PC, FRAME_TYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	545 \| cmpwi cr1, RD, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	546 \| li CRET1, LUA_YIELD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	547 \| beq cr1, ->vm_unwind_c_eh
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	548 \| mr MULTRES, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	549 \| beq ->BC_RET_Z // Handle regular return to Lua.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	550 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	551 \|->vm_return:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	552 \| // BASE = base, RA = resultptr, RD/MULTRES = (nresults+1)*8, PC = return
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	553 \| // TMP0 = PC & FRAME_TYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	554 \| cmpwi TMP0, FRAME_C
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	555 \| rlwinm TMP2, PC, 0, 0, 28
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	556 \| li_vmstate C
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	557 \| sub TMP2, BASE, TMP2 // TMP2 = previous base.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	558 \| bney ->vm_returnp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	559 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	560 \| addic. TMP1, RD, -8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	561 \| stp TMP2, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	562 \| lwz TMP2, SAVE_NRES
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	563 \| subi BASE, BASE, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	564 \| st_vmstate
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	565 \| slwi TMP2, TMP2, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	566 \| beq >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	567 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	568 \| addic. TMP1, TMP1, -8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	569 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	570 \| lfd f0, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	571 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	572 \| lwz CARG1, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	573 \| lwz CARG2, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	574 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	575 \| addi RA, RA, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	576 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	577 \| stfd f0, 0(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	578 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	579 \| stw CARG1, 0(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	580 \| stw CARG2, 4(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	581 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	582 \| addi BASE, BASE, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	583 \| bney <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	584 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	585 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	586 \| cmpw TMP2, RD // More/less results wanted?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	587 \| bne >6
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	588 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	589 \| stp BASE, L->top // Store new top.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	590 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	591 \|->vm_leave_cp:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	592 \| lp TMP0, SAVE_CFRAME // Restore previous C frame.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	593 \| li CRET1, 0 // Ok return status for vm_pcall.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	594 \| stp TMP0, L->cframe
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	595 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	596 \|->vm_leave_unw:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	597 \| restoreregs
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	598 \| blr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	599 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	600 \|6:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	601 \| ble >7 // Less results wanted?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	602 \| // More results wanted. Check stack size and fill up results with nil.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	603 \| lwz TMP1, L->maxstack
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	604 \| cmplw BASE, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	605 \| bge >8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	606 \| stw TISNIL, 0(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	607 \| addi RD, RD, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	608 \| addi BASE, BASE, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	609 \| b <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	610 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	611 \|7: // Less results wanted.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	612 \| subfic TMP3, TMP2, 0 // LUA_MULTRET+1 case?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	613 \| sub TMP0, RD, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	614 \| subfe TMP1, TMP1, TMP1 // TMP1 = TMP2 == 0 ? 0 : -1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	615 \| and TMP0, TMP0, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	616 \| sub BASE, BASE, TMP0 // Either keep top or shrink it.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	617 \| b <3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	618 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	619 \|8: // Corner case: need to grow stack for filling up results.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	620 \| // This can happen if:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	621 \| // - A C function grows the stack (a lot).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	622 \| // - The GC shrinks the stack in between.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	623 \| // - A return back from a lua_call() with (high) nresults adjustment.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	624 \| stp BASE, L->top // Save current top held in BASE (yes).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	625 \| mr SAVE0, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	626 \| srwi CARG2, TMP2, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	627 \| mr CARG1, L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	628 \| bl extern lj_state_growstack // (lua_State *L, int n)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	629 \| lwz TMP2, SAVE_NRES
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	630 \| mr RD, SAVE0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	631 \| slwi TMP2, TMP2, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	632 \| lp BASE, L->top // Need the (realloced) L->top in BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	633 \| b <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	634 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	635 \|->vm_unwind_c: // Unwind C stack, return from vm_pcall.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	636 \| // (void *cframe, int errcode)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	637 \| mr sp, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	638 \| mr CRET1, CARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	639 \|->vm_unwind_c_eh: // Landing pad for external unwinder.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	640 \| lwz L, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	641 \| .toc ld TOCREG, SAVE_TOC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	642 \| li TMP0, ~LJ_VMST_C
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	643 \| lwz GL:TMP1, L->glref
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	644 \| stw TMP0, GL:TMP1->vmstate
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	645 \| b ->vm_leave_unw
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	646 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	647 \|->vm_unwind_ff: // Unwind C stack, return from ff pcall.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	648 \| // (void *cframe)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	649 \|.if GPR64
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	650 \| rldicr sp, CARG1, 0, 61
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	651 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	652 \| rlwinm sp, CARG1, 0, 0, 29
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	653 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	654 \|->vm_unwind_ff_eh: // Landing pad for external unwinder.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	655 \| lwz L, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	656 \| .toc ld TOCREG, SAVE_TOC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	657 \| li TISNUM, LJ_TISNUM // Setup type comparison constants.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	658 \| lp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	659 \| .FPU lus TMP3, 0x59c0 // TOBIT = 2^52 + 2^51 (float).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	660 \| lwz DISPATCH, L->glref // Setup pointer to dispatch table.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	661 \| li ZERO, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	662 \| .FPU stw TMP3, TMPD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	663 \| li TMP1, LJ_TFALSE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	664 \| .FPU ori TMP3, TMP3, 0x0004 // TONUM = 2^52 + 2^51 + 2^31 (float).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	665 \| li TISNIL, LJ_TNIL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	666 \| li_vmstate INTERP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	667 \| .FPU lfs TOBIT, TMPD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	668 \| lwz PC, FRAME_PC(BASE) // Fetch PC of previous frame.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	669 \| la RA, -8(BASE) // Results start at BASE-8.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	670 \| .FPU stw TMP3, TMPD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	671 \| addi DISPATCH, DISPATCH, GG_G2DISP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	672 \| stw TMP1, 0(RA) // Prepend false to error message.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	673 \| li RD, 16 // 2 results: false + error message.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	674 \| st_vmstate
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	675 \| .FPU lfs TONUM, TMPD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	676 \| b ->vm_returnc
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	677 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	678 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	679 \|//-- Grow stack for calls -----------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	680 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	681 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	682 \|->vm_growstack_c: // Grow stack for C function.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	683 \| li CARG2, LUA_MINSTACK
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	684 \| b >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	685 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	686 \|->vm_growstack_l: // Grow stack for Lua function.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	687 \| // BASE = new base, RA = BASE+framesize8, RC = nargs8, PC = first PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	688 \| add RC, BASE, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	689 \| sub RA, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	690 \| stp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	691 \| addi PC, PC, 4 // Must point after first instruction.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	692 \| stp RC, L->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	693 \| srwi CARG2, RA, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	694 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	695 \| // L->base = new base, L->top = top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	696 \| stw PC, SAVE_PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	697 \| mr CARG1, L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	698 \| bl extern lj_state_growstack // (lua_State *L, int n)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	699 \| lp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	700 \| lp RC, L->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	701 \| lwz LFUNC:RB, FRAME_FUNC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	702 \| sub RC, RC, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	703 \| // BASE = new base, RB = LFUNC/CFUNC, RC = nargs*8, FRAME_PC(BASE) = PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	704 \| ins_callt // Just retry the call.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	705 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	706 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	707 \|//-- Entry points into the assembler VM ---------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	708 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	709 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	710 \|->vm_resume: // Setup C frame and resume thread.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	711 \| // (lua_State L, TValue base, int nres1 = 0, ptrdiff_t ef = 0)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	712 \| saveregs
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	713 \| mr L, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	714 \| lwz DISPATCH, L->glref // Setup pointer to dispatch table.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	715 \| mr BASE, CARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	716 \| lbz TMP1, L->status
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	717 \| stw L, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	718 \| li PC, FRAME_CP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	719 \| addi TMP0, sp, CFRAME_RESUME
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	720 \| addi DISPATCH, DISPATCH, GG_G2DISP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	721 \| stw CARG3, SAVE_NRES
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	722 \| cmplwi TMP1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	723 \| stw CARG3, SAVE_ERRF
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	724 \| stp CARG3, SAVE_CFRAME
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	725 \| stw CARG1, SAVE_PC // Any value outside of bytecode is ok.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	726 \| stp TMP0, L->cframe
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	727 \| beq >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	728 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	729 \| // Resume after yield (like a return).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	730 \| stw L, DISPATCH_GL(cur_L)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	731 \| mr RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	732 \| lp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	733 \| li TISNUM, LJ_TISNUM // Setup type comparison constants.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	734 \| lp TMP1, L->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	735 \| lwz PC, FRAME_PC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	736 \| .FPU lus TMP3, 0x59c0 // TOBIT = 2^52 + 2^51 (float).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	737 \| stb CARG3, L->status
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	738 \| .FPU stw TMP3, TMPD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	739 \| .FPU ori TMP3, TMP3, 0x0004 // TONUM = 2^52 + 2^51 + 2^31 (float).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	740 \| .FPU lfs TOBIT, TMPD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	741 \| sub RD, TMP1, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	742 \| .FPU stw TMP3, TMPD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	743 \| .FPU lus TMP0, 0x4338 // Hiword of 2^52 + 2^51 (double)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	744 \| addi RD, RD, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	745 \| .FPU stw TMP0, TONUM_HI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	746 \| li_vmstate INTERP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	747 \| li ZERO, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	748 \| st_vmstate
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	749 \| andix. TMP0, PC, FRAME_TYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	750 \| mr MULTRES, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	751 \| .FPU lfs TONUM, TMPD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	752 \| li TISNIL, LJ_TNIL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	753 \| beq ->BC_RET_Z
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	754 \| b ->vm_return
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	755 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	756 \|->vm_pcall: // Setup protected C frame and enter VM.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	757 \| // (lua_State L, TValue base, int nres1, ptrdiff_t ef)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	758 \| saveregs
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	759 \| li PC, FRAME_CP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	760 \| stw CARG4, SAVE_ERRF
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	761 \| b >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	762 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	763 \|->vm_call: // Setup C frame and enter VM.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	764 \| // (lua_State L, TValue base, int nres1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	765 \| saveregs
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	766 \| li PC, FRAME_C
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	767 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	768 \|1: // Entry point for vm_pcall above (PC = ftype).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	769 \| lp TMP1, L:CARG1->cframe
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	770 \| mr L, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	771 \| stw CARG3, SAVE_NRES
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	772 \| lwz DISPATCH, L->glref // Setup pointer to dispatch table.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	773 \| stw CARG1, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	774 \| mr BASE, CARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	775 \| addi DISPATCH, DISPATCH, GG_G2DISP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	776 \| stw CARG1, SAVE_PC // Any value outside of bytecode is ok.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	777 \| stp TMP1, SAVE_CFRAME
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	778 \| stp sp, L->cframe // Add our C frame to cframe chain.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	779 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	780 \|3: // Entry point for vm_cpcall/vm_resume (BASE = base, PC = ftype).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	781 \| stw L, DISPATCH_GL(cur_L)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	782 \| lp TMP2, L->base // TMP2 = old base (used in vmeta_call).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	783 \| li TISNUM, LJ_TISNUM // Setup type comparison constants.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	784 \| lp TMP1, L->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	785 \| .FPU lus TMP3, 0x59c0 // TOBIT = 2^52 + 2^51 (float).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	786 \| add PC, PC, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	787 \| .FPU stw TMP3, TMPD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	788 \| li ZERO, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	789 \| .FPU ori TMP3, TMP3, 0x0004 // TONUM = 2^52 + 2^51 + 2^31 (float).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	790 \| .FPU lfs TOBIT, TMPD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	791 \| sub PC, PC, TMP2 // PC = frame delta + frame type
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	792 \| .FPU stw TMP3, TMPD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	793 \| .FPU lus TMP0, 0x4338 // Hiword of 2^52 + 2^51 (double)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	794 \| sub NARGS8:RC, TMP1, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	795 \| .FPU stw TMP0, TONUM_HI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	796 \| li_vmstate INTERP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	797 \| .FPU lfs TONUM, TMPD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	798 \| li TISNIL, LJ_TNIL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	799 \| st_vmstate
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	800 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	801 \|->vm_call_dispatch:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	802 \| // TMP2 = old base, BASE = new base, RC = nargs*8, PC = caller PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	803 \| lwz TMP0, FRAME_PC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	804 \| lwz LFUNC:RB, FRAME_FUNC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	805 \| checkfunc TMP0; bne ->vmeta_call
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	806 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	807 \|->vm_call_dispatch_f:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	808 \| ins_call
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	809 \| // BASE = new base, RB = func, RC = nargs*8, PC = caller PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	810 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	811 \|->vm_cpcall: // Setup protected C frame, call C.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	812 \| // (lua_State L, lua_CFunction func, void ud, lua_CPFunction cp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	813 \| saveregs
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	814 \| mr L, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	815 \| lwz TMP0, L:CARG1->stack
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	816 \| stw CARG1, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	817 \| lp TMP1, L->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	818 \| lwz DISPATCH, L->glref // Setup pointer to dispatch table.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	819 \| stw CARG1, SAVE_PC // Any value outside of bytecode is ok.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	820 \| sub TMP0, TMP0, TMP1 // Compute -savestack(L, L->top).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	821 \| lp TMP1, L->cframe
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	822 \| addi DISPATCH, DISPATCH, GG_G2DISP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	823 \| .toc lp CARG4, 0(CARG4)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	824 \| li TMP2, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	825 \| stw TMP0, SAVE_NRES // Neg. delta means cframe w/o frame.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	826 \| stw TMP2, SAVE_ERRF // No error function.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	827 \| stp TMP1, SAVE_CFRAME
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	828 \| stp sp, L->cframe // Add our C frame to cframe chain.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	829 \| stw L, DISPATCH_GL(cur_L)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	830 \| mtctr CARG4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	831 \| bctrl // (lua_State L, lua_CFunction func, void ud)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	832 \|.if PPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	833 \| mr BASE, CRET1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	834 \| cmpwi CRET1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	835 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	836 \| mr. BASE, CRET1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	837 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	838 \| li PC, FRAME_CP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	839 \| bne <3 // Else continue with the call.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	840 \| b ->vm_leave_cp // No base? Just remove C frame.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	841 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	842 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	843 \|//-- Metamethod handling ------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	844 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	845 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	846 \|// The lj_meta_* functions (except for lj_meta_cat) don't reallocate the
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	847 \|// stack, so BASE doesn't need to be reloaded across these calls.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	848 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	849 \|//-- Continuation dispatch ----------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	850 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	851 \|->cont_dispatch:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	852 \| // BASE = meta base, RA = resultptr, RD = (nresults+1)*8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	853 \| lwz TMP0, -12(BASE) // Continuation.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	854 \| mr RB, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	855 \| mr BASE, TMP2 // Restore caller BASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	856 \| lwz LFUNC:TMP1, FRAME_FUNC(TMP2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	857 \|.if FFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	858 \| cmplwi TMP0, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	859 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	860 \| lwz PC, -16(RB) // Restore PC from [cont\|PC].
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	861 \| subi TMP2, RD, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	862 \| stwx TISNIL, RA, TMP2 // Ensure one valid arg.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	863 \|.if FFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	864 \| ble >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	865 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	866 \| lwz TMP1, LFUNC:TMP1->pc
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	867 \| lwz KBASE, PC2PROTO(k)(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	868 \| // BASE = base, RA = resultptr, RB = meta base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	869 \| mtctr TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	870 \| bctr // Jump to continuation.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	871 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	872 \|.if FFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	873 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	874 \| beq ->cont_ffi_callback // cont = 1: return from FFI callback.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	875 \| // cont = 0: tailcall from C function.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	876 \| subi TMP1, RB, 16
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	877 \| sub RC, TMP1, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	878 \| b ->vm_call_tail
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	879 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	880 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	881 \|->cont_cat: // RA = resultptr, RB = meta base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	882 \| lwz INS, -4(PC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	883 \| subi CARG2, RB, 16
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	884 \| decode_RB8 SAVE0, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	885 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	886 \| lfd f0, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	887 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	888 \| lwz TMP2, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	889 \| lwz TMP3, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	890 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	891 \| add TMP1, BASE, SAVE0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	892 \| stp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	893 \| cmplw TMP1, CARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	894 \| sub CARG3, CARG2, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	895 \| decode_RA8 RA, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	896 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	897 \| stfd f0, 0(CARG2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	898 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	899 \| stw TMP2, 0(CARG2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	900 \| stw TMP3, 4(CARG2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	901 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	902 \| bney ->BC_CAT_Z
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	903 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	904 \| stfdx f0, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	905 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	906 \| stwux TMP2, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	907 \| stw TMP3, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	908 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	909 \| b ->cont_nop
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	910 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	911 \|//-- Table indexing metamethods -----------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	912 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	913 \|->vmeta_tgets1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	914 \| la CARG3, DISPATCH_GL(tmptv)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	915 \| li TMP0, LJ_TSTR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	916 \| decode_RB8 RB, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	917 \| stw STR:RC, 4(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	918 \| add CARG2, BASE, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	919 \| stw TMP0, 0(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	920 \| b >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	921 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	922 \|->vmeta_tgets:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	923 \| la CARG2, DISPATCH_GL(tmptv)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	924 \| li TMP0, LJ_TTAB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	925 \| stw TAB:RB, 4(CARG2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	926 \| la CARG3, DISPATCH_GL(tmptv2)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	927 \| stw TMP0, 0(CARG2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	928 \| li TMP1, LJ_TSTR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	929 \| stw STR:RC, 4(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	930 \| stw TMP1, 0(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	931 \| b >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	932 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	933 \|->vmeta_tgetb: // TMP0 = index
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	934 \|.if not DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	935 \| tonum_u f0, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	936 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	937 \| decode_RB8 RB, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	938 \| la CARG3, DISPATCH_GL(tmptv)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	939 \| add CARG2, BASE, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	940 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	941 \| stw TISNUM, 0(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	942 \| stw TMP0, 4(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	943 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	944 \| stfd f0, 0(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	945 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	946 \| b >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	947 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	948 \|->vmeta_tgetv:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	949 \| decode_RB8 RB, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	950 \| decode_RC8 RC, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	951 \| add CARG2, BASE, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	952 \| add CARG3, BASE, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	953 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	954 \| stp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	955 \| mr CARG1, L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	956 \| stw PC, SAVE_PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	957 \| bl extern lj_meta_tget // (lua_State L, TValue o, TValue *k)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	958 \| // Returns TValue * (finished) or NULL (metamethod).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	959 \| cmplwi CRET1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	960 \| beq >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	961 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	962 \| lfd f0, 0(CRET1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	963 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	964 \| lwz TMP0, 0(CRET1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	965 \| lwz TMP1, 4(CRET1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	966 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	967 \| ins_next1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	968 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	969 \| stfdx f0, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	970 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	971 \| stwux TMP0, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	972 \| stw TMP1, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	973 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	974 \| ins_next2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	975 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	976 \|3: // Call __index metamethod.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	977 \| // BASE = base, L->top = new base, stack = cont/func/t/k
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	978 \| subfic TMP1, BASE, FRAME_CONT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	979 \| lp BASE, L->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	980 \| stw PC, -16(BASE) // [cont\|PC]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	981 \| add PC, TMP1, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	982 \| lwz LFUNC:RB, FRAME_FUNC(BASE) // Guaranteed to be a function here.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	983 \| li NARGS8:RC, 16 // 2 args for func(t, k).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	984 \| b ->vm_call_dispatch_f
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	985 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	986 \|->vmeta_tgetr:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	987 \| bl extern lj_tab_getinth // (GCtab *t, int32_t key)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	988 \| // Returns cTValue * or NULL.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	989 \| cmplwi CRET1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	990 \| beq >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	991 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	992 \| lfd f14, 0(CRET1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	993 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	994 \| lwz SAVE0, 0(CRET1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	995 \| lwz SAVE1, 4(CRET1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	996 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	997 \| b ->BC_TGETR_Z
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	998 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	999 \| stwx TISNIL, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1000 \| b ->cont_nop
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1001 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1002 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1003 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1004 \|->vmeta_tsets1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1005 \| la CARG3, DISPATCH_GL(tmptv)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1006 \| li TMP0, LJ_TSTR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1007 \| decode_RB8 RB, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1008 \| stw STR:RC, 4(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1009 \| add CARG2, BASE, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1010 \| stw TMP0, 0(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1011 \| b >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1012 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1013 \|->vmeta_tsets:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1014 \| la CARG2, DISPATCH_GL(tmptv)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1015 \| li TMP0, LJ_TTAB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1016 \| stw TAB:RB, 4(CARG2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1017 \| la CARG3, DISPATCH_GL(tmptv2)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1018 \| stw TMP0, 0(CARG2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1019 \| li TMP1, LJ_TSTR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1020 \| stw STR:RC, 4(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1021 \| stw TMP1, 0(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1022 \| b >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1023 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1024 \|->vmeta_tsetb: // TMP0 = index
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1025 \|.if not DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1026 \| tonum_u f0, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1027 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1028 \| decode_RB8 RB, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1029 \| la CARG3, DISPATCH_GL(tmptv)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1030 \| add CARG2, BASE, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1031 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1032 \| stw TISNUM, 0(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1033 \| stw TMP0, 4(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1034 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1035 \| stfd f0, 0(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1036 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1037 \| b >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1038 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1039 \|->vmeta_tsetv:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1040 \| decode_RB8 RB, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1041 \| decode_RC8 RC, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1042 \| add CARG2, BASE, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1043 \| add CARG3, BASE, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1044 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1045 \| stp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1046 \| mr CARG1, L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1047 \| stw PC, SAVE_PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1048 \| bl extern lj_meta_tset // (lua_State L, TValue o, TValue *k)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1049 \| // Returns TValue * (finished) or NULL (metamethod).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1050 \| cmplwi CRET1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1051 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1052 \| lfdx f0, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1053 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1054 \| lwzux TMP2, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1055 \| lwz TMP3, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1056 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1057 \| beq >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1058 \| // NOBARRIER: lj_meta_tset ensures the table is not black.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1059 \| ins_next1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1060 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1061 \| stfd f0, 0(CRET1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1062 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1063 \| stw TMP2, 0(CRET1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1064 \| stw TMP3, 4(CRET1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1065 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1066 \| ins_next2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1067 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1068 \|3: // Call __newindex metamethod.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1069 \| // BASE = base, L->top = new base, stack = cont/func/t/k/(v)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1070 \| subfic TMP1, BASE, FRAME_CONT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1071 \| lp BASE, L->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1072 \| stw PC, -16(BASE) // [cont\|PC]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1073 \| add PC, TMP1, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1074 \| lwz LFUNC:RB, FRAME_FUNC(BASE) // Guaranteed to be a function here.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1075 \| li NARGS8:RC, 24 // 3 args for func(t, k, v)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1076 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1077 \| stfd f0, 16(BASE) // Copy value to third argument.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1078 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1079 \| stw TMP2, 16(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1080 \| stw TMP3, 20(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1081 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1082 \| b ->vm_call_dispatch_f
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1083 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1084 \|->vmeta_tsetr:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1085 \| stp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1086 \| mr CARG1, L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1087 \| stw PC, SAVE_PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1088 \| bl extern lj_tab_setinth // (lua_State L, GCtab t, int32_t key)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1089 \| // Returns TValue *.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1090 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1091 \| stfd f14, 0(CRET1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1092 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1093 \| stw SAVE0, 0(CRET1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1094 \| stw SAVE1, 4(CRET1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1095 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1096 \| b ->cont_nop
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1097 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1098 \|//-- Comparison metamethods ---------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1099 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1100 \|->vmeta_comp:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1101 \| mr CARG1, L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1102 \| subi PC, PC, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1103 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1104 \| mr CARG2, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1105 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1106 \| add CARG2, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1107 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1108 \| stw PC, SAVE_PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1109 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1110 \| mr CARG3, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1111 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1112 \| add CARG3, BASE, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1113 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1114 \| stp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1115 \| decode_OP1 CARG4, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1116 \| bl extern lj_meta_comp // (lua_State L, TValue o1, *o2, int op)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1117 \| // Returns 0/1 or TValue * (metamethod).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1118 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1119 \| cmplwi CRET1, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1120 \| bgt ->vmeta_binop
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1121 \| subfic CRET1, CRET1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1122 \|4:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1123 \| lwz INS, 0(PC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1124 \| addi PC, PC, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1125 \| decode_RD4 TMP2, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1126 \| addis TMP2, TMP2, -(BCBIAS_J*4 >> 16)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1127 \| and TMP2, TMP2, CRET1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1128 \| add PC, PC, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1129 \|->cont_nop:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1130 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1131 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1132 \|->cont_ra: // RA = resultptr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1133 \| lwz INS, -4(PC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1134 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1135 \| lfd f0, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1136 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1137 \| lwz CARG1, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1138 \| lwz CARG2, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1139 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1140 \| decode_RA8 TMP1, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1141 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1142 \| stfdx f0, BASE, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1143 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1144 \| stwux CARG1, TMP1, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1145 \| stw CARG2, 4(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1146 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1147 \| b ->cont_nop
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1148 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1149 \|->cont_condt: // RA = resultptr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1150 \| lwz TMP0, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1151 \| .gpr64 extsw TMP0, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1152 \| subfic TMP0, TMP0, LJ_TTRUE // Branch if result is true.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1153 \| subfe CRET1, CRET1, CRET1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1154 \| not CRET1, CRET1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1155 \| b <4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1156 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1157 \|->cont_condf: // RA = resultptr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1158 \| lwz TMP0, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1159 \| .gpr64 extsw TMP0, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1160 \| subfic TMP0, TMP0, LJ_TTRUE // Branch if result is false.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1161 \| subfe CRET1, CRET1, CRET1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1162 \| b <4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1163 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1164 \|->vmeta_equal:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1165 \| // CARG2, CARG3, CARG4 are already set by BC_ISEQV/BC_ISNEV.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1166 \| subi PC, PC, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1167 \| stp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1168 \| mr CARG1, L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1169 \| stw PC, SAVE_PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1170 \| bl extern lj_meta_equal // (lua_State L, GCobj o1, *o2, int ne)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1171 \| // Returns 0/1 or TValue * (metamethod).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1172 \| b <3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1173 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1174 \|->vmeta_equal_cd:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1175 \|.if FFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1176 \| mr CARG2, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1177 \| subi PC, PC, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1178 \| stp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1179 \| mr CARG1, L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1180 \| stw PC, SAVE_PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1181 \| bl extern lj_meta_equal_cd // (lua_State *L, BCIns op)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1182 \| // Returns 0/1 or TValue * (metamethod).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1183 \| b <3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1184 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1185 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1186 \|->vmeta_istype:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1187 \| subi PC, PC, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1188 \| stp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1189 \| srwi CARG2, RA, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1190 \| mr CARG1, L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1191 \| srwi CARG3, RD, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1192 \| stw PC, SAVE_PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1193 \| bl extern lj_meta_istype // (lua_State *L, BCReg ra, BCReg tp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1194 \| b ->cont_nop
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1195 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1196 \|//-- Arithmetic metamethods ---------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1197 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1198 \|->vmeta_arith_nv:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1199 \| add CARG3, KBASE, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1200 \| add CARG4, BASE, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1201 \| b >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1202 \|->vmeta_arith_nv2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1203 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1204 \| mr CARG3, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1205 \| mr CARG4, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1206 \| b >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1207 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1208 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1209 \|->vmeta_unm:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1210 \| mr CARG3, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1211 \| mr CARG4, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1212 \| b >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1213 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1214 \|->vmeta_arith_vn:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1215 \| add CARG3, BASE, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1216 \| add CARG4, KBASE, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1217 \| b >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1218 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1219 \|->vmeta_arith_vv:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1220 \| add CARG3, BASE, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1221 \| add CARG4, BASE, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1222 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1223 \| b >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1224 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1225 \|->vmeta_arith_vn2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1226 \|->vmeta_arith_vv2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1227 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1228 \| mr CARG3, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1229 \| mr CARG4, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1230 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1231 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1232 \| add CARG2, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1233 \| stp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1234 \| mr CARG1, L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1235 \| stw PC, SAVE_PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1236 \| decode_OP1 CARG5, INS // Caveat: CARG5 overlaps INS.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1237 \| bl extern lj_meta_arith // (lua_State L, TValue ra,rb,rc, BCReg op)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1238 \| // Returns NULL (finished) or TValue * (metamethod).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1239 \| cmplwi CRET1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1240 \| beq ->cont_nop
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1241 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1242 \| // Call metamethod for binary op.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1243 \|->vmeta_binop:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1244 \| // BASE = old base, CRET1 = new base, stack = cont/func/o1/o2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1245 \| sub TMP1, CRET1, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1246 \| stw PC, -16(CRET1) // [cont\|PC]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1247 \| mr TMP2, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1248 \| addi PC, TMP1, FRAME_CONT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1249 \| mr BASE, CRET1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1250 \| li NARGS8:RC, 16 // 2 args for func(o1, o2).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1251 \| b ->vm_call_dispatch
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1252 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1253 \|->vmeta_len:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1254 #if LJ_52
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1255 \| mr SAVE0, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1256 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1257 \| mr CARG2, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1258 \| stp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1259 \| mr CARG1, L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1260 \| stw PC, SAVE_PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1261 \| bl extern lj_meta_len // (lua_State L, TValue o)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1262 \| // Returns NULL (retry) or TValue * (metamethod base).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1263 #if LJ_52
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1264 \| cmplwi CRET1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1265 \| bne ->vmeta_binop // Binop call for compatibility.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1266 \| mr CARG1, SAVE0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1267 \| b ->BC_LEN_Z
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1268 #else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1269 \| b ->vmeta_binop // Binop call for compatibility.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1270 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1271 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1272 \|//-- Call metamethod ----------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1273 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1274 \|->vmeta_call: // Resolve and call __call metamethod.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1275 \| // TMP2 = old base, BASE = new base, RC = nargs*8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1276 \| mr CARG1, L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1277 \| stp TMP2, L->base // This is the callers base!
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1278 \| subi CARG2, BASE, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1279 \| stw PC, SAVE_PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1280 \| add CARG3, BASE, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1281 \| mr SAVE0, NARGS8:RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1282 \| bl extern lj_meta_call // (lua_State L, TValue func, TValue *top)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1283 \| lwz LFUNC:RB, FRAME_FUNC(BASE) // Guaranteed to be a function here.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1284 \| addi NARGS8:RC, SAVE0, 8 // Got one more argument now.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1285 \| ins_call
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1286 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1287 \|->vmeta_callt: // Resolve __call for BC_CALLT.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1288 \| // BASE = old base, RA = new base, RC = nargs*8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1289 \| mr CARG1, L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1290 \| stp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1291 \| subi CARG2, RA, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1292 \| stw PC, SAVE_PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1293 \| add CARG3, RA, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1294 \| mr SAVE0, NARGS8:RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1295 \| bl extern lj_meta_call // (lua_State L, TValue func, TValue *top)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1296 \| lwz TMP1, FRAME_PC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1297 \| addi NARGS8:RC, SAVE0, 8 // Got one more argument now.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1298 \| lwz LFUNC:RB, FRAME_FUNC(RA) // Guaranteed to be a function here.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1299 \| b ->BC_CALLT_Z
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1300 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1301 \|//-- Argument coercion for 'for' statement ------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1302 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1303 \|->vmeta_for:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1304 \| mr CARG1, L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1305 \| stp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1306 \| mr CARG2, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1307 \| stw PC, SAVE_PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1308 \| mr SAVE0, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1309 \| bl extern lj_meta_for // (lua_State L, TValue base)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1310 \|.if JIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1311 \| decode_OP1 TMP0, SAVE0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1312 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1313 \| decode_RA8 RA, SAVE0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1314 \|.if JIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1315 \| cmpwi TMP0, BC_JFORI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1316 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1317 \| decode_RD8 RD, SAVE0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1318 \|.if JIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1319 \| beqy =>BC_JFORI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1320 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1321 \| b =>BC_FORI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1322 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1323 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1324 \|//-- Fast functions -----------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1325 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1326 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1327 \|.macro .ffunc, name
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1328 \|->ff_ .. name:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1329 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1330 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1331 \|.macro .ffunc_1, name
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1332 \|->ff_ .. name:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1333 \| cmplwi NARGS8:RC, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1334 \| lwz CARG3, 0(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1335 \| lwz CARG1, 4(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1336 \| blt ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1337 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1338 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1339 \|.macro .ffunc_2, name
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1340 \|->ff_ .. name:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1341 \| cmplwi NARGS8:RC, 16
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1342 \| lwz CARG3, 0(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1343 \| lwz CARG4, 8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1344 \| lwz CARG1, 4(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1345 \| lwz CARG2, 12(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1346 \| blt ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1347 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1348 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1349 \|.macro .ffunc_n, name
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1350 \|->ff_ .. name:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1351 \| cmplwi NARGS8:RC, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1352 \| lwz CARG1, 0(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1353 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1354 \| lfd FARG1, 0(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1355 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1356 \| lwz CARG2, 4(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1357 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1358 \| blt ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1359 \| checknum CARG1; bge ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1360 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1361 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1362 \|.macro .ffunc_nn, name
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1363 \|->ff_ .. name:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1364 \| cmplwi NARGS8:RC, 16
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1365 \| lwz CARG1, 0(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1366 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1367 \| lfd FARG1, 0(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1368 \| lwz CARG3, 8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1369 \| lfd FARG2, 8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1370 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1371 \| lwz CARG2, 4(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1372 \| lwz CARG3, 8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1373 \| lwz CARG4, 12(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1374 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1375 \| blt ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1376 \| checknum CARG1; bge ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1377 \| checknum CARG3; bge ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1378 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1379 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1380 \|// Inlined GC threshold check. Caveat: uses TMP0 and TMP1.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1381 \|.macro ffgccheck
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1382 \| lwz TMP0, DISPATCH_GL(gc.total)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1383 \| lwz TMP1, DISPATCH_GL(gc.threshold)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1384 \| cmplw TMP0, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1385 \| bgel ->fff_gcstep
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1386 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1387 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1388 \|//-- Base library: checks -----------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1389 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1390 \|.ffunc_1 assert
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1391 \| li TMP1, LJ_TFALSE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1392 \| la RA, -8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1393 \| cmplw cr1, CARG3, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1394 \| lwz PC, FRAME_PC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1395 \| bge cr1, ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1396 \| stw CARG3, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1397 \| addi RD, NARGS8:RC, 8 // Compute (nresults+1)*8.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1398 \| addi TMP1, BASE, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1399 \| add TMP2, RA, NARGS8:RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1400 \| stw CARG1, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1401 \| beq ->fff_res // Done if exactly 1 argument.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1402 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1403 \| cmplw TMP1, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1404 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1405 \| lfd f0, 0(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1406 \| stfd f0, 0(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1407 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1408 \| lwz CARG1, 0(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1409 \| lwz CARG2, 4(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1410 \| stw CARG1, -8(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1411 \| stw CARG2, -4(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1412 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1413 \| addi TMP1, TMP1, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1414 \| bney <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1415 \| b ->fff_res
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1416 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1417 \|.ffunc type
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1418 \| cmplwi NARGS8:RC, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1419 \| lwz CARG1, 0(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1420 \| blt ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1421 \| .gpr64 extsw CARG1, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1422 \| subfc TMP0, TISNUM, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1423 \| subfe TMP2, CARG1, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1424 \| orc TMP1, TMP2, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1425 \| addi TMP1, TMP1, ~LJ_TISNUM+1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1426 \| slwi TMP1, TMP1, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1427 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1428 \| la TMP2, CFUNC:RB->upvalue
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1429 \| lfdx FARG1, TMP2, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1430 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1431 \| add TMP1, CFUNC:RB, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1432 \| lwz CARG1, CFUNC:TMP1->upvalue[0].u32.hi
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1433 \| lwz CARG2, CFUNC:TMP1->upvalue[0].u32.lo
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1434 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1435 \| b ->fff_resn
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1436 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1437 \|//-- Base library: getters and setters ---------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1438 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1439 \|.ffunc_1 getmetatable
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1440 \| checktab CARG3; bne >6
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1441 \|1: // Field metatable must be at same offset for GCtab and GCudata!
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1442 \| lwz TAB:CARG1, TAB:CARG1->metatable
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1443 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1444 \| li CARG3, LJ_TNIL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1445 \| cmplwi TAB:CARG1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1446 \| lwz STR:RC, DISPATCH_GL(gcroot[GCROOT_MMNAME+MM_metatable])(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1447 \| beq ->fff_restv
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1448 \| lwz TMP0, TAB:CARG1->hmask
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1449 \| li CARG3, LJ_TTAB // Use metatable as default result.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1450 \| lwz TMP1, STR:RC->sid
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1451 \| lwz NODE:TMP2, TAB:CARG1->node
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1452 \| and TMP1, TMP1, TMP0 // idx = str->sid & tab->hmask
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1453 \| slwi TMP0, TMP1, 5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1454 \| slwi TMP1, TMP1, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1455 \| sub TMP1, TMP0, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1456 \| add NODE:TMP2, NODE:TMP2, TMP1 // node = tab->node + (idx32-idx8)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1457 \|3: // Rearranged logic, because we expect _not_ to find the key.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1458 \| lwz CARG4, NODE:TMP2->key
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1459 \| lwz TMP0, 4+offsetof(Node, key)(NODE:TMP2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1460 \| lwz CARG2, NODE:TMP2->val
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1461 \| lwz TMP1, 4+offsetof(Node, val)(NODE:TMP2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1462 \| checkstr CARG4; bne >4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1463 \| cmpw TMP0, STR:RC; beq >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1464 \|4:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1465 \| lwz NODE:TMP2, NODE:TMP2->next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1466 \| cmplwi NODE:TMP2, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1467 \| beq ->fff_restv // Not found, keep default result.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1468 \| b <3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1469 \|5:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1470 \| checknil CARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1471 \| beq ->fff_restv // Ditto for nil value.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1472 \| mr CARG3, CARG2 // Return value of mt.__metatable.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1473 \| mr CARG1, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1474 \| b ->fff_restv
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1475 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1476 \|6:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1477 \| cmpwi CARG3, LJ_TUDATA; beq <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1478 \| .gpr64 extsw CARG3, CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1479 \| subfc TMP0, TISNUM, CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1480 \| subfe TMP2, CARG3, CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1481 \| orc TMP1, TMP2, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1482 \| addi TMP1, TMP1, ~LJ_TISNUM+1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1483 \| slwi TMP1, TMP1, 2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1484 \| la TMP2, DISPATCH_GL(gcroot[GCROOT_BASEMT])(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1485 \| lwzx TAB:CARG1, TMP2, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1486 \| b <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1487 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1488 \|.ffunc_2 setmetatable
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1489 \| // Fast path: no mt for table yet and not clearing the mt.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1490 \| checktab CARG3; bne ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1491 \| lwz TAB:TMP1, TAB:CARG1->metatable
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1492 \| checktab CARG4; bne ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1493 \| cmplwi TAB:TMP1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1494 \| lbz TMP3, TAB:CARG1->marked
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1495 \| bne ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1496 \| andix. TMP0, TMP3, LJ_GC_BLACK // isblack(table)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1497 \| stw TAB:CARG2, TAB:CARG1->metatable
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1498 \| beq ->fff_restv
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1499 \| barrierback TAB:CARG1, TMP3, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1500 \| b ->fff_restv
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1501 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1502 \|.ffunc rawget
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1503 \| cmplwi NARGS8:RC, 16
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1504 \| lwz CARG4, 0(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1505 \| lwz TAB:CARG2, 4(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1506 \| blt ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1507 \| checktab CARG4; bne ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1508 \| la CARG3, 8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1509 \| mr CARG1, L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1510 \| bl extern lj_tab_get // (lua_State L, GCtab t, cTValue *key)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1511 \| // Returns cTValue *.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1512 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1513 \| lfd FARG1, 0(CRET1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1514 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1515 \| lwz CARG2, 4(CRET1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1516 \| lwz CARG1, 0(CRET1) // Caveat: CARG1 == CRET1.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1517 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1518 \| b ->fff_resn
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1519 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1520 \|//-- Base library: conversions ------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1521 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1522 \|.ffunc tonumber
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1523 \| // Only handles the number case inline (without a base argument).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1524 \| cmplwi NARGS8:RC, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1525 \| lwz CARG1, 0(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1526 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1527 \| lfd FARG1, 0(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1528 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1529 \| lwz CARG2, 4(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1530 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1531 \| bne ->fff_fallback // Exactly one argument.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1532 \| checknum CARG1; bgt ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1533 \| b ->fff_resn
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1534 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1535 \|.ffunc_1 tostring
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1536 \| // Only handles the string or number case inline.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1537 \| checkstr CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1538 \| // A __tostring method in the string base metatable is ignored.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1539 \| beq ->fff_restv // String key?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1540 \| // Handle numbers inline, unless a number base metatable is present.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1541 \| lwz TMP0, DISPATCH_GL(gcroot[GCROOT_BASEMT_NUM])(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1542 \| checknum CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1543 \| cmplwi cr1, TMP0, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1544 \| stp BASE, L->base // Add frame since C call can throw.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1545 \| crorc 4cr0+eq, 4cr0+gt, 4*cr1+eq
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1546 \| stw PC, SAVE_PC // Redundant (but a defined value).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1547 \| beq ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1548 \| ffgccheck
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1549 \| mr CARG1, L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1550 \| mr CARG2, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1551 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1552 \| bl extern lj_strfmt_number // (lua_State L, cTValue o)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1553 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1554 \| bl extern lj_strfmt_num // (lua_State L, lua_Number np)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1555 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1556 \| // Returns GCstr *.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1557 \| li CARG3, LJ_TSTR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1558 \| b ->fff_restv
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1559 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1560 \|//-- Base library: iterators -------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1561 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1562 \|.ffunc_1 next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1563 \| stwx TISNIL, BASE, NARGS8:RC // Set missing 2nd arg to nil.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1564 \| checktab CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1565 \| lwz PC, FRAME_PC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1566 \| bne ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1567 \| la CARG2, 8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1568 \| la CARG3, -8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1569 \| bl extern lj_tab_next // (GCtab t, cTValue key, TValue *o)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1570 \| // Returns 1=found, 0=end, -1=error.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1571 \| cmpwi CRET1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1572 \| la RA, -8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1573 \| li RD, (2+1)*8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1574 \| bgt ->fff_res // Found key/value.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1575 \| li CARG3, LJ_TNIL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1576 \| beq ->fff_restv // End of traversal: return nil.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1577 \| lwz CFUNC:RB, FRAME_FUNC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1578 \| li NARGS8:RC, 2*8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1579 \| b ->fff_fallback // Invalid key.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1580 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1581 \|.ffunc_1 pairs
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1582 \| checktab CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1583 \| lwz PC, FRAME_PC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1584 \| bne ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1585 #if LJ_52
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1586 \| lwz TAB:TMP2, TAB:CARG1->metatable
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1587 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1588 \| lfd f0, CFUNC:RB->upvalue[0]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1589 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1590 \| lwz TMP0, CFUNC:RB->upvalue[0].u32.hi
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1591 \| lwz TMP1, CFUNC:RB->upvalue[0].u32.lo
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1592 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1593 \| cmplwi TAB:TMP2, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1594 \| la RA, -8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1595 \| bne ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1596 #else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1597 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1598 \| lfd f0, CFUNC:RB->upvalue[0]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1599 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1600 \| lwz TMP0, CFUNC:RB->upvalue[0].u32.hi
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1601 \| lwz TMP1, CFUNC:RB->upvalue[0].u32.lo
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1602 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1603 \| la RA, -8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1604 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1605 \| stw TISNIL, 8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1606 \| li RD, (3+1)*8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1607 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1608 \| stfd f0, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1609 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1610 \| stw TMP0, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1611 \| stw TMP1, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1612 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1613 \| b ->fff_res
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1614 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1615 \|.ffunc ipairs_aux
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1616 \| cmplwi NARGS8:RC, 16
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1617 \| lwz CARG3, 0(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1618 \| lwz TAB:CARG1, 4(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1619 \| lwz CARG4, 8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1620 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1621 \| lwz TMP2, 12(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1622 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1623 \| lfd FARG2, 8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1624 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1625 \| blt ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1626 \| checktab CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1627 \| checknum cr1, CARG4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1628 \| lwz PC, FRAME_PC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1629 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1630 \| bne ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1631 \| bne cr1, ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1632 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1633 \| lus TMP0, 0x3ff0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1634 \| stw ZERO, TMPD_LO
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1635 \| bne ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1636 \| stw TMP0, TMPD_HI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1637 \| bge cr1, ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1638 \| lfd FARG1, TMPD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1639 \| toint TMP2, FARG2, f0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1640 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1641 \| lwz TMP0, TAB:CARG1->asize
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1642 \| lwz TMP1, TAB:CARG1->array
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1643 \|.if not DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1644 \| fadd FARG2, FARG2, FARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1645 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1646 \| addi TMP2, TMP2, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1647 \| la RA, -8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1648 \| cmplw TMP0, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1649 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1650 \| stw TISNUM, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1651 \| slwi TMP3, TMP2, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1652 \| stw TMP2, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1653 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1654 \| slwi TMP3, TMP2, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1655 \| stfd FARG2, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1656 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1657 \| ble >2 // Not in array part?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1658 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1659 \| lwzx TMP2, TMP1, TMP3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1660 \| lfdx f0, TMP1, TMP3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1661 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1662 \| lwzux TMP2, TMP1, TMP3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1663 \| lwz TMP3, 4(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1664 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1665 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1666 \| checknil TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1667 \| li RD, (0+1)*8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1668 \| beq ->fff_res // End of iteration, return 0 results.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1669 \| li RD, (2+1)*8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1670 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1671 \| stfd f0, 8(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1672 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1673 \| stw TMP2, 8(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1674 \| stw TMP3, 12(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1675 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1676 \| b ->fff_res
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1677 \|2: // Check for empty hash part first. Otherwise call C function.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1678 \| lwz TMP0, TAB:CARG1->hmask
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1679 \| cmplwi TMP0, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1680 \| li RD, (0+1)*8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1681 \| beq ->fff_res
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1682 \| mr CARG2, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1683 \| bl extern lj_tab_getinth // (GCtab *t, int32_t key)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1684 \| // Returns cTValue * or NULL.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1685 \| cmplwi CRET1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1686 \| li RD, (0+1)*8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1687 \| beq ->fff_res
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1688 \| lwz TMP2, 0(CRET1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1689 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1690 \| lfd f0, 0(CRET1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1691 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1692 \| lwz TMP3, 4(CRET1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1693 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1694 \| b <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1695 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1696 \|.ffunc_1 ipairs
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1697 \| checktab CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1698 \| lwz PC, FRAME_PC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1699 \| bne ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1700 #if LJ_52
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1701 \| lwz TAB:TMP2, TAB:CARG1->metatable
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1702 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1703 \| lfd f0, CFUNC:RB->upvalue[0]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1704 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1705 \| lwz TMP0, CFUNC:RB->upvalue[0].u32.hi
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1706 \| lwz TMP1, CFUNC:RB->upvalue[0].u32.lo
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1707 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1708 \| cmplwi TAB:TMP2, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1709 \| la RA, -8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1710 \| bne ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1711 #else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1712 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1713 \| lfd f0, CFUNC:RB->upvalue[0]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1714 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1715 \| lwz TMP0, CFUNC:RB->upvalue[0].u32.hi
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1716 \| lwz TMP1, CFUNC:RB->upvalue[0].u32.lo
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1717 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1718 \| la RA, -8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1719 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1720 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1721 \| stw TISNUM, 8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1722 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1723 \| stw ZERO, 8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1724 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1725 \| stw ZERO, 12(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1726 \| li RD, (3+1)*8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1727 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1728 \| stfd f0, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1729 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1730 \| stw TMP0, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1731 \| stw TMP1, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1732 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1733 \| b ->fff_res
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1734 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1735 \|//-- Base library: catch errors ----------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1736 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1737 \|.ffunc pcall
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1738 \| cmplwi NARGS8:RC, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1739 \| lbz TMP3, DISPATCH_GL(hookmask)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1740 \| blt ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1741 \| mr TMP2, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1742 \| la BASE, 8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1743 \| // Remember active hook before pcall.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1744 \| rlwinm TMP3, TMP3, 32-HOOK_ACTIVE_SHIFT, 31, 31
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1745 \| subi NARGS8:RC, NARGS8:RC, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1746 \| addi PC, TMP3, 8+FRAME_PCALL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1747 \| b ->vm_call_dispatch
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1748 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1749 \|.ffunc xpcall
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1750 \| cmplwi NARGS8:RC, 16
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1751 \| lwz CARG3, 8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1752 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1753 \| lfd FARG2, 8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1754 \| lfd FARG1, 0(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1755 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1756 \| lwz CARG1, 0(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1757 \| lwz CARG2, 4(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1758 \| lwz CARG4, 12(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1759 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1760 \| blt ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1761 \| lbz TMP1, DISPATCH_GL(hookmask)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1762 \| mr TMP2, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1763 \| checkfunc CARG3; bne ->fff_fallback // Traceback must be a function.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1764 \| la BASE, 16(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1765 \| // Remember active hook before pcall.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1766 \| rlwinm TMP1, TMP1, 32-HOOK_ACTIVE_SHIFT, 31, 31
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1767 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1768 \| stfd FARG2, 0(TMP2) // Swap function and traceback.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1769 \| stfd FARG1, 8(TMP2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1770 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1771 \| stw CARG3, 0(TMP2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1772 \| stw CARG4, 4(TMP2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1773 \| stw CARG1, 8(TMP2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1774 \| stw CARG2, 12(TMP2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1775 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1776 \| subi NARGS8:RC, NARGS8:RC, 16
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1777 \| addi PC, TMP1, 16+FRAME_PCALL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1778 \| b ->vm_call_dispatch
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1779 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1780 \|//-- Coroutine library --------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1781 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1782 \|.macro coroutine_resume_wrap, resume
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1783 \|.if resume
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1784 \|.ffunc_1 coroutine_resume
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1785 \| cmpwi CARG3, LJ_TTHREAD; bne ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1786 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1787 \|.ffunc coroutine_wrap_aux
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1788 \| lwz L:CARG1, CFUNC:RB->upvalue[0].gcr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1789 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1790 \| lbz TMP0, L:CARG1->status
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1791 \| lp TMP1, L:CARG1->cframe
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1792 \| lp CARG2, L:CARG1->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1793 \| cmplwi cr0, TMP0, LUA_YIELD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1794 \| lp TMP2, L:CARG1->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1795 \| cmplwi cr1, TMP1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1796 \| lwz TMP0, L:CARG1->maxstack
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1797 \| cmplw cr7, CARG2, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1798 \| lwz PC, FRAME_PC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1799 \| crorc 4cr6+lt, 4cr0+gt, 4*cr1+eq // st>LUA_YIELD \|\| cframe!=0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1800 \| add TMP2, CARG2, NARGS8:RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1801 \| crandc 4cr6+gt, 4cr7+eq, 4*cr0+eq // base==top && st!=LUA_YIELD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1802 \| cmplw cr1, TMP2, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1803 \| cror 4cr6+lt, 4cr6+lt, 4*cr6+gt
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1804 \| stw PC, SAVE_PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1805 \| cror 4cr6+lt, 4cr6+lt, 4*cr1+gt // cond1 \|\| cond2 \|\| stackov
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1806 \| stp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1807 \| blt cr6, ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1808 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1809 \|.if resume
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1810 \| addi BASE, BASE, 8 // Keep resumed thread in stack for GC.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1811 \| subi NARGS8:RC, NARGS8:RC, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1812 \| subi TMP2, TMP2, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1813 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1814 \| stp TMP2, L:CARG1->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1815 \| li TMP1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1816 \| stp BASE, L->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1817 \|2: // Move args to coroutine.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1818 \| cmpw TMP1, NARGS8:RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1819 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1820 \| lfdx f0, BASE, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1821 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1822 \| add CARG3, BASE, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1823 \| lwz TMP2, 0(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1824 \| lwz TMP3, 4(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1825 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1826 \| beq >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1827 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1828 \| stfdx f0, CARG2, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1829 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1830 \| add CARG3, CARG2, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1831 \| stw TMP2, 0(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1832 \| stw TMP3, 4(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1833 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1834 \| addi TMP1, TMP1, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1835 \| b <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1836 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1837 \| li CARG3, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1838 \| mr L:SAVE0, L:CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1839 \| li CARG4, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1840 \| bl ->vm_resume // (lua_State L, TValue base, 0, 0)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1841 \| // Returns thread status.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1842 \|4:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1843 \| lp TMP2, L:SAVE0->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1844 \| cmplwi CRET1, LUA_YIELD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1845 \| lp TMP3, L:SAVE0->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1846 \| li_vmstate INTERP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1847 \| lp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1848 \| stw L, DISPATCH_GL(cur_L)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1849 \| st_vmstate
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1850 \| bgt >8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1851 \| sub RD, TMP3, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1852 \| lwz TMP0, L->maxstack
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1853 \| cmplwi RD, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1854 \| add TMP1, BASE, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1855 \| beq >6 // No results?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1856 \| cmplw TMP1, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1857 \| li TMP1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1858 \| bgt >9 // Need to grow stack?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1859 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1860 \| subi TMP3, RD, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1861 \| stp TMP2, L:SAVE0->top // Clear coroutine stack.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1862 \|5: // Move results from coroutine.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1863 \| cmplw TMP1, TMP3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1864 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1865 \| lfdx f0, TMP2, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1866 \| stfdx f0, BASE, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1867 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1868 \| add CARG3, TMP2, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1869 \| lwz CARG1, 0(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1870 \| lwz CARG2, 4(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1871 \| add CARG3, BASE, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1872 \| stw CARG1, 0(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1873 \| stw CARG2, 4(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1874 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1875 \| addi TMP1, TMP1, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1876 \| bne <5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1877 \|6:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1878 \| andix. TMP0, PC, FRAME_TYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1879 \|.if resume
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1880 \| li TMP1, LJ_TTRUE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1881 \| la RA, -8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1882 \| stw TMP1, -8(BASE) // Prepend true to results.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1883 \| addi RD, RD, 16
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1884 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1885 \| mr RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1886 \| addi RD, RD, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1887 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1888 \|7:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1889 \| stw PC, SAVE_PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1890 \| mr MULTRES, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1891 \| beq ->BC_RET_Z
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1892 \| b ->vm_return
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1893 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1894 \|8: // Coroutine returned with error (at co->top-1).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1895 \|.if resume
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1896 \| andix. TMP0, PC, FRAME_TYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1897 \| la TMP3, -8(TMP3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1898 \| li TMP1, LJ_TFALSE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1899 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1900 \| lfd f0, 0(TMP3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1901 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1902 \| lwz CARG1, 0(TMP3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1903 \| lwz CARG2, 4(TMP3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1904 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1905 \| stp TMP3, L:SAVE0->top // Remove error from coroutine stack.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1906 \| li RD, (2+1)*8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1907 \| stw TMP1, -8(BASE) // Prepend false to results.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1908 \| la RA, -8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1909 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1910 \| stfd f0, 0(BASE) // Copy error message.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1911 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1912 \| stw CARG1, 0(BASE) // Copy error message.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1913 \| stw CARG2, 4(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1914 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1915 \| b <7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1916 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1917 \| mr CARG1, L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1918 \| mr CARG2, L:SAVE0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1919 \| bl extern lj_ffh_coroutine_wrap_err // (lua_State L, lua_State co)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1920 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1921 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1922 \|9: // Handle stack expansion on return from yield.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1923 \| mr CARG1, L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1924 \| srwi CARG2, RD, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1925 \| bl extern lj_state_growstack // (lua_State *L, int n)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1926 \| li CRET1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1927 \| b <4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1928 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1929 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1930 \| coroutine_resume_wrap 1 // coroutine.resume
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1931 \| coroutine_resume_wrap 0 // coroutine.wrap
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1932 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1933 \|.ffunc coroutine_yield
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1934 \| lp TMP0, L->cframe
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1935 \| add TMP1, BASE, NARGS8:RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1936 \| stp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1937 \| andix. TMP0, TMP0, CFRAME_RESUME
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1938 \| stp TMP1, L->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1939 \| li CRET1, LUA_YIELD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1940 \| beq ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1941 \| stp ZERO, L->cframe
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1942 \| stb CRET1, L->status
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1943 \| b ->vm_leave_unw
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1944 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1945 \|//-- Math library -------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1946 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1947 \|.ffunc_1 math_abs
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1948 \| checknum CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1949 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1950 \| bne >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1951 \| srawi TMP1, CARG1, 31
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1952 \| xor TMP2, TMP1, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1953 \|.if GPR64
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1954 \| lus TMP0, 0x8000
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1955 \| sub CARG1, TMP2, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1956 \| cmplw CARG1, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1957 \| beq >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1958 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1959 \| sub. CARG1, TMP2, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1960 \| blt >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1961 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1962 \|->fff_resi:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1963 \| lwz PC, FRAME_PC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1964 \| la RA, -8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1965 \| stw TISNUM, -8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1966 \| stw CRET1, -4(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1967 \| b ->fff_res1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1968 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1969 \| lus CARG3, 0x41e0 // 2^31.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1970 \| li CARG1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1971 \| b ->fff_restv
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1972 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1973 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1974 \| bge ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1975 \| rlwinm CARG3, CARG3, 0, 1, 31
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1976 \| // Fallthrough.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1977 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1978 \|->fff_restv:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1979 \| // CARG3/CARG1 = TValue result.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1980 \| lwz PC, FRAME_PC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1981 \| stw CARG3, -8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1982 \| la RA, -8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1983 \| stw CARG1, -4(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1984 \|->fff_res1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1985 \| // RA = results, PC = return.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1986 \| li RD, (1+1)*8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1987 \|->fff_res:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1988 \| // RA = results, RD = (nresults+1)*8, PC = return.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1989 \| andix. TMP0, PC, FRAME_TYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1990 \| mr MULTRES, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1991 \| bney ->vm_return
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1992 \| lwz INS, -4(PC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1993 \| decode_RB8 RB, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1994 \|5:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1995 \| cmplw RB, RD // More results expected?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1996 \| decode_RA8 TMP0, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1997 \| bgt >6
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1998 \| ins_next1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1999 \| // Adjust BASE. KBASE is assumed to be set for the calling frame.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2000 \| sub BASE, RA, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2001 \| ins_next2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2002 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2003 \|6: // Fill up results with nil.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2004 \| subi TMP1, RD, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2005 \| addi RD, RD, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2006 \| stwx TISNIL, RA, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2007 \| b <5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2008 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2009 \|.macro math_extern, func
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2010 \| .ffunc_n math_ .. func
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2011 \| blex func
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2012 \| b ->fff_resn
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2013 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2014 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2015 \|.macro math_extern2, func
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2016 \| .ffunc_nn math_ .. func
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2017 \| blex func
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2018 \| b ->fff_resn
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2019 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2020 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2021 \|.macro math_round, func
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2022 \| .ffunc_1 math_ .. func
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2023 \| checknum CARG3; beqy ->fff_restv
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2024 \| rlwinm TMP2, CARG3, 12, 21, 31
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2025 \| bge ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2026 \| addic. TMP2, TMP2, -1023 // exp = exponent(x) - 1023
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2027 \| cmplwi cr1, TMP2, 31 // 0 <= exp < 31?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2028 \| subfic TMP0, TMP2, 31
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2029 \| blt >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2030 \| slwi TMP1, CARG3, 11
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2031 \| srwi TMP3, CARG1, 21
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2032 \| oris TMP1, TMP1, 0x8000
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2033 \| addi TMP2, TMP2, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2034 \| or TMP1, TMP1, TMP3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2035 \| slwi CARG2, CARG1, 11
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2036 \| bge cr1, >4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2037 \| slw TMP3, TMP1, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2038 \| srw RD, TMP1, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2039 \| or TMP3, TMP3, CARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2040 \| srawi TMP2, CARG3, 31
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2041 \|.if "func" == "floor"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2042 \| and TMP1, TMP3, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2043 \| addic TMP0, TMP1, -1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2044 \| subfe TMP1, TMP0, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2045 \| add CARG1, RD, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2046 \| xor CARG1, CARG1, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2047 \| sub CARG1, CARG1, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2048 \| b ->fff_resi
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2049 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2050 \| andc TMP1, TMP3, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2051 \| addic TMP0, TMP1, -1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2052 \| subfe TMP1, TMP0, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2053 \| add CARG1, RD, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2054 \| cmpw CARG1, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2055 \| xor CARG1, CARG1, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2056 \| sub CARG1, CARG1, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2057 \| bge ->fff_resi
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2058 \| // Overflow to 2^31.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2059 \| lus CARG3, 0x41e0 // 2^31.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2060 \| li CARG1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2061 \| b ->fff_restv
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2062 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2063 \|3: // \|x\| < 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2064 \| slwi TMP2, CARG3, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2065 \| srawi TMP1, CARG3, 31
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2066 \| or TMP2, CARG1, TMP2 // ztest = (hi+hi) \| lo
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2067 \|.if "func" == "floor"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2068 \| and TMP1, TMP2, TMP1 // (ztest & sign) == 0 ? 0 : -1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2069 \| subfic TMP2, TMP1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2070 \| subfe CARG1, CARG1, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2071 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2072 \| andc TMP1, TMP2, TMP1 // (ztest & ~sign) == 0 ? 0 : 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2073 \| addic TMP2, TMP1, -1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2074 \| subfe CARG1, TMP2, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2075 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2076 \| b ->fff_resi
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2077 \|4: // exp >= 31. Check for -(2^31).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2078 \| xoris TMP1, TMP1, 0x8000
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2079 \| srawi TMP2, CARG3, 31
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2080 \|.if "func" == "floor"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2081 \| or TMP1, TMP1, CARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2082 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2083 \|.if PPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2084 \| orc TMP1, TMP1, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2085 \| cmpwi TMP1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2086 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2087 \| orc. TMP1, TMP1, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2088 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2089 \| crand 4cr0+eq, 4cr0+eq, 4*cr1+eq
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2090 \| lus CARG1, 0x8000 // -(2^31).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2091 \| beqy ->fff_resi
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2092 \|5:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2093 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2094 \| lfd FARG1, 0(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2095 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2096 \| lwz CARG1, 0(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2097 \| lwz CARG2, 4(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2098 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2099 \| blex func
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2100 \| b ->fff_resn
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2101 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2102 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2103 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2104 \| math_round floor
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2105 \| math_round ceil
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2106 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2107 \| // NYI: use internal implementation.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2108 \| math_extern floor
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2109 \| math_extern ceil
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2110 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2111 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2112 \|.if SQRT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2113 \|.ffunc_n math_sqrt
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2114 \| fsqrt FARG1, FARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2115 \| b ->fff_resn
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2116 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2117 \| math_extern sqrt
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2118 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2119 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2120 \|.ffunc math_log
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2121 \| cmplwi NARGS8:RC, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2122 \| lwz CARG1, 0(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2123 \| bne ->fff_fallback // Need exactly 1 argument.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2124 \| checknum CARG1; bge ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2125 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2126 \| lfd FARG1, 0(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2127 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2128 \| lwz CARG2, 4(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2129 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2130 \| blex log
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2131 \| b ->fff_resn
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2132 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2133 \| math_extern log10
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2134 \| math_extern exp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2135 \| math_extern sin
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2136 \| math_extern cos
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2137 \| math_extern tan
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2138 \| math_extern asin
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2139 \| math_extern acos
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2140 \| math_extern atan
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2141 \| math_extern sinh
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2142 \| math_extern cosh
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2143 \| math_extern tanh
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2144 \| math_extern2 pow
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2145 \| math_extern2 atan2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2146 \| math_extern2 fmod
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2147 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2148 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2149 \|.ffunc math_ldexp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2150 \| cmplwi NARGS8:RC, 16
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2151 \| lwz TMP0, 0(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2152 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2153 \| lfd FARG1, 0(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2154 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2155 \| lwz CARG1, 0(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2156 \| lwz CARG2, 4(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2157 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2158 \| lwz TMP1, 8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2159 \|.if GPR64
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2160 \| lwz CARG2, 12(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2161 \|.elif FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2162 \| lwz CARG1, 12(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2163 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2164 \| lwz CARG3, 12(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2165 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2166 \| blt ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2167 \| checknum TMP0; bge ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2168 \| checknum TMP1; bne ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2169 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2170 \|.ffunc_nn math_ldexp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2171 \|.if GPR64
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2172 \| toint CARG2, FARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2173 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2174 \| toint CARG1, FARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2175 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2176 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2177 \| blex ldexp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2178 \| b ->fff_resn
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2179 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2180 \|.ffunc_n math_frexp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2181 \|.if GPR64
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2182 \| la CARG2, DISPATCH_GL(tmptv)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2183 \|.elif FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2184 \| la CARG1, DISPATCH_GL(tmptv)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2185 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2186 \| la CARG3, DISPATCH_GL(tmptv)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2187 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2188 \| lwz PC, FRAME_PC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2189 \| blex frexp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2190 \| lwz TMP1, DISPATCH_GL(tmptv)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2191 \| la RA, -8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2192 \|.if not DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2193 \| tonum_i FARG2, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2194 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2195 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2196 \| stfd FARG1, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2197 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2198 \| stw CRET1, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2199 \| stw CRET2, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2200 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2201 \| li RD, (2+1)*8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2202 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2203 \| stw TISNUM, 8(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2204 \| stw TMP1, 12(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2205 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2206 \| stfd FARG2, 8(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2207 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2208 \| b ->fff_res
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2209 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2210 \|.ffunc_n math_modf
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2211 \|.if GPR64
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2212 \| la CARG2, -8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2213 \|.elif FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2214 \| la CARG1, -8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2215 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2216 \| la CARG3, -8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2217 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2218 \| lwz PC, FRAME_PC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2219 \| blex modf
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2220 \| la RA, -8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2221 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2222 \| stfd FARG1, 0(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2223 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2224 \| stw CRET1, 0(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2225 \| stw CRET2, 4(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2226 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2227 \| li RD, (2+1)*8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2228 \| b ->fff_res
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2229 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2230 \|.macro math_minmax, name, ismax
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2231 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2232 \| .ffunc_1 name
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2233 \| checknum CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2234 \| addi SAVE0, BASE, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2235 \| add SAVE1, BASE, NARGS8:RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2236 \| bne >4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2237 \|1: // Handle integers.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2238 \| lwz CARG4, 0(SAVE0)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2239 \| cmplw cr1, SAVE0, SAVE1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2240 \| lwz CARG2, 4(SAVE0)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2241 \| bge cr1, ->fff_resi
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2242 \| checknum CARG4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2243 \| xoris TMP0, CARG1, 0x8000
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2244 \| xoris TMP3, CARG2, 0x8000
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2245 \| bne >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2246 \| subfc TMP3, TMP3, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2247 \| subfe TMP0, TMP0, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2248 \|.if ismax
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2249 \| andc TMP3, TMP3, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2250 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2251 \| and TMP3, TMP3, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2252 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2253 \| add CARG1, TMP3, CARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2254 \|.if GPR64
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2255 \| rldicl CARG1, CARG1, 0, 32
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2256 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2257 \| addi SAVE0, SAVE0, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2258 \| b <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2259 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2260 \| bge ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2261 \| // Convert intermediate result to number and continue below.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2262 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2263 \| tonum_i FARG1, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2264 \| lfd FARG2, 0(SAVE0)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2265 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2266 \| mr CARG2, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2267 \| bl ->vm_sfi2d_1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2268 \| lwz CARG3, 0(SAVE0)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2269 \| lwz CARG4, 4(SAVE0)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2270 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2271 \| b >6
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2272 \|4:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2273 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2274 \| lfd FARG1, 0(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2275 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2276 \| lwz CARG1, 0(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2277 \| lwz CARG2, 4(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2278 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2279 \| bge ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2280 \|5: // Handle numbers.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2281 \| lwz CARG3, 0(SAVE0)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2282 \| cmplw cr1, SAVE0, SAVE1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2283 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2284 \| lfd FARG2, 0(SAVE0)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2285 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2286 \| lwz CARG4, 4(SAVE0)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2287 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2288 \| bge cr1, ->fff_resn
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2289 \| checknum CARG3; bge >7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2290 \|6:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2291 \| addi SAVE0, SAVE0, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2292 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2293 \|.if ismax
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2294 \| fsub f0, FARG1, FARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2295 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2296 \| fsub f0, FARG2, FARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2297 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2298 \| fsel FARG1, f0, FARG1, FARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2299 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2300 \| stw CARG1, SFSAVE_1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2301 \| stw CARG2, SFSAVE_2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2302 \| stw CARG3, SFSAVE_3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2303 \| stw CARG4, SFSAVE_4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2304 \| blex __ledf2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2305 \| cmpwi CRET1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2306 \|.if ismax
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2307 \| blt >8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2308 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2309 \| bge >8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2310 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2311 \| lwz CARG1, SFSAVE_1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2312 \| lwz CARG2, SFSAVE_2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2313 \| b <5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2314 \|8:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2315 \| lwz CARG1, SFSAVE_3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2316 \| lwz CARG2, SFSAVE_4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2317 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2318 \| b <5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2319 \|7: // Convert integer to number and continue above.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2320 \| lwz CARG3, 4(SAVE0)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2321 \| bne ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2322 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2323 \| tonum_i FARG2, CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2324 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2325 \| bl ->vm_sfi2d_2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2326 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2327 \| b <6
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2328 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2329 \| .ffunc_n name
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2330 \| li TMP1, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2331 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2332 \| lwzx CARG2, BASE, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2333 \| lfdx FARG2, BASE, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2334 \| cmplw cr1, TMP1, NARGS8:RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2335 \| checknum CARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2336 \| bge cr1, ->fff_resn
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2337 \| bge ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2338 \|.if ismax
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2339 \| fsub f0, FARG1, FARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2340 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2341 \| fsub f0, FARG2, FARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2342 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2343 \| addi TMP1, TMP1, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2344 \| fsel FARG1, f0, FARG1, FARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2345 \| b <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2346 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2347 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2348 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2349 \| math_minmax math_min, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2350 \| math_minmax math_max, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2351 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2352 \|//-- String library -----------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2353 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2354 \|.ffunc string_byte // Only handle the 1-arg case here.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2355 \| cmplwi NARGS8:RC, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2356 \| lwz CARG3, 0(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2357 \| lwz STR:CARG1, 4(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2358 \| bne ->fff_fallback // Need exactly 1 argument.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2359 \| checkstr CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2360 \| bne ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2361 \| lwz TMP0, STR:CARG1->len
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2362 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2363 \| lbz CARG1, STR:CARG1[1] // Access is always ok (NUL at end).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2364 \| li RD, (0+1)*8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2365 \| lwz PC, FRAME_PC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2366 \| cmplwi TMP0, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2367 \| la RA, -8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2368 \| beqy ->fff_res
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2369 \| b ->fff_resi
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2370 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2371 \| lbz TMP1, STR:CARG1[1] // Access is always ok (NUL at end).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2372 \| addic TMP3, TMP0, -1 // RD = ((str->len != 0)+1)*8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2373 \| subfe RD, TMP3, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2374 \| stw TMP1, TONUM_LO // Inlined tonum_u f0, TMP1.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2375 \| addi RD, RD, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2376 \| lfd f0, TONUM_D
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2377 \| la RA, -8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2378 \| lwz PC, FRAME_PC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2379 \| fsub f0, f0, TOBIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2380 \| slwi RD, RD, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2381 \| stfd f0, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2382 \| b ->fff_res
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2383 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2384 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2385 \|.ffunc string_char // Only handle the 1-arg case here.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2386 \| ffgccheck
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2387 \| cmplwi NARGS8:RC, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2388 \| lwz CARG3, 0(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2389 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2390 \| lwz TMP0, 4(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2391 \| bne ->fff_fallback // Exactly 1 argument.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2392 \| checknum CARG3; bne ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2393 \| la CARG2, 7(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2394 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2395 \| lfd FARG1, 0(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2396 \| bne ->fff_fallback // Exactly 1 argument.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2397 \| checknum CARG3; bge ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2398 \| toint TMP0, FARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2399 \| la CARG2, TMPD_BLO
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2400 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2401 \| li CARG3, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2402 \| cmplwi TMP0, 255; bgt ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2403 \|->fff_newstr:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2404 \| mr CARG1, L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2405 \| stp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2406 \| stw PC, SAVE_PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2407 \| bl extern lj_str_new // (lua_State L, char str, size_t l)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2408 \|->fff_resstr:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2409 \| // Returns GCstr *.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2410 \| lp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2411 \| li CARG3, LJ_TSTR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2412 \| b ->fff_restv
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2413 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2414 \|.ffunc string_sub
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2415 \| ffgccheck
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2416 \| cmplwi NARGS8:RC, 16
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2417 \| lwz CARG3, 16(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2418 \|.if not DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2419 \| lfd f0, 16(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2420 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2421 \| lwz TMP0, 0(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2422 \| lwz STR:CARG1, 4(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2423 \| blt ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2424 \| lwz CARG2, 8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2425 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2426 \| lwz TMP1, 12(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2427 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2428 \| lfd f1, 8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2429 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2430 \| li TMP2, -1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2431 \| beq >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2432 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2433 \| checknum CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2434 \| lwz TMP2, 20(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2435 \| bne ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2436 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2437 \| checknum CARG2; bne ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2438 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2439 \| checknum CARG3; bge ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2440 \| toint TMP2, f0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2441 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2442 \| checknum CARG2; bge ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2443 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2444 \| checkstr TMP0; bne ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2445 \|.if not DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2446 \| toint TMP1, f1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2447 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2448 \| lwz TMP0, STR:CARG1->len
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2449 \| cmplw TMP0, TMP2 // len < end? (unsigned compare)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2450 \| addi TMP3, TMP2, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2451 \| blt >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2452 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2453 \| cmpwi TMP1, 0 // start <= 0?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2454 \| add TMP3, TMP1, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2455 \| ble >7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2456 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2457 \| sub CARG3, TMP2, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2458 \| addi CARG2, STR:CARG1, #STR-1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2459 \| srawi TMP0, CARG3, 31
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2460 \| addi CARG3, CARG3, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2461 \| add CARG2, CARG2, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2462 \| andc CARG3, CARG3, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2463 \|.if GPR64
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2464 \| rldicl CARG2, CARG2, 0, 32
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2465 \| rldicl CARG3, CARG3, 0, 32
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2466 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2467 \| b ->fff_newstr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2468 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2469 \|5: // Negative end or overflow.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2470 \| cmpw TMP0, TMP2 // len >= end? (signed compare)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2471 \| add TMP2, TMP0, TMP3 // Negative end: end = end+len+1.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2472 \| bge <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2473 \| mr TMP2, TMP0 // Overflow: end = len.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2474 \| b <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2475 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2476 \|7: // Negative start or underflow.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2477 \| .gpr64 extsw TMP1, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2478 \| addic CARG3, TMP1, -1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2479 \| subfe CARG3, CARG3, CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2480 \| srawi CARG2, TMP3, 31 // Note: modifies carry.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2481 \| andc TMP3, TMP3, CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2482 \| andc TMP1, TMP3, CARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2483 \| addi TMP1, TMP1, 1 // start = 1 + (start ? start+len : 0)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2484 \| b <3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2485 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2486 \|.macro ffstring_op, name
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2487 \| .ffunc string_ .. name
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2488 \| ffgccheck
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2489 \| cmplwi NARGS8:RC, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2490 \| lwz CARG3, 0(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2491 \| lwz STR:CARG2, 4(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2492 \| blt ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2493 \| checkstr CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2494 \| la SBUF:CARG1, DISPATCH_GL(tmpbuf)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2495 \| bne ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2496 \| lwz TMP0, SBUF:CARG1->b
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2497 \| stw L, SBUF:CARG1->L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2498 \| stp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2499 \| stw PC, SAVE_PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2500 \| stw TMP0, SBUF:CARG1->w
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2501 \| bl extern lj_buf_putstr_ .. name
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2502 \| bl extern lj_buf_tostr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2503 \| b ->fff_resstr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2504 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2505 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2506 \|ffstring_op reverse
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2507 \|ffstring_op lower
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2508 \|ffstring_op upper
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2509 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2510 \|//-- Bit library --------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2511 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2512 \|.macro .ffunc_bit, name
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2513 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2514 \| .ffunc_1 bit_..name
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2515 \| checknum CARG3; bnel ->fff_tobit_fb
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2516 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2517 \| .ffunc_n bit_..name
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2518 \| fadd FARG1, FARG1, TOBIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2519 \| stfd FARG1, TMPD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2520 \| lwz CARG1, TMPD_LO
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2521 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2522 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2523 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2524 \|.macro .ffunc_bit_op, name, ins
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2525 \| .ffunc_bit name
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2526 \| addi SAVE0, BASE, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2527 \| add SAVE1, BASE, NARGS8:RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2528 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2529 \| lwz CARG4, 0(SAVE0)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2530 \| cmplw cr1, SAVE0, SAVE1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2531 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2532 \| lwz CARG2, 4(SAVE0)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2533 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2534 \| lfd FARG1, 0(SAVE0)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2535 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2536 \| bgey cr1, ->fff_resi
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2537 \| checknum CARG4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2538 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2539 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2540 \| bnel ->fff_bitop_fb
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2541 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2542 \| beq >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2543 \| stw CARG1, SFSAVE_1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2544 \| bl ->fff_bitop_fb
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2545 \| mr CARG2, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2546 \| lwz CARG1, SFSAVE_1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2547 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2548 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2549 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2550 \| fadd FARG1, FARG1, TOBIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2551 \| bge ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2552 \| stfd FARG1, TMPD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2553 \| lwz CARG2, TMPD_LO
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2554 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2555 \| ins CARG1, CARG1, CARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2556 \| addi SAVE0, SAVE0, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2557 \| b <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2558 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2559 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2560 \|.ffunc_bit_op band, and
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2561 \|.ffunc_bit_op bor, or
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2562 \|.ffunc_bit_op bxor, xor
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2563 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2564 \|.ffunc_bit bswap
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2565 \| rotlwi TMP0, CARG1, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2566 \| rlwimi TMP0, CARG1, 24, 0, 7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2567 \| rlwimi TMP0, CARG1, 24, 16, 23
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2568 \| mr CRET1, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2569 \| b ->fff_resi
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2570 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2571 \|.ffunc_bit bnot
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2572 \| not CRET1, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2573 \| b ->fff_resi
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2574 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2575 \|.macro .ffunc_bit_sh, name, ins, shmod
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2576 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2577 \| .ffunc_2 bit_..name
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2578 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2579 \| checknum CARG3; bnel ->fff_tobit_fb
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2580 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2581 \| checknum CARG3; beq >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2582 \| bl ->fff_tobit_fb
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2583 \| lwz CARG2, 12(BASE) // Conversion polluted CARG2.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2584 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2585 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2586 \| // Note: no inline conversion from number for 2nd argument!
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2587 \| checknum CARG4; bne ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2588 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2589 \| .ffunc_nn bit_..name
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2590 \| fadd FARG1, FARG1, TOBIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2591 \| fadd FARG2, FARG2, TOBIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2592 \| stfd FARG1, TMPD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2593 \| lwz CARG1, TMPD_LO
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2594 \| stfd FARG2, TMPD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2595 \| lwz CARG2, TMPD_LO
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2596 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2597 \|.if shmod == 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2598 \| rlwinm CARG2, CARG2, 0, 27, 31
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2599 \|.elif shmod == 2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2600 \| neg CARG2, CARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2601 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2602 \| ins CRET1, CARG1, CARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2603 \| b ->fff_resi
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2604 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2605 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2606 \|.ffunc_bit_sh lshift, slw, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2607 \|.ffunc_bit_sh rshift, srw, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2608 \|.ffunc_bit_sh arshift, sraw, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2609 \|.ffunc_bit_sh rol, rotlw, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2610 \|.ffunc_bit_sh ror, rotlw, 2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2611 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2612 \|.ffunc_bit tobit
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2613 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2614 \| b ->fff_resi
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2615 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2616 \|->fff_resi:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2617 \| tonum_i FARG1, CRET1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2618 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2619 \|->fff_resn:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2620 \| lwz PC, FRAME_PC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2621 \| la RA, -8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2622 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2623 \| stfd FARG1, -8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2624 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2625 \| stw CARG1, -8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2626 \| stw CARG2, -4(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2627 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2628 \| b ->fff_res1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2629 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2630 \|// Fallback FP number to bit conversion.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2631 \|->fff_tobit_fb:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2632 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2633 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2634 \| lfd FARG1, 0(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2635 \| bgt ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2636 \| fadd FARG1, FARG1, TOBIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2637 \| stfd FARG1, TMPD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2638 \| lwz CARG1, TMPD_LO
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2639 \| blr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2640 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2641 \| bgt ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2642 \| mr CARG2, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2643 \| mr CARG1, CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2644 \|// Modifies: CARG1, CARG2, TMP0, TMP1, TMP2.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2645 \|->vm_tobit:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2646 \| slwi TMP2, CARG1, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2647 \| addis TMP2, TMP2, 0x0020
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2648 \| cmpwi TMP2, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2649 \| bge >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2650 \| li TMP1, 0x3e0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2651 \| srawi TMP2, TMP2, 21
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2652 \| not TMP1, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2653 \| sub. TMP2, TMP1, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2654 \| cmpwi cr7, CARG1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2655 \| blt >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2656 \| slwi TMP1, CARG1, 11
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2657 \| srwi TMP0, CARG2, 21
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2658 \| oris TMP1, TMP1, 0x8000
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2659 \| or TMP1, TMP1, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2660 \| srw CARG1, TMP1, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2661 \| bclr 4, 28 // Return if cr7[lt] == 0, no hint.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2662 \| neg CARG1, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2663 \| blr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2664 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2665 \| addi TMP2, TMP2, 21
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2666 \| srw TMP1, CARG2, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2667 \| slwi CARG2, CARG1, 12
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2668 \| subfic TMP2, TMP2, 20
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2669 \| slw TMP0, CARG2, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2670 \| or CARG1, TMP1, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2671 \| bclr 4, 28 // Return if cr7[lt] == 0, no hint.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2672 \| neg CARG1, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2673 \| blr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2674 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2675 \| li CARG1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2676 \| blr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2677 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2678 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2679 \|->fff_bitop_fb:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2680 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2681 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2682 \| lfd FARG1, 0(SAVE0)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2683 \| bgt ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2684 \| fadd FARG1, FARG1, TOBIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2685 \| stfd FARG1, TMPD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2686 \| lwz CARG2, TMPD_LO
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2687 \| blr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2688 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2689 \| bgt ->fff_fallback
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2690 \| mr CARG1, CARG4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2691 \| b ->vm_tobit
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2692 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2693 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2694 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2695 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2696 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2697 \|->fff_fallback: // Call fast function fallback handler.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2698 \| // BASE = new base, RB = CFUNC, RC = nargs*8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2699 \| lp TMP3, CFUNC:RB->f
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2700 \| add TMP1, BASE, NARGS8:RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2701 \| lwz PC, FRAME_PC(BASE) // Fallback may overwrite PC.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2702 \| addi TMP0, TMP1, 8*LUA_MINSTACK
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2703 \| lwz TMP2, L->maxstack
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2704 \| stw PC, SAVE_PC // Redundant (but a defined value).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2705 \| .toc lp TMP3, 0(TMP3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2706 \| cmplw TMP0, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2707 \| stp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2708 \| stp TMP1, L->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2709 \| mr CARG1, L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2710 \| bgt >5 // Need to grow stack.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2711 \| mtctr TMP3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2712 \| bctrl // (lua_State *L)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2713 \| // Either throws an error, or recovers and returns -1, 0 or nresults+1.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2714 \| lp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2715 \| cmpwi CRET1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2716 \| slwi RD, CRET1, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2717 \| la RA, -8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2718 \| bgt ->fff_res // Returned nresults+1?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2719 \|1: // Returned 0 or -1: retry fast path.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2720 \| lp TMP0, L->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2721 \| lwz LFUNC:RB, FRAME_FUNC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2722 \| sub NARGS8:RC, TMP0, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2723 \| bne ->vm_call_tail // Returned -1?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2724 \| ins_callt // Returned 0: retry fast path.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2725 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2726 \|// Reconstruct previous base for vmeta_call during tailcall.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2727 \|->vm_call_tail:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2728 \| andix. TMP0, PC, FRAME_TYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2729 \| rlwinm TMP1, PC, 0, 0, 28
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2730 \| bne >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2731 \| lwz INS, -4(PC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2732 \| decode_RA8 TMP1, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2733 \| addi TMP1, TMP1, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2734 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2735 \| sub TMP2, BASE, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2736 \| b ->vm_call_dispatch // Resolve again for tailcall.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2737 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2738 \|5: // Grow stack for fallback handler.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2739 \| li CARG2, LUA_MINSTACK
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2740 \| bl extern lj_state_growstack // (lua_State *L, int n)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2741 \| lp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2742 \| cmpw TMP0, TMP0 // Set 4*cr0+eq to force retry.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2743 \| b <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2744 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2745 \|->fff_gcstep: // Call GC step function.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2746 \| // BASE = new base, RC = nargs*8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2747 \| mflr SAVE0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2748 \| stp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2749 \| add TMP0, BASE, NARGS8:RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2750 \| stw PC, SAVE_PC // Redundant (but a defined value).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2751 \| stp TMP0, L->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2752 \| mr CARG1, L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2753 \| bl extern lj_gc_step // (lua_State *L)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2754 \| lp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2755 \| mtlr SAVE0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2756 \| lp TMP0, L->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2757 \| sub NARGS8:RC, TMP0, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2758 \| lwz CFUNC:RB, FRAME_FUNC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2759 \| blr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2760 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2761 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2762 \|//-- Special dispatch targets -------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2763 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2764 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2765 \|->vm_record: // Dispatch target for recording phase.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2766 \|.if JIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2767 \| lbz TMP3, DISPATCH_GL(hookmask)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2768 \| andix. TMP0, TMP3, HOOK_VMEVENT // No recording while in vmevent.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2769 \| bne >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2770 \| // Decrement the hookcount for consistency, but always do the call.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2771 \| lwz TMP2, DISPATCH_GL(hookcount)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2772 \| andix. TMP0, TMP3, HOOK_ACTIVE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2773 \| bne >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2774 \| subi TMP2, TMP2, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2775 \| andi. TMP0, TMP3, LUA_MASKLINE\|LUA_MASKCOUNT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2776 \| beqy >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2777 \| stw TMP2, DISPATCH_GL(hookcount)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2778 \| b >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2779 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2780 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2781 \|->vm_rethook: // Dispatch target for return hooks.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2782 \| lbz TMP3, DISPATCH_GL(hookmask)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2783 \| andix. TMP0, TMP3, HOOK_ACTIVE // Hook already active?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2784 \| beq >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2785 \|5: // Re-dispatch to static ins.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2786 \| addi TMP1, TMP1, GG_DISP2STATIC // Assumes decode_OPP TMP1, INS.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2787 \| lpx TMP0, DISPATCH, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2788 \| mtctr TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2789 \| bctr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2790 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2791 \|->vm_inshook: // Dispatch target for instr/line hooks.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2792 \| lbz TMP3, DISPATCH_GL(hookmask)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2793 \| lwz TMP2, DISPATCH_GL(hookcount)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2794 \| andix. TMP0, TMP3, HOOK_ACTIVE // Hook already active?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2795 \| rlwinm TMP0, TMP3, 31-LUA_HOOKLINE, 31, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2796 \| bne <5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2797 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2798 \| cmpwi cr1, TMP0, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2799 \| addic. TMP2, TMP2, -1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2800 \| beq cr1, <5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2801 \| stw TMP2, DISPATCH_GL(hookcount)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2802 \| beq >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2803 \| bge cr1, <5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2804 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2805 \| mr CARG1, L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2806 \| stw MULTRES, SAVE_MULTRES
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2807 \| mr CARG2, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2808 \| stp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2809 \| // SAVE_PC must hold the _previous_ PC. The callee updates it with PC.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2810 \| bl extern lj_dispatch_ins // (lua_State L, const BCIns pc)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2811 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2812 \| lp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2813 \|4: // Re-dispatch to static ins.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2814 \| lwz INS, -4(PC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2815 \| decode_OPP TMP1, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2816 \| decode_RB8 RB, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2817 \| addi TMP1, TMP1, GG_DISP2STATIC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2818 \| decode_RD8 RD, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2819 \| lpx TMP0, DISPATCH, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2820 \| decode_RA8 RA, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2821 \| decode_RC8 RC, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2822 \| mtctr TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2823 \| bctr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2824 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2825 \|->cont_hook: // Continue from hook yield.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2826 \| addi PC, PC, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2827 \| lwz MULTRES, -20(RB) // Restore MULTRES for *M ins.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2828 \| b <4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2829 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2830 \|->vm_hotloop: // Hot loop counter underflow.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2831 \|.if JIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2832 \| lwz LFUNC:TMP1, FRAME_FUNC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2833 \| addi CARG1, DISPATCH, GG_DISP2J
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2834 \| stw PC, SAVE_PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2835 \| lwz TMP1, LFUNC:TMP1->pc
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2836 \| mr CARG2, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2837 \| stw L, DISPATCH_J(L)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2838 \| lbz TMP1, PC2PROTO(framesize)(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2839 \| stp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2840 \| slwi TMP1, TMP1, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2841 \| add TMP1, BASE, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2842 \| stp TMP1, L->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2843 \| bl extern lj_trace_hot // (jit_State J, const BCIns pc)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2844 \| b <3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2845 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2846 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2847 \|->vm_callhook: // Dispatch target for call hooks.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2848 \| mr CARG2, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2849 \|.if JIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2850 \| b >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2851 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2852 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2853 \|->vm_hotcall: // Hot call counter underflow.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2854 \|.if JIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2855 \| ori CARG2, PC, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2856 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2857 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2858 \| add TMP0, BASE, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2859 \| stw PC, SAVE_PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2860 \| mr CARG1, L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2861 \| stp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2862 \| sub RA, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2863 \| stp TMP0, L->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2864 \| bl extern lj_dispatch_call // (lua_State L, const BCIns pc)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2865 \| // Returns ASMFunction.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2866 \| lp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2867 \| lp TMP0, L->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2868 \| stw ZERO, SAVE_PC // Invalidate for subsequent line hook.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2869 \| sub NARGS8:RC, TMP0, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2870 \| add RA, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2871 \| lwz LFUNC:RB, FRAME_FUNC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2872 \| lwz INS, -4(PC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2873 \| mtctr CRET1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2874 \| bctr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2875 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2876 \|->cont_stitch: // Trace stitching.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2877 \|.if JIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2878 \| // RA = resultptr, RB = meta base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2879 \| lwz INS, -4(PC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2880 \| lwz TRACE:TMP2, -20(RB) // Save previous trace.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2881 \| addic. TMP1, MULTRES, -8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2882 \| decode_RA8 RC, INS // Call base.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2883 \| beq >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2884 \|1: // Move results down.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2885 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2886 \| lfd f0, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2887 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2888 \| lwz CARG1, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2889 \| lwz CARG2, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2890 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2891 \| addic. TMP1, TMP1, -8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2892 \| addi RA, RA, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2893 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2894 \| stfdx f0, BASE, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2895 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2896 \| add CARG3, BASE, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2897 \| stw CARG1, 0(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2898 \| stw CARG2, 4(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2899 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2900 \| addi RC, RC, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2901 \| bne <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2902 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2903 \| decode_RA8 RA, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2904 \| decode_RB8 RB, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2905 \| add RA, RA, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2906 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2907 \| cmplw RA, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2908 \| bgt >9 // More results wanted?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2909 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2910 \| lhz TMP3, TRACE:TMP2->traceno
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2911 \| lhz RD, TRACE:TMP2->link
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2912 \| cmpw RD, TMP3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2913 \| cmpwi cr1, RD, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2914 \| beq ->cont_nop // Blacklisted.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2915 \| slwi RD, RD, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2916 \| bne cr1, =>BC_JLOOP // Jump to stitched trace.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2917 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2918 \| // Stitch a new trace to the previous trace.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2919 \| stw TMP3, DISPATCH_J(exitno)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2920 \| stp L, DISPATCH_J(L)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2921 \| stp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2922 \| addi CARG1, DISPATCH, GG_DISP2J
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2923 \| mr CARG2, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2924 \| bl extern lj_dispatch_stitch // (jit_State J, const BCIns pc)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2925 \| lp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2926 \| b ->cont_nop
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2927 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2928 \|9:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2929 \| stwx TISNIL, BASE, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2930 \| addi RC, RC, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2931 \| b <3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2932 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2933 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2934 \|->vm_profhook: // Dispatch target for profiler hook.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2935 #if LJ_HASPROFILE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2936 \| mr CARG1, L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2937 \| stw MULTRES, SAVE_MULTRES
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2938 \| mr CARG2, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2939 \| stp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2940 \| bl extern lj_dispatch_profile // (lua_State L, const BCIns pc)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2941 \| // HOOK_PROFILE is off again, so re-dispatch to dynamic instruction.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2942 \| lp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2943 \| subi PC, PC, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2944 \| b ->cont_nop
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2945 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2946 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2947 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2948 \|//-- Trace exit handler -------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2949 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2950 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2951 \|.macro savex_, a, b, c, d
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2952 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2953 \| stfd f..a, 16+a*8(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2954 \| stfd f..b, 16+b*8(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2955 \| stfd f..c, 16+c*8(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2956 \| stfd f..d, 16+d*8(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2957 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2958 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2959 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2960 \|->vm_exit_handler:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2961 \|.if JIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2962 \| addi sp, sp, -(16+328+324)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2963 \| stmw r2, 16+328+24(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2964 \| addi DISPATCH, JGL, -GG_DISP2G-32768
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2965 \| li CARG2, ~LJ_VMST_EXIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2966 \| lwz CARG1, 16+328+324(sp) // Get stack chain.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2967 \| stw CARG2, DISPATCH_GL(vmstate)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2968 \| savex_ 0,1,2,3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2969 \| stw CARG1, 0(sp) // Store extended stack chain.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2970 \| clrso TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2971 \| savex_ 4,5,6,7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2972 \| addi CARG2, sp, 16+328+324 // Recompute original value of sp.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2973 \| savex_ 8,9,10,11
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2974 \| stw CARG2, 16+328+14(sp) // Store sp in RID_SP.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2975 \| savex_ 12,13,14,15
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2976 \| mflr CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2977 \| li TMP1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2978 \| savex_ 16,17,18,19
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2979 \| stw TMP1, 16+328+04(sp) // Clear RID_TMP.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2980 \| savex_ 20,21,22,23
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2981 \| lhz CARG4, 2(CARG3) // Load trace number.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2982 \| savex_ 24,25,26,27
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2983 \| lwz L, DISPATCH_GL(cur_L)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2984 \| savex_ 28,29,30,31
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2985 \| sub CARG3, TMP0, CARG3 // Compute exit number.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2986 \| lp BASE, DISPATCH_GL(jit_base)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2987 \| srwi CARG3, CARG3, 2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2988 \| stp L, DISPATCH_J(L)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2989 \| subi CARG3, CARG3, 2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2990 \| stp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2991 \| stw CARG4, DISPATCH_J(parent)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2992 \| stw TMP1, DISPATCH_GL(jit_base)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2993 \| addi CARG1, DISPATCH, GG_DISP2J
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2994 \| stw CARG3, DISPATCH_J(exitno)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2995 \| addi CARG2, sp, 16
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2996 \| bl extern lj_trace_exit // (jit_State J, ExitState ex)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2997 \| // Returns MULTRES (unscaled) or negated error code.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2998 \| lp TMP1, L->cframe
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2999 \| lwz TMP2, 0(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3000 \| lp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3001 \|.if GPR64
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3002 \| rldicr sp, TMP1, 0, 61
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3003 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3004 \| rlwinm sp, TMP1, 0, 0, 29
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3005 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3006 \| lwz PC, SAVE_PC // Get SAVE_PC.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3007 \| stw TMP2, 0(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3008 \| stw L, SAVE_L // Set SAVE_L (on-trace resume/yield).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3009 \| b >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3010 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3011 \|->vm_exit_interp:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3012 \|.if JIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3013 \| // CARG1 = MULTRES or negated error code, BASE, PC and JGL set.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3014 \| lwz L, SAVE_L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3015 \| addi DISPATCH, JGL, -GG_DISP2G-32768
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3016 \| stp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3017 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3018 \| li TMP2, -LUA_ERRERR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3019 \| cmplw CARG1, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3020 \| bge >9 // Check for error from exit.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3021 \| lwz LFUNC:RB, FRAME_FUNC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3022 \| slwi MULTRES, CARG1, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3023 \| li TMP2, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3024 \| stw MULTRES, SAVE_MULTRES
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3025 \| lwz TMP1, LFUNC:RB->pc
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3026 \| stw TMP2, DISPATCH_GL(jit_base)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3027 \| lwz KBASE, PC2PROTO(k)(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3028 \| // Setup type comparison constants.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3029 \| li TISNUM, LJ_TISNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3030 \| .FPU lus TMP3, 0x59c0 // TOBIT = 2^52 + 2^51 (float).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3031 \| .FPU stw TMP3, TMPD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3032 \| li ZERO, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3033 \| .FPU ori TMP3, TMP3, 0x0004 // TONUM = 2^52 + 2^51 + 2^31 (float).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3034 \| .FPU lfs TOBIT, TMPD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3035 \| .FPU stw TMP3, TMPD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3036 \| .FPU lus TMP0, 0x4338 // Hiword of 2^52 + 2^51 (double)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3037 \| li TISNIL, LJ_TNIL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3038 \| .FPU stw TMP0, TONUM_HI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3039 \| .FPU lfs TONUM, TMPD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3040 \| // Modified copy of ins_next which handles function header dispatch, too.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3041 \| lwz INS, 0(PC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3042 \| addi PC, PC, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3043 \| // Assumes TISNIL == ~LJ_VMST_INTERP == -1.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3044 \| stw TISNIL, DISPATCH_GL(vmstate)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3045 \| cmpwi CARG1, -17 // Static dispatch?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3046 \| beq >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3047 \| decode_OPP TMP1, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3048 \| decode_RA8 RA, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3049 \| lpx TMP0, DISPATCH, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3050 \| mtctr TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3051 \| cmplwi TMP1, BC_FUNCF*4 // Function header?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3052 \| bge >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3053 \| decode_RB8 RB, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3054 \| decode_RD8 RD, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3055 \| decode_RC8 RC, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3056 \| bctr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3057 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3058 \| cmplwi TMP1, (BC_FUNCC+2)*4 // Fast function?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3059 \| blt >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3060 \| // Check frame below fast function.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3061 \| lwz TMP1, FRAME_PC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3062 \| andix. TMP0, TMP1, FRAME_TYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3063 \| bney >3 // Trace stitching continuation?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3064 \| // Otherwise set KBASE for Lua function below fast function.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3065 \| lwz TMP2, -4(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3066 \| decode_RA8 TMP0, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3067 \| sub TMP1, BASE, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3068 \| lwz LFUNC:TMP2, -12(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3069 \| lwz TMP1, LFUNC:TMP2->pc
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3070 \| lwz KBASE, PC2PROTO(k)(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3071 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3072 \| subi RC, MULTRES, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3073 \| add RA, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3074 \| bctr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3075 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3076 \|5: // Dispatch to static entry of original ins replaced by BC_JLOOP.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3077 \| lwz TMP1, DISPATCH_J(trace)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3078 \| decode_RD4 RD, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3079 \| lwzx TRACE:TMP1, TMP1, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3080 \| lwz INS, TRACE:TMP1->startins
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3081 \| decode_OPP TMP1, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3082 \| addi TMP1, TMP1, GG_DISP2STATIC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3083 \| lpx TMP0, DISPATCH, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3084 \| mtctr TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3085 \| decode_RB8 RB, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3086 \| decode_RD8 RD, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3087 \| decode_RA8 RA, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3088 \| decode_RC8 RC, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3089 \| bctr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3090 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3091 \|9: // Rethrow error from the right C frame.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3092 \| neg CARG2, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3093 \| mr CARG1, L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3094 \| bl extern lj_err_trace // (lua_State *L, int errcode)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3095 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3096 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3097 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3098 \|//-- Math helper functions ----------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3099 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3100 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3101 \|// NYI: Use internal implementations of floor, ceil, trunc, sfcmp.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3102 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3103 \|.macro sfi2d, AHI, ALO
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3104 \|.if not FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3105 \| mr. AHI, ALO
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3106 \| bclr 12, 2 // Handle zero first.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3107 \| srawi TMP0, ALO, 31
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3108 \| xor TMP1, ALO, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3109 \| sub TMP1, TMP1, TMP0 // Absolute value in TMP1.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3110 \| cntlzw AHI, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3111 \| andix. TMP0, TMP0, 0x800 // Mask sign bit.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3112 \| slw TMP1, TMP1, AHI // Align mantissa left with leading 1.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3113 \| subfic AHI, AHI, 0x3ff+31-1 // Exponent -1 in AHI.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3114 \| slwi ALO, TMP1, 21
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3115 \| or AHI, AHI, TMP0 // Sign \| Exponent.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3116 \| srwi TMP1, TMP1, 11
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3117 \| slwi AHI, AHI, 20 // Align left.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3118 \| add AHI, AHI, TMP1 // Add mantissa, increment exponent.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3119 \| blr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3120 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3121 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3122 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3123 \|// Input: CARG2. Output: CARG1, CARG2. Temporaries: TMP0, TMP1.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3124 \|->vm_sfi2d_1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3125 \| sfi2d CARG1, CARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3126 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3127 \|// Input: CARG4. Output: CARG3, CARG4. Temporaries: TMP0, TMP1.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3128 \|->vm_sfi2d_2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3129 \| sfi2d CARG3, CARG4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3130 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3131 \|->vm_modi:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3132 \| divwo. TMP0, CARG1, CARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3133 \| bso >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3134 \|.if GPR64
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3135 \| xor CARG3, CARG1, CARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3136 \| cmpwi CARG3, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3137 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3138 \| xor. CARG3, CARG1, CARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3139 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3140 \| mullw TMP0, TMP0, CARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3141 \| sub CARG1, CARG1, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3142 \| bgelr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3143 \| cmpwi CARG1, 0; beqlr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3144 \| add CARG1, CARG1, CARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3145 \| blr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3146 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3147 \| cmpwi CARG2, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3148 \| li CARG1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3149 \| beqlr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3150 \| clrso TMP0 // Clear SO for -2147483648 % -1 and return 0.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3151 \| blr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3152 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3153 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3154 \|//-- Miscellaneous functions --------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3155 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3156 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3157 \|// void lj_vm_cachesync(void start, void end)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3158 \|// Flush D-Cache and invalidate I-Cache. Assumes 32 byte cache line size.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3159 \|// This is a good lower bound, except for very ancient PPC models.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3160 \|->vm_cachesync:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3161 \|.if JIT or FFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3162 \| // Compute start of first cache line and number of cache lines.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3163 \| rlwinm CARG1, CARG1, 0, 0, 26
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3164 \| sub CARG2, CARG2, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3165 \| addi CARG2, CARG2, 31
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3166 \| rlwinm. CARG2, CARG2, 27, 5, 31
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3167 \| beqlr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3168 \| mtctr CARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3169 \| mr CARG3, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3170 \|1: // Flush D-Cache.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3171 \| dcbst r0, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3172 \| addi CARG1, CARG1, 32
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3173 \| bdnz <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3174 \| sync
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3175 \| mtctr CARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3176 \|1: // Invalidate I-Cache.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3177 \| icbi r0, CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3178 \| addi CARG3, CARG3, 32
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3179 \| bdnz <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3180 \| isync
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3181 \| blr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3182 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3183 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3184 \|->vm_next:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3185 \|.if JIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3186 \| NYI // On big-endian.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3187 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3188 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3189 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3190 \|//-- FFI helper functions -----------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3191 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3192 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3193 \|// Handler for callback functions. Callback slot number in r11, g in r12.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3194 \|->vm_ffi_callback:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3195 \|.if FFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3196 \|.type CTSTATE, CTState, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3197 \| saveregs
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3198 \| lwz CTSTATE, GL:r12->ctype_state
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3199 \| addi DISPATCH, r12, GG_G2DISP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3200 \| stw r11, CTSTATE->cb.slot
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3201 \| stw r3, CTSTATE->cb.gpr[0]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3202 \| .FPU stfd f1, CTSTATE->cb.fpr[0]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3203 \| stw r4, CTSTATE->cb.gpr[1]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3204 \| .FPU stfd f2, CTSTATE->cb.fpr[1]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3205 \| stw r5, CTSTATE->cb.gpr[2]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3206 \| .FPU stfd f3, CTSTATE->cb.fpr[2]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3207 \| stw r6, CTSTATE->cb.gpr[3]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3208 \| .FPU stfd f4, CTSTATE->cb.fpr[3]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3209 \| stw r7, CTSTATE->cb.gpr[4]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3210 \| .FPU stfd f5, CTSTATE->cb.fpr[4]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3211 \| stw r8, CTSTATE->cb.gpr[5]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3212 \| .FPU stfd f6, CTSTATE->cb.fpr[5]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3213 \| stw r9, CTSTATE->cb.gpr[6]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3214 \| .FPU stfd f7, CTSTATE->cb.fpr[6]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3215 \| stw r10, CTSTATE->cb.gpr[7]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3216 \| .FPU stfd f8, CTSTATE->cb.fpr[7]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3217 \| addi TMP0, sp, CFRAME_SPACE+8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3218 \| stw TMP0, CTSTATE->cb.stack
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3219 \| mr CARG1, CTSTATE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3220 \| stw CTSTATE, SAVE_PC // Any value outside of bytecode is ok.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3221 \| mr CARG2, sp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3222 \| bl extern lj_ccallback_enter // (CTState cts, void cf)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3223 \| // Returns lua_State *.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3224 \| lp BASE, L:CRET1->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3225 \| li TISNUM, LJ_TISNUM // Setup type comparison constants.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3226 \| lp RC, L:CRET1->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3227 \| .FPU lus TMP3, 0x59c0 // TOBIT = 2^52 + 2^51 (float).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3228 \| li ZERO, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3229 \| mr L, CRET1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3230 \| .FPU stw TMP3, TMPD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3231 \| .FPU lus TMP0, 0x4338 // Hiword of 2^52 + 2^51 (double)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3232 \| lwz LFUNC:RB, FRAME_FUNC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3233 \| .FPU ori TMP3, TMP3, 0x0004 // TONUM = 2^52 + 2^51 + 2^31 (float).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3234 \| .FPU stw TMP0, TONUM_HI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3235 \| li TISNIL, LJ_TNIL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3236 \| li_vmstate INTERP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3237 \| .FPU lfs TOBIT, TMPD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3238 \| .FPU stw TMP3, TMPD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3239 \| sub RC, RC, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3240 \| st_vmstate
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3241 \| .FPU lfs TONUM, TMPD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3242 \| ins_callt
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3243 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3244 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3245 \|->cont_ffi_callback: // Return from FFI callback.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3246 \|.if FFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3247 \| lwz CTSTATE, DISPATCH_GL(ctype_state)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3248 \| stp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3249 \| stp RB, L->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3250 \| stp L, CTSTATE->L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3251 \| mr CARG1, CTSTATE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3252 \| mr CARG2, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3253 \| bl extern lj_ccallback_leave // (CTState cts, TValue o)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3254 \| lwz CRET1, CTSTATE->cb.gpr[0]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3255 \| .FPU lfd FARG1, CTSTATE->cb.fpr[0]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3256 \| lwz CRET2, CTSTATE->cb.gpr[1]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3257 \| b ->vm_leave_unw
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3258 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3259 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3260 \|->vm_ffi_call: // Call C function via FFI.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3261 \| // Caveat: needs special frame unwinding, see below.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3262 \|.if FFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3263 \| .type CCSTATE, CCallState, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3264 \| lwz TMP1, CCSTATE->spadj
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3265 \| mflr TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3266 \| lbz CARG2, CCSTATE->nsp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3267 \| lbz CARG3, CCSTATE->nfpr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3268 \| neg TMP1, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3269 \| stw TMP0, 4(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3270 \| cmpwi cr1, CARG3, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3271 \| mr TMP2, sp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3272 \| addic. CARG2, CARG2, -1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3273 \| stwux sp, sp, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3274 \| crnot 4cr1+eq, 4cr1+eq // For vararg calls.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3275 \| stw r14, -4(TMP2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3276 \| stw CCSTATE, -8(TMP2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3277 \| mr r14, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3278 \| la TMP1, CCSTATE->stack
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3279 \| slwi CARG2, CARG2, 2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3280 \| blty >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3281 \| la TMP2, 8(sp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3282 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3283 \| lwzx TMP0, TMP1, CARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3284 \| stwx TMP0, TMP2, CARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3285 \| addic. CARG2, CARG2, -4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3286 \| bge <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3287 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3288 \| bney cr1, >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3289 \| .FPU lfd f1, CCSTATE->fpr[0]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3290 \| .FPU lfd f2, CCSTATE->fpr[1]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3291 \| .FPU lfd f3, CCSTATE->fpr[2]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3292 \| .FPU lfd f4, CCSTATE->fpr[3]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3293 \| .FPU lfd f5, CCSTATE->fpr[4]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3294 \| .FPU lfd f6, CCSTATE->fpr[5]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3295 \| .FPU lfd f7, CCSTATE->fpr[6]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3296 \| .FPU lfd f8, CCSTATE->fpr[7]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3297 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3298 \| lp TMP0, CCSTATE->func
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3299 \| lwz CARG2, CCSTATE->gpr[1]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3300 \| lwz CARG3, CCSTATE->gpr[2]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3301 \| lwz CARG4, CCSTATE->gpr[3]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3302 \| lwz CARG5, CCSTATE->gpr[4]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3303 \| mtctr TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3304 \| lwz r8, CCSTATE->gpr[5]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3305 \| lwz r9, CCSTATE->gpr[6]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3306 \| lwz r10, CCSTATE->gpr[7]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3307 \| lwz CARG1, CCSTATE->gpr[0] // Do this last, since CCSTATE is CARG1.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3308 \| bctrl
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3309 \| lwz CCSTATE:TMP1, -8(r14)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3310 \| lwz TMP2, -4(r14)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3311 \| lwz TMP0, 4(r14)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3312 \| stw CARG1, CCSTATE:TMP1->gpr[0]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3313 \| .FPU stfd FARG1, CCSTATE:TMP1->fpr[0]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3314 \| stw CARG2, CCSTATE:TMP1->gpr[1]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3315 \| mtlr TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3316 \| stw CARG3, CCSTATE:TMP1->gpr[2]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3317 \| mr sp, r14
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3318 \| stw CARG4, CCSTATE:TMP1->gpr[3]
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3319 \| mr r14, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3320 \| blr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3321 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3322 \|// Note: vm_ffi_call must be the last function in this object file!
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3323 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3324 \|//-----------------------------------------------------------------------
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3325 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3326
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3327 /* Generate the code for a single instruction. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3328 static void build_ins(BuildCtx *ctx, BCOp op, int defop)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3329 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3330 int vk = 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3331 \|=>defop:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3332
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3333 switch (op) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3334
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3335 /* -- Comparison ops ---------------------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3336
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3337 /* Remember: all ops branch for a true comparison, fall through otherwise. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3338
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3339 case BC_ISLT: case BC_ISGE: case BC_ISLE: case BC_ISGT:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3340 \| // RA = src18, RD = src28, JMP with RD = target
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3341 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3342 \| lwzux CARG1, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3343 \| addi PC, PC, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3344 \| lwz CARG2, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3345 \| lwzux CARG3, RD, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3346 \| lwz TMP2, -4(PC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3347 \| checknum cr0, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3348 \| lwz CARG4, 4(RD)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3349 \| decode_RD4 TMP2, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3350 \| checknum cr1, CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3351 \| addis SAVE0, TMP2, -(BCBIAS_J*4 >> 16)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3352 \| bne cr0, >7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3353 \| bne cr1, >8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3354 \| cmpw CARG2, CARG4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3355 if (op == BC_ISLT) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3356 \| bge >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3357 } else if (op == BC_ISGE) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3358 \| blt >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3359 } else if (op == BC_ISLE) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3360 \| bgt >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3361 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3362 \| ble >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3363 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3364 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3365 \| add PC, PC, SAVE0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3366 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3367 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3368 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3369 \|7: // RA is not an integer.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3370 \| bgt cr0, ->vmeta_comp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3371 \| // RA is a number.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3372 \| .FPU lfd f0, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3373 \| bgt cr1, ->vmeta_comp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3374 \| blt cr1, >4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3375 \| // RA is a number, RD is an integer.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3376 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3377 \| tonum_i f1, CARG4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3378 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3379 \| bl ->vm_sfi2d_2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3380 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3381 \| b >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3382 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3383 \|8: // RA is an integer, RD is not an integer.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3384 \| bgt cr1, ->vmeta_comp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3385 \| // RA is an integer, RD is a number.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3386 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3387 \| tonum_i f0, CARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3388 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3389 \| bl ->vm_sfi2d_1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3390 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3391 \|4:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3392 \| .FPU lfd f1, 0(RD)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3393 \|5:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3394 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3395 \| fcmpu cr0, f0, f1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3396 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3397 \| blex __ledf2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3398 \| cmpwi CRET1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3399 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3400 if (op == BC_ISLT) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3401 \| bge <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3402 } else if (op == BC_ISGE) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3403 \| blt <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3404 } else if (op == BC_ISLE) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3405 \| cror 4cr0+lt, 4cr0+lt, 4*cr0+eq
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3406 \| bge <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3407 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3408 \| cror 4cr0+lt, 4cr0+lt, 4*cr0+eq
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3409 \| blt <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3410 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3411 \| b <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3412 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3413 \| lwzx TMP0, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3414 \| addi PC, PC, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3415 \| lfdx f0, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3416 \| lwzx TMP1, BASE, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3417 \| checknum cr0, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3418 \| lwz TMP2, -4(PC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3419 \| lfdx f1, BASE, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3420 \| checknum cr1, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3421 \| decode_RD4 TMP2, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3422 \| bge cr0, ->vmeta_comp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3423 \| addis TMP2, TMP2, -(BCBIAS_J*4 >> 16)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3424 \| bge cr1, ->vmeta_comp
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3425 \| fcmpu cr0, f0, f1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3426 if (op == BC_ISLT) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3427 \| bge >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3428 } else if (op == BC_ISGE) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3429 \| blt >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3430 } else if (op == BC_ISLE) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3431 \| cror 4cr0+lt, 4cr0+lt, 4*cr0+eq
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3432 \| bge >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3433 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3434 \| cror 4cr0+lt, 4cr0+lt, 4*cr0+eq
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3435 \| blt >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3436 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3437 \| add PC, PC, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3438 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3439 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3440 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3441 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3442
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3443 case BC_ISEQV: case BC_ISNEV:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3444 vk = op == BC_ISEQV;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3445 \| // RA = src18, RD = src28, JMP with RD = target
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3446 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3447 \| lwzux CARG1, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3448 \| addi PC, PC, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3449 \| lwz CARG2, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3450 \| lwzux CARG3, RD, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3451 \| checknum cr0, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3452 \| lwz SAVE0, -4(PC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3453 \| checknum cr1, CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3454 \| decode_RD4 SAVE0, SAVE0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3455 \| lwz CARG4, 4(RD)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3456 \| cror 4cr7+gt, 4cr0+gt, 4*cr1+gt
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3457 \| addis SAVE0, SAVE0, -(BCBIAS_J*4 >> 16)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3458 if (vk) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3459 \| ble cr7, ->BC_ISEQN_Z
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3460 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3461 \| ble cr7, ->BC_ISNEN_Z
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3462 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3463 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3464 \| lwzux CARG1, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3465 \| lwz SAVE0, 0(PC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3466 \| lfd f0, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3467 \| addi PC, PC, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3468 \| lwzux CARG3, RD, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3469 \| checknum cr0, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3470 \| decode_RD4 SAVE0, SAVE0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3471 \| lfd f1, 0(RD)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3472 \| checknum cr1, CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3473 \| addis SAVE0, SAVE0, -(BCBIAS_J*4 >> 16)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3474 \| bge cr0, >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3475 \| bge cr1, >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3476 \| fcmpu cr0, f0, f1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3477 if (vk) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3478 \| bne >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3479 \| add PC, PC, SAVE0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3480 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3481 \| beq >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3482 \| add PC, PC, SAVE0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3483 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3484 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3485 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3486 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3487 \|5: // Either or both types are not numbers.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3488 \|.if not DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3489 \| lwz CARG2, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3490 \| lwz CARG4, 4(RD)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3491 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3492 \|.if FFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3493 \| cmpwi cr7, CARG1, LJ_TCDATA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3494 \| cmpwi cr5, CARG3, LJ_TCDATA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3495 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3496 \| not TMP2, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3497 \| cmplw CARG1, CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3498 \| cmplwi cr1, TMP2, ~LJ_TISPRI // Primitive?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3499 \|.if FFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3500 \| cror 4cr7+eq, 4cr7+eq, 4*cr5+eq
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3501 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3502 \| cmplwi cr6, TMP2, ~LJ_TISTABUD // Table or userdata?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3503 \|.if FFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3504 \| beq cr7, ->vmeta_equal_cd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3505 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3506 \| cmplw cr5, CARG2, CARG4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3507 \| crandc 4cr0+gt, 4cr0+eq, 4*cr1+gt // 2: Same type and primitive.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3508 \| crorc 4cr0+lt, 4cr5+eq, 4*cr0+eq // 1: Same tv or different type.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3509 \| crand 4cr0+eq, 4cr0+eq, 4*cr5+eq // 0: Same type and same tv.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3510 \| mr SAVE1, PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3511 \| cror 4cr0+eq, 4cr0+eq, 4*cr0+gt // 0 or 2.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3512 \| cror 4cr0+lt, 4cr0+lt, 4*cr0+gt // 1 or 2.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3513 if (vk) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3514 \| bne cr0, >6
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3515 \| add PC, PC, SAVE0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3516 \|6:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3517 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3518 \| beq cr0, >6
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3519 \| add PC, PC, SAVE0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3520 \|6:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3521 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3522 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3523 \| bge cr0, >2 // Done if 1 or 2.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3524 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3525 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3526 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3527 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3528 \| blt cr0, <1 // Done if 1 or 2.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3529 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3530 \| blt cr6, <1 // Done if not tab/ud.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3531 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3532 \| // Different tables or userdatas. Need to check __eq metamethod.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3533 \| // Field metatable must be at same offset for GCtab and GCudata!
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3534 \| mr CARG3, CARG4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3535 \| lwz TAB:TMP2, TAB:CARG2->metatable
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3536 \| li CARG4, 1-vk // ne = 0 or 1.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3537 \| cmplwi TAB:TMP2, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3538 \| beq <1 // No metatable?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3539 \| lbz TMP2, TAB:TMP2->nomm
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3540 \| andix. TMP2, TMP2, 1<<MM_eq
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3541 \| bne <1 // Or 'no __eq' flag set?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3542 \| mr PC, SAVE1 // Restore old PC.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3543 \| b ->vmeta_equal // Handle __eq metamethod.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3544 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3545
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3546 case BC_ISEQS: case BC_ISNES:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3547 vk = op == BC_ISEQS;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3548 \| // RA = src8, RD = str_const8 (~), JMP with RD = target
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3549 \| lwzux TMP0, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3550 \| srwi RD, RD, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3551 \| lwz STR:TMP3, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3552 \| lwz TMP2, 0(PC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3553 \| subfic RD, RD, -4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3554 \| addi PC, PC, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3555 \|.if FFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3556 \| cmpwi TMP0, LJ_TCDATA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3557 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3558 \| lwzx STR:TMP1, KBASE, RD // KBASE-4-str_const*4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3559 \| .gpr64 extsw TMP0, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3560 \| subfic TMP0, TMP0, LJ_TSTR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3561 \|.if FFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3562 \| beq ->vmeta_equal_cd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3563 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3564 \| sub TMP1, STR:TMP1, STR:TMP3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3565 \| or TMP0, TMP0, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3566 \| decode_RD4 TMP2, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3567 \| subfic TMP0, TMP0, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3568 \| addis TMP2, TMP2, -(BCBIAS_J*4 >> 16)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3569 \| subfe TMP1, TMP1, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3570 if (vk) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3571 \| andc TMP2, TMP2, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3572 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3573 \| and TMP2, TMP2, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3574 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3575 \| add PC, PC, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3576 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3577 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3578
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3579 case BC_ISEQN: case BC_ISNEN:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3580 vk = op == BC_ISEQN;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3581 \| // RA = src8, RD = num_const8, JMP with RD = target
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3582 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3583 \| lwzux CARG1, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3584 \| addi PC, PC, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3585 \| lwz CARG2, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3586 \| lwzux CARG3, RD, KBASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3587 \| checknum cr0, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3588 \| lwz SAVE0, -4(PC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3589 \| checknum cr1, CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3590 \| decode_RD4 SAVE0, SAVE0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3591 \| lwz CARG4, 4(RD)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3592 \| addis SAVE0, SAVE0, -(BCBIAS_J*4 >> 16)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3593 if (vk) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3594 \|->BC_ISEQN_Z:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3595 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3596 \|->BC_ISNEN_Z:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3597 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3598 \| bne cr0, >7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3599 \| bne cr1, >8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3600 \| cmpw CARG2, CARG4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3601 \|4:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3602 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3603 if (vk) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3604 \|->BC_ISEQN_Z: // Dummy label.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3605 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3606 \|->BC_ISNEN_Z: // Dummy label.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3607 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3608 \| lwzx CARG1, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3609 \| addi PC, PC, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3610 \| lfdx f0, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3611 \| lwz SAVE0, -4(PC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3612 \| lfdx f1, KBASE, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3613 \| decode_RD4 SAVE0, SAVE0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3614 \| checknum CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3615 \| addis SAVE0, SAVE0, -(BCBIAS_J*4 >> 16)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3616 \| bge >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3617 \| fcmpu cr0, f0, f1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3618 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3619 if (vk) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3620 \| bne >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3621 \| add PC, PC, SAVE0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3622 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3623 \|.if not FFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3624 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3625 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3626 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3627 \| beq >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3628 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3629 \|.if not FFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3630 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3631 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3632 \| add PC, PC, SAVE0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3633 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3634 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3635 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3636 \|.if FFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3637 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3638 \| cmpwi CARG1, LJ_TCDATA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3639 \| beq ->vmeta_equal_cd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3640 \| b <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3641 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3642 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3643 \|7: // RA is not an integer.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3644 \| bge cr0, <3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3645 \| // RA is a number.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3646 \| .FPU lfd f0, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3647 \| blt cr1, >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3648 \| // RA is a number, RD is an integer.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3649 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3650 \| tonum_i f1, CARG4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3651 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3652 \| bl ->vm_sfi2d_2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3653 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3654 \| b >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3655 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3656 \|8: // RA is an integer, RD is a number.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3657 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3658 \| tonum_i f0, CARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3659 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3660 \| bl ->vm_sfi2d_1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3661 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3662 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3663 \| .FPU lfd f1, 0(RD)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3664 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3665 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3666 \| fcmpu cr0, f0, f1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3667 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3668 \| blex __ledf2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3669 \| cmpwi CRET1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3670 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3671 \| b <4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3672 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3673 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3674
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3675 case BC_ISEQP: case BC_ISNEP:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3676 vk = op == BC_ISEQP;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3677 \| // RA = src8, RD = primitive_type8 (~), JMP with RD = target
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3678 \| lwzx TMP0, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3679 \| srwi TMP1, RD, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3680 \| lwz TMP2, 0(PC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3681 \| not TMP1, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3682 \| addi PC, PC, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3683 \|.if FFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3684 \| cmpwi TMP0, LJ_TCDATA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3685 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3686 \| sub TMP0, TMP0, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3687 \|.if FFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3688 \| beq ->vmeta_equal_cd
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3689 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3690 \| decode_RD4 TMP2, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3691 \| .gpr64 extsw TMP0, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3692 \| addic TMP0, TMP0, -1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3693 \| addis TMP2, TMP2, -(BCBIAS_J*4 >> 16)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3694 \| subfe TMP1, TMP1, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3695 if (vk) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3696 \| and TMP2, TMP2, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3697 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3698 \| andc TMP2, TMP2, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3699 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3700 \| add PC, PC, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3701 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3702 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3703
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3704 /* -- Unary test and copy ops ------------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3705
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3706 case BC_ISTC: case BC_ISFC: case BC_IST: case BC_ISF:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3707 \| // RA = dst8 or unused, RD = src8, JMP with RD = target
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3708 \| lwzx TMP0, BASE, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3709 \| lwz INS, 0(PC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3710 \| addi PC, PC, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3711 if (op == BC_IST \|\| op == BC_ISF) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3712 \| .gpr64 extsw TMP0, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3713 \| subfic TMP0, TMP0, LJ_TTRUE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3714 \| decode_RD4 TMP2, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3715 \| subfe TMP1, TMP1, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3716 \| addis TMP2, TMP2, -(BCBIAS_J*4 >> 16)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3717 if (op == BC_IST) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3718 \| andc TMP2, TMP2, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3719 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3720 \| and TMP2, TMP2, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3721 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3722 \| add PC, PC, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3723 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3724 \| li TMP1, LJ_TFALSE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3725 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3726 \| lfdx f0, BASE, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3727 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3728 \| lwzux CARG1, RD, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3729 \| lwz CARG2, 4(RD)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3730 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3731 \| cmplw TMP0, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3732 if (op == BC_ISTC) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3733 \| bge >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3734 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3735 \| blt >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3736 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3737 \| addis PC, PC, -(BCBIAS_J*4 >> 16)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3738 \| decode_RD4 TMP2, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3739 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3740 \| stfdx f0, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3741 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3742 \| stwux CARG1, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3743 \| stw CARG2, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3744 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3745 \| add PC, PC, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3746 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3747 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3748 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3749 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3750
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3751 case BC_ISTYPE:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3752 \| // RA = src8, RD = -type8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3753 \| lwzx TMP0, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3754 \| srwi TMP1, RD, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3755 \| ins_next1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3756 \|.if not PPE and not GPR64
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3757 \| add. TMP0, TMP0, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3758 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3759 \| neg TMP1, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3760 \| cmpw TMP0, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3761 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3762 \| bne ->vmeta_istype
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3763 \| ins_next2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3764 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3765 case BC_ISNUM:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3766 \| // RA = src8, RD = -(TISNUM-1)8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3767 \| lwzx TMP0, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3768 \| ins_next1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3769 \| checknum TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3770 \| bge ->vmeta_istype
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3771 \| ins_next2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3772 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3773
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3774 /* -- Unary ops --------------------------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3775
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3776 case BC_MOV:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3777 \| // RA = dst8, RD = src8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3778 \| ins_next1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3779 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3780 \| lfdx f0, BASE, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3781 \| stfdx f0, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3782 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3783 \| lwzux TMP0, RD, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3784 \| lwz TMP1, 4(RD)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3785 \| stwux TMP0, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3786 \| stw TMP1, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3787 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3788 \| ins_next2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3789 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3790 case BC_NOT:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3791 \| // RA = dst8, RD = src8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3792 \| ins_next1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3793 \| lwzx TMP0, BASE, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3794 \| .gpr64 extsw TMP0, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3795 \| subfic TMP1, TMP0, LJ_TTRUE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3796 \| adde TMP0, TMP0, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3797 \| stwx TMP0, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3798 \| ins_next2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3799 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3800 case BC_UNM:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3801 \| // RA = dst8, RD = src8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3802 \| lwzux TMP1, RD, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3803 \| lwz TMP0, 4(RD)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3804 \| checknum TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3805 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3806 \| bne >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3807 \|.if GPR64
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3808 \| lus TMP2, 0x8000
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3809 \| neg TMP0, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3810 \| cmplw TMP0, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3811 \| beq >4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3812 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3813 \| nego. TMP0, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3814 \| bso >4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3815 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3816 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3817 \| ins_next1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3818 \| stwux TISNUM, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3819 \| stw TMP0, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3820 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3821 \| ins_next2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3822 \|4:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3823 \|.if not GPR64
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3824 \| // Potential overflow.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3825 \| checkov TMP1, <1 // Ignore unrelated overflow.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3826 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3827 \| lus TMP1, 0x41e0 // 2^31.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3828 \| li TMP0, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3829 \| b >7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3830 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3831 \|5:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3832 \| bge ->vmeta_unm
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3833 \| xoris TMP1, TMP1, 0x8000
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3834 \|7:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3835 \| ins_next1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3836 \| stwux TMP1, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3837 \| stw TMP0, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3838 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3839 \| b <3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3840 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3841 \| ins_next2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3842 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3843 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3844 case BC_LEN:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3845 \| // RA = dst8, RD = src8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3846 \| lwzux TMP0, RD, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3847 \| lwz CARG1, 4(RD)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3848 \| checkstr TMP0; bne >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3849 \| lwz CRET1, STR:CARG1->len
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3850 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3851 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3852 \| ins_next1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3853 \| stwux TISNUM, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3854 \| stw CRET1, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3855 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3856 \| tonum_u f0, CRET1 // Result is a non-negative integer.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3857 \| ins_next1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3858 \| stfdx f0, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3859 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3860 \| ins_next2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3861 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3862 \| checktab TMP0; bne ->vmeta_len
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3863 #if LJ_52
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3864 \| lwz TAB:TMP2, TAB:CARG1->metatable
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3865 \| cmplwi TAB:TMP2, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3866 \| bne >9
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3867 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3868 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3869 \|->BC_LEN_Z:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3870 \| bl extern lj_tab_len // (GCtab *t)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3871 \| // Returns uint32_t (but less than 2^31).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3872 \| b <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3873 #if LJ_52
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3874 \|9:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3875 \| lbz TMP0, TAB:TMP2->nomm
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3876 \| andix. TMP0, TMP0, 1<<MM_len
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3877 \| bne <3 // 'no __len' flag set: done.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3878 \| b ->vmeta_len
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3879 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3880 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3881
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3882 /* -- Binary ops -------------------------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3883
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3884 \|.macro ins_arithpre
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3885 \| // RA = dst8, RB = src18, RC = src28 \| num_const8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3886 \|\|vk = ((int)op - BC_ADDVN) / (BC_ADDNV-BC_ADDVN);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3887 \|\|switch (vk) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3888 \|\|case 0:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3889 \| lwzx CARG1, BASE, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3890 \| .if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3891 \| lwzx CARG3, KBASE, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3892 \| .endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3893 \| .if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3894 \| lfdx f14, BASE, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3895 \| lfdx f15, KBASE, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3896 \| .else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3897 \| add TMP1, BASE, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3898 \| add TMP2, KBASE, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3899 \| lwz CARG2, 4(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3900 \| lwz CARG4, 4(TMP2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3901 \| .endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3902 \| .if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3903 \| checknum cr0, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3904 \| checknum cr1, CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3905 \| crand 4cr0+lt, 4cr0+lt, 4*cr1+lt
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3906 \| bge ->vmeta_arith_vn
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3907 \| .else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3908 \| checknum CARG1; bge ->vmeta_arith_vn
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3909 \| .endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3910 \|\| break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3911 \|\|case 1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3912 \| lwzx CARG1, BASE, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3913 \| .if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3914 \| lwzx CARG3, KBASE, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3915 \| .endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3916 \| .if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3917 \| lfdx f15, BASE, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3918 \| lfdx f14, KBASE, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3919 \| .else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3920 \| add TMP1, BASE, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3921 \| add TMP2, KBASE, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3922 \| lwz CARG2, 4(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3923 \| lwz CARG4, 4(TMP2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3924 \| .endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3925 \| .if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3926 \| checknum cr0, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3927 \| checknum cr1, CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3928 \| crand 4cr0+lt, 4cr0+lt, 4*cr1+lt
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3929 \| bge ->vmeta_arith_nv
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3930 \| .else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3931 \| checknum CARG1; bge ->vmeta_arith_nv
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3932 \| .endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3933 \|\| break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3934 \|\|default:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3935 \| lwzx CARG1, BASE, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3936 \| lwzx CARG3, BASE, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3937 \| .if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3938 \| lfdx f14, BASE, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3939 \| lfdx f15, BASE, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3940 \| .else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3941 \| add TMP1, BASE, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3942 \| add TMP2, BASE, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3943 \| lwz CARG2, 4(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3944 \| lwz CARG4, 4(TMP2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3945 \| .endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3946 \| checknum cr0, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3947 \| checknum cr1, CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3948 \| crand 4cr0+lt, 4cr0+lt, 4*cr1+lt
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3949 \| bge ->vmeta_arith_vv
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3950 \|\| break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3951 \|\|}
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3952 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3953 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3954 \|.macro ins_arithfallback, ins
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3955 \|\|switch (vk) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3956 \|\|case 0:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3957 \| ins ->vmeta_arith_vn2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3958 \|\| break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3959 \|\|case 1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3960 \| ins ->vmeta_arith_nv2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3961 \|\| break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3962 \|\|default:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3963 \| ins ->vmeta_arith_vv2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3964 \|\| break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3965 \|\|}
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3966 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3967 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3968 \|.macro intmod, a, b, c
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3969 \| bl ->vm_modi
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3970 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3971 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3972 \|.macro fpmod, a, b, c
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3973 \|->BC_MODVN_Z:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3974 \| fdiv FARG1, b, c
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3975 \| // NYI: Use internal implementation of floor.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3976 \| blex floor // floor(b/c)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3977 \| fmul a, FARG1, c
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3978 \| fsub a, b, a // b - floor(b/c)*c
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3979 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3980 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3981 \|.macro sfpmod
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3982 \|->BC_MODVN_Z:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3983 \| stw CARG1, SFSAVE_1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3984 \| stw CARG2, SFSAVE_2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3985 \| mr SAVE0, CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3986 \| mr SAVE1, CARG4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3987 \| blex __divdf3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3988 \| blex floor
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3989 \| mr CARG3, SAVE0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3990 \| mr CARG4, SAVE1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3991 \| blex __muldf3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3992 \| mr CARG3, CRET1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3993 \| mr CARG4, CRET2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3994 \| lwz CARG1, SFSAVE_1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3995 \| lwz CARG2, SFSAVE_2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3996 \| blex __subdf3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3997 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3998 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3999 \|.macro ins_arithfp, fpins
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4000 \| ins_arithpre
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4001 \|.if "fpins" == "fpmod_"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4002 \| b ->BC_MODVN_Z // Avoid 3 copies. It's slow anyway.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4003 \|.elif FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4004 \| fpins f0, f14, f15
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4005 \| ins_next1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4006 \| stfdx f0, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4007 \| ins_next2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4008 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4009 \| blex __divdf3 // Only soft-float div uses this macro.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4010 \| ins_next1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4011 \| stwux CRET1, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4012 \| stw CRET2, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4013 \| ins_next2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4014 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4015 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4016 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4017 \|.macro ins_arithdn, intins, fpins, fpcall
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4018 \| // RA = dst8, RB = src18, RC = src28 \| num_const8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4019 \|\|vk = ((int)op - BC_ADDVN) / (BC_ADDNV-BC_ADDVN);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4020 \|\|switch (vk) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4021 \|\|case 0:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4022 \| lwzux CARG1, RB, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4023 \| lwzux CARG3, RC, KBASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4024 \| lwz CARG2, 4(RB)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4025 \| checknum cr0, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4026 \| lwz CARG4, 4(RC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4027 \| checknum cr1, CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4028 \|\| break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4029 \|\|case 1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4030 \| lwzux CARG3, RB, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4031 \| lwzux CARG1, RC, KBASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4032 \| lwz CARG4, 4(RB)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4033 \| checknum cr0, CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4034 \| lwz CARG2, 4(RC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4035 \| checknum cr1, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4036 \|\| break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4037 \|\|default:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4038 \| lwzux CARG1, RB, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4039 \| lwzux CARG3, RC, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4040 \| lwz CARG2, 4(RB)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4041 \| checknum cr0, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4042 \| lwz CARG4, 4(RC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4043 \| checknum cr1, CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4044 \|\| break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4045 \|\|}
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4046 \| bne >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4047 \| bne cr1, >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4048 \|.if "intins" == "intmod"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4049 \| mr CARG1, CARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4050 \| mr CARG2, CARG4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4051 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4052 \| intins CARG1, CARG2, CARG4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4053 \| bso >4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4054 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4055 \| ins_next1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4056 \| stwux TISNUM, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4057 \| stw CARG1, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4058 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4059 \| ins_next2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4060 \|4: // Overflow.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4061 \| checkov TMP0, <1 // Ignore unrelated overflow.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4062 \| ins_arithfallback b
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4063 \|5: // FP variant.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4064 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4065 \|\|if (vk == 1) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4066 \| lfd f15, 0(RB)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4067 \| lfd f14, 0(RC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4068 \|\|} else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4069 \| lfd f14, 0(RB)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4070 \| lfd f15, 0(RC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4071 \|\|}
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4072 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4073 \| crand 4cr0+lt, 4cr0+lt, 4*cr1+lt
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4074 \| ins_arithfallback bge
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4075 \|.if "fpins" == "fpmod_"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4076 \| b ->BC_MODVN_Z // Avoid 3 copies. It's slow anyway.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4077 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4078 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4079 \| fpins f0, f14, f15
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4080 \| stfdx f0, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4081 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4082 \|.if "fpcall" == "sfpmod"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4083 \| sfpmod
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4084 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4085 \| blex fpcall
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4086 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4087 \| stwux CRET1, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4088 \| stw CRET2, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4089 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4090 \| ins_next1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4091 \| b <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4092 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4093 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4094 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4095 \|.macro ins_arith, intins, fpins, fpcall
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4096 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4097 \| ins_arithdn intins, fpins, fpcall
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4098 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4099 \| ins_arithfp fpins
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4100 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4101 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4102
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4103 case BC_ADDVN: case BC_ADDNV: case BC_ADDVV:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4104 \|.if GPR64
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4105 \|.macro addo32., y, a, b
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4106 \| // Need to check overflow for (a<<32) + (b<<32).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4107 \| rldicr TMP0, a, 32, 31
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4108 \| rldicr TMP1, b, 32, 31
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4109 \| addo. TMP0, TMP0, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4110 \| add y, a, b
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4111 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4112 \| ins_arith addo32., fadd, __adddf3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4113 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4114 \| ins_arith addo., fadd, __adddf3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4115 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4116 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4117 case BC_SUBVN: case BC_SUBNV: case BC_SUBVV:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4118 \|.if GPR64
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4119 \|.macro subo32., y, a, b
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4120 \| // Need to check overflow for (a<<32) - (b<<32).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4121 \| rldicr TMP0, a, 32, 31
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4122 \| rldicr TMP1, b, 32, 31
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4123 \| subo. TMP0, TMP0, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4124 \| sub y, a, b
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4125 \|.endmacro
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4126 \| ins_arith subo32., fsub, __subdf3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4127 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4128 \| ins_arith subo., fsub, __subdf3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4129 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4130 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4131 case BC_MULVN: case BC_MULNV: case BC_MULVV:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4132 \| ins_arith mullwo., fmul, __muldf3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4133 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4134 case BC_DIVVN: case BC_DIVNV: case BC_DIVVV:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4135 \| ins_arithfp fdiv
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4136 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4137 case BC_MODVN:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4138 \| ins_arith intmod, fpmod, sfpmod
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4139 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4140 case BC_MODNV: case BC_MODVV:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4141 \| ins_arith intmod, fpmod_, sfpmod
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4142 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4143 case BC_POW:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4144 \| // NYI: (partial) integer arithmetic.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4145 \| lwzx CARG1, BASE, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4146 \| lwzx CARG3, BASE, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4147 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4148 \| lfdx FARG1, BASE, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4149 \| lfdx FARG2, BASE, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4150 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4151 \| add TMP1, BASE, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4152 \| add TMP2, BASE, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4153 \| lwz CARG2, 4(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4154 \| lwz CARG4, 4(TMP2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4155 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4156 \| checknum cr0, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4157 \| checknum cr1, CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4158 \| crand 4cr0+lt, 4cr0+lt, 4*cr1+lt
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4159 \| bge ->vmeta_arith_vv
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4160 \| blex pow
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4161 \| ins_next1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4162 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4163 \| stfdx FARG1, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4164 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4165 \| stwux CARG1, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4166 \| stw CARG2, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4167 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4168 \| ins_next2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4169 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4170
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4171 case BC_CAT:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4172 \| // RA = dst8, RB = src_start8, RC = src_end*8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4173 \| sub CARG3, RC, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4174 \| stp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4175 \| add CARG2, BASE, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4176 \| mr SAVE0, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4177 \|->BC_CAT_Z:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4178 \| stw PC, SAVE_PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4179 \| mr CARG1, L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4180 \| srwi CARG3, CARG3, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4181 \| bl extern lj_meta_cat // (lua_State L, TValue top, int left)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4182 \| // Returns NULL (finished) or TValue * (metamethod).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4183 \| cmplwi CRET1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4184 \| lp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4185 \| bne ->vmeta_binop
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4186 \| ins_next1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4187 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4188 \| lfdx f0, BASE, SAVE0 // Copy result from RB to RA.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4189 \| stfdx f0, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4190 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4191 \| lwzux TMP0, SAVE0, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4192 \| lwz TMP1, 4(SAVE0)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4193 \| stwux TMP0, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4194 \| stw TMP1, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4195 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4196 \| ins_next2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4197 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4198
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4199 /* -- Constant ops ------------------------------------------------------ */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4200
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4201 case BC_KSTR:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4202 \| // RA = dst8, RD = str_const8 (~)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4203 \| srwi TMP1, RD, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4204 \| subfic TMP1, TMP1, -4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4205 \| ins_next1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4206 \| lwzx TMP0, KBASE, TMP1 // KBASE-4-str_const*4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4207 \| li TMP2, LJ_TSTR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4208 \| stwux TMP2, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4209 \| stw TMP0, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4210 \| ins_next2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4211 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4212 case BC_KCDATA:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4213 \|.if FFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4214 \| // RA = dst8, RD = cdata_const8 (~)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4215 \| srwi TMP1, RD, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4216 \| subfic TMP1, TMP1, -4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4217 \| ins_next1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4218 \| lwzx TMP0, KBASE, TMP1 // KBASE-4-cdata_const*4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4219 \| li TMP2, LJ_TCDATA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4220 \| stwux TMP2, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4221 \| stw TMP0, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4222 \| ins_next2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4223 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4224 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4225 case BC_KSHORT:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4226 \| // RA = dst8, RD = int16_literal8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4227 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4228 \| slwi RD, RD, 13
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4229 \| srawi RD, RD, 16
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4230 \| ins_next1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4231 \| stwux TISNUM, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4232 \| stw RD, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4233 \| ins_next2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4234 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4235 \| // The soft-float approach is faster.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4236 \| slwi RD, RD, 13
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4237 \| srawi TMP1, RD, 31
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4238 \| xor TMP2, TMP1, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4239 \| sub TMP2, TMP2, TMP1 // TMP2 = abs(x)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4240 \| cntlzw TMP3, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4241 \| subfic TMP1, TMP3, 0x40d // TMP1 = exponent-1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4242 \| slw TMP2, TMP2, TMP3 // TMP2 = left aligned mantissa
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4243 \| subfic TMP3, RD, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4244 \| slwi TMP1, TMP1, 20
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4245 \| rlwimi RD, TMP2, 21, 1, 31 // hi = sign(x) \| (mantissa>>11)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4246 \| subfe TMP0, TMP0, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4247 \| add RD, RD, TMP1 // hi = hi + exponent-1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4248 \| and RD, RD, TMP0 // hi = x == 0 ? 0 : hi
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4249 \| ins_next1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4250 \| stwux RD, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4251 \| stw ZERO, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4252 \| ins_next2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4253 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4254 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4255 case BC_KNUM:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4256 \| // RA = dst8, RD = num_const8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4257 \| ins_next1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4258 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4259 \| lfdx f0, KBASE, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4260 \| stfdx f0, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4261 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4262 \| lwzux TMP0, RD, KBASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4263 \| lwz TMP1, 4(RD)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4264 \| stwux TMP0, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4265 \| stw TMP1, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4266 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4267 \| ins_next2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4268 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4269 case BC_KPRI:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4270 \| // RA = dst8, RD = primitive_type8 (~)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4271 \| srwi TMP1, RD, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4272 \| not TMP0, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4273 \| ins_next1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4274 \| stwx TMP0, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4275 \| ins_next2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4276 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4277 case BC_KNIL:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4278 \| // RA = base8, RD = end8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4279 \| stwx TISNIL, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4280 \| addi RA, RA, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4281 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4282 \| stwx TISNIL, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4283 \| cmpw RA, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4284 \| addi RA, RA, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4285 \| blt <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4286 \| ins_next_
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4287 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4288
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4289 /* -- Upvalue and function ops ------------------------------------------ */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4290
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4291 case BC_UGET:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4292 \| // RA = dst8, RD = uvnum8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4293 \| lwz LFUNC:RB, FRAME_FUNC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4294 \| srwi RD, RD, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4295 \| addi RD, RD, offsetof(GCfuncL, uvptr)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4296 \| lwzx UPVAL:RB, LFUNC:RB, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4297 \| ins_next1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4298 \| lwz TMP1, UPVAL:RB->v
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4299 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4300 \| lfd f0, 0(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4301 \| stfdx f0, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4302 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4303 \| lwz TMP2, 0(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4304 \| lwz TMP3, 4(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4305 \| stwux TMP2, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4306 \| stw TMP3, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4307 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4308 \| ins_next2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4309 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4310 case BC_USETV:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4311 \| // RA = uvnum8, RD = src8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4312 \| lwz LFUNC:RB, FRAME_FUNC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4313 \| srwi RA, RA, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4314 \| addi RA, RA, offsetof(GCfuncL, uvptr)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4315 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4316 \| lfdux f0, RD, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4317 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4318 \| lwzux CARG1, RD, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4319 \| lwz CARG3, 4(RD)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4320 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4321 \| lwzx UPVAL:RB, LFUNC:RB, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4322 \| lbz TMP3, UPVAL:RB->marked
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4323 \| lwz CARG2, UPVAL:RB->v
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4324 \| andix. TMP3, TMP3, LJ_GC_BLACK // isblack(uv)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4325 \| lbz TMP0, UPVAL:RB->closed
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4326 \| lwz TMP2, 0(RD)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4327 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4328 \| stfd f0, 0(CARG2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4329 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4330 \| stw CARG1, 0(CARG2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4331 \| stw CARG3, 4(CARG2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4332 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4333 \| cmplwi cr1, TMP0, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4334 \| lwz TMP1, 4(RD)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4335 \| cror 4cr0+eq, 4cr0+eq, 4*cr1+eq
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4336 \| subi TMP2, TMP2, (LJ_TNUMX+1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4337 \| bne >2 // Upvalue is closed and black?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4338 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4339 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4340 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4341 \|2: // Check if new value is collectable.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4342 \| cmplwi TMP2, LJ_TISGCV - (LJ_TNUMX+1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4343 \| bge <1 // tvisgcv(v)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4344 \| lbz TMP3, GCOBJ:TMP1->gch.marked
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4345 \| andix. TMP3, TMP3, LJ_GC_WHITES // iswhite(v)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4346 \| la CARG1, GG_DISP2G(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4347 \| // Crossed a write barrier. Move the barrier forward.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4348 \| beq <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4349 \| bl extern lj_gc_barrieruv // (global_State g, TValue tv)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4350 \| b <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4351 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4352 case BC_USETS:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4353 \| // RA = uvnum8, RD = str_const8 (~)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4354 \| lwz LFUNC:RB, FRAME_FUNC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4355 \| srwi TMP1, RD, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4356 \| srwi RA, RA, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4357 \| subfic TMP1, TMP1, -4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4358 \| addi RA, RA, offsetof(GCfuncL, uvptr)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4359 \| lwzx STR:TMP1, KBASE, TMP1 // KBASE-4-str_const*4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4360 \| lwzx UPVAL:RB, LFUNC:RB, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4361 \| lbz TMP3, UPVAL:RB->marked
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4362 \| lwz CARG2, UPVAL:RB->v
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4363 \| andix. TMP3, TMP3, LJ_GC_BLACK // isblack(uv)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4364 \| lbz TMP3, STR:TMP1->marked
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4365 \| lbz TMP2, UPVAL:RB->closed
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4366 \| li TMP0, LJ_TSTR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4367 \| stw STR:TMP1, 4(CARG2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4368 \| stw TMP0, 0(CARG2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4369 \| bne >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4370 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4371 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4372 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4373 \|2: // Check if string is white and ensure upvalue is closed.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4374 \| andix. TMP3, TMP3, LJ_GC_WHITES // iswhite(str)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4375 \| cmplwi cr1, TMP2, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4376 \| cror 4cr0+eq, 4cr0+eq, 4*cr1+eq
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4377 \| la CARG1, GG_DISP2G(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4378 \| // Crossed a write barrier. Move the barrier forward.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4379 \| beq <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4380 \| bl extern lj_gc_barrieruv // (global_State g, TValue tv)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4381 \| b <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4382 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4383 case BC_USETN:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4384 \| // RA = uvnum8, RD = num_const8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4385 \| lwz LFUNC:RB, FRAME_FUNC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4386 \| srwi RA, RA, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4387 \| addi RA, RA, offsetof(GCfuncL, uvptr)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4388 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4389 \| lfdx f0, KBASE, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4390 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4391 \| lwzux TMP2, RD, KBASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4392 \| lwz TMP3, 4(RD)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4393 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4394 \| lwzx UPVAL:RB, LFUNC:RB, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4395 \| ins_next1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4396 \| lwz TMP1, UPVAL:RB->v
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4397 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4398 \| stfd f0, 0(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4399 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4400 \| stw TMP2, 0(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4401 \| stw TMP3, 4(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4402 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4403 \| ins_next2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4404 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4405 case BC_USETP:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4406 \| // RA = uvnum8, RD = primitive_type8 (~)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4407 \| lwz LFUNC:RB, FRAME_FUNC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4408 \| srwi RA, RA, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4409 \| srwi TMP0, RD, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4410 \| addi RA, RA, offsetof(GCfuncL, uvptr)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4411 \| not TMP0, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4412 \| lwzx UPVAL:RB, LFUNC:RB, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4413 \| ins_next1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4414 \| lwz TMP1, UPVAL:RB->v
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4415 \| stw TMP0, 0(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4416 \| ins_next2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4417 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4418
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4419 case BC_UCLO:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4420 \| // RA = level*8, RD = target
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4421 \| lwz TMP1, L->openupval
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4422 \| branch_RD // Do this first since RD is not saved.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4423 \| stp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4424 \| cmplwi TMP1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4425 \| mr CARG1, L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4426 \| beq >1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4427 \| add CARG2, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4428 \| bl extern lj_func_closeuv // (lua_State L, TValue level)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4429 \| lp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4430 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4431 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4432 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4433
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4434 case BC_FNEW:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4435 \| // RA = dst8, RD = proto_const8 (~) (holding function prototype)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4436 \| srwi TMP1, RD, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4437 \| stp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4438 \| subfic TMP1, TMP1, -4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4439 \| stw PC, SAVE_PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4440 \| lwzx CARG2, KBASE, TMP1 // KBASE-4-tab_const*4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4441 \| mr CARG1, L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4442 \| lwz CARG3, FRAME_FUNC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4443 \| // (lua_State L, GCproto pt, GCfuncL *parent)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4444 \| bl extern lj_func_newL_gc
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4445 \| // Returns GCfuncL *.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4446 \| lp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4447 \| li TMP0, LJ_TFUNC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4448 \| stwux TMP0, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4449 \| stw LFUNC:CRET1, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4450 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4451 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4452
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4453 /* -- Table ops --------------------------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4454
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4455 case BC_TNEW:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4456 case BC_TDUP:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4457 \| // RA = dst8, RD = (hbits\|asize)8 \| tab_const*8 (~)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4458 \| lwz TMP0, DISPATCH_GL(gc.total)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4459 \| mr CARG1, L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4460 \| lwz TMP1, DISPATCH_GL(gc.threshold)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4461 \| stp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4462 \| cmplw TMP0, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4463 \| stw PC, SAVE_PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4464 \| bge >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4465 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4466 if (op == BC_TNEW) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4467 \| rlwinm CARG2, RD, 29, 21, 31
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4468 \| rlwinm CARG3, RD, 18, 27, 31
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4469 \| cmpwi CARG2, 0x7ff; beq >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4470 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4471 \| bl extern lj_tab_new // (lua_State *L, int32_t asize, uint32_t hbits)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4472 \| // Returns Table *.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4473 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4474 \| srwi TMP1, RD, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4475 \| subfic TMP1, TMP1, -4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4476 \| lwzx CARG2, KBASE, TMP1 // KBASE-4-tab_const*4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4477 \| bl extern lj_tab_dup // (lua_State L, Table kt)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4478 \| // Returns Table *.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4479 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4480 \| lp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4481 \| li TMP0, LJ_TTAB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4482 \| stwux TMP0, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4483 \| stw TAB:CRET1, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4484 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4485 if (op == BC_TNEW) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4486 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4487 \| li CARG2, 0x801
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4488 \| b <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4489 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4490 \|5:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4491 \| mr SAVE0, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4492 \| bl extern lj_gc_step_fixtop // (lua_State *L)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4493 \| mr RD, SAVE0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4494 \| mr CARG1, L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4495 \| b <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4496 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4497
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4498 case BC_GGET:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4499 \| // RA = dst8, RD = str_const8 (~)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4500 case BC_GSET:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4501 \| // RA = src8, RD = str_const8 (~)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4502 \| lwz LFUNC:TMP2, FRAME_FUNC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4503 \| srwi TMP1, RD, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4504 \| lwz TAB:RB, LFUNC:TMP2->env
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4505 \| subfic TMP1, TMP1, -4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4506 \| lwzx STR:RC, KBASE, TMP1 // KBASE-4-str_const*4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4507 if (op == BC_GGET) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4508 \| b ->BC_TGETS_Z
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4509 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4510 \| b ->BC_TSETS_Z
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4511 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4512 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4513
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4514 case BC_TGETV:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4515 \| // RA = dst8, RB = table8, RC = key*8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4516 \| lwzux CARG1, RB, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4517 \| lwzux CARG2, RC, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4518 \| lwz TAB:RB, 4(RB)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4519 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4520 \| lwz RC, 4(RC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4521 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4522 \| lfd f0, 0(RC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4523 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4524 \| checktab CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4525 \| checknum cr1, CARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4526 \| bne ->vmeta_tgetv
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4527 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4528 \| lwz TMP0, TAB:RB->asize
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4529 \| bne cr1, >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4530 \| lwz TMP1, TAB:RB->array
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4531 \| cmplw TMP0, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4532 \| slwi TMP2, RC, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4533 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4534 \| bge cr1, >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4535 \| // Convert number key to integer, check for integerness and range.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4536 \| fctiwz f1, f0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4537 \| fadd f2, f0, TOBIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4538 \| stfd f1, TMPD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4539 \| lwz TMP0, TAB:RB->asize
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4540 \| fsub f2, f2, TOBIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4541 \| lwz TMP2, TMPD_LO
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4542 \| lwz TMP1, TAB:RB->array
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4543 \| fcmpu cr1, f0, f2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4544 \| cmplw cr0, TMP0, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4545 \| crand 4cr0+gt, 4cr0+gt, 4*cr1+eq
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4546 \| slwi TMP2, TMP2, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4547 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4548 \| ble ->vmeta_tgetv // Integer key and in array part?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4549 \| lwzx TMP0, TMP1, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4550 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4551 \| lfdx f14, TMP1, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4552 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4553 \| lwzux SAVE0, TMP1, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4554 \| lwz SAVE1, 4(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4555 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4556 \| checknil TMP0; beq >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4557 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4558 \| ins_next1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4559 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4560 \| stfdx f14, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4561 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4562 \| stwux SAVE0, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4563 \| stw SAVE1, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4564 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4565 \| ins_next2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4566 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4567 \|2: // Check for __index if table value is nil.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4568 \| lwz TAB:TMP2, TAB:RB->metatable
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4569 \| cmplwi TAB:TMP2, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4570 \| beq <1 // No metatable: done.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4571 \| lbz TMP0, TAB:TMP2->nomm
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4572 \| andix. TMP0, TMP0, 1<<MM_index
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4573 \| bne <1 // 'no __index' flag set: done.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4574 \| b ->vmeta_tgetv
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4575 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4576 \|5:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4577 \| checkstr CARG2; bne ->vmeta_tgetv
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4578 \|.if not DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4579 \| lwz STR:RC, 4(RC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4580 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4581 \| b ->BC_TGETS_Z // String key?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4582 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4583 case BC_TGETS:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4584 \| // RA = dst8, RB = table8, RC = str_const*8 (~)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4585 \| lwzux CARG1, RB, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4586 \| srwi TMP1, RC, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4587 \| lwz TAB:RB, 4(RB)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4588 \| subfic TMP1, TMP1, -4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4589 \| checktab CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4590 \| lwzx STR:RC, KBASE, TMP1 // KBASE-4-str_const*4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4591 \| bne ->vmeta_tgets1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4592 \|->BC_TGETS_Z:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4593 \| // TAB:RB = GCtab , STR:RC = GCstr , RA = dst*8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4594 \| lwz TMP0, TAB:RB->hmask
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4595 \| lwz TMP1, STR:RC->sid
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4596 \| lwz NODE:TMP2, TAB:RB->node
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4597 \| and TMP1, TMP1, TMP0 // idx = str->sid & tab->hmask
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4598 \| slwi TMP0, TMP1, 5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4599 \| slwi TMP1, TMP1, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4600 \| sub TMP1, TMP0, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4601 \| add NODE:TMP2, NODE:TMP2, TMP1 // node = tab->node + (idx32-idx8)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4602 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4603 \| lwz CARG1, NODE:TMP2->key
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4604 \| lwz TMP0, 4+offsetof(Node, key)(NODE:TMP2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4605 \| lwz CARG2, NODE:TMP2->val
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4606 \| lwz TMP1, 4+offsetof(Node, val)(NODE:TMP2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4607 \| checkstr CARG1; bne >4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4608 \| cmpw TMP0, STR:RC; bne >4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4609 \| checknil CARG2; beq >5 // Key found, but nil value?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4610 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4611 \| stwux CARG2, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4612 \| stw TMP1, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4613 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4614 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4615 \|4: // Follow hash chain.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4616 \| lwz NODE:TMP2, NODE:TMP2->next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4617 \| cmplwi NODE:TMP2, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4618 \| bne <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4619 \| // End of hash chain: key not found, nil result.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4620 \| li CARG2, LJ_TNIL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4621 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4622 \|5: // Check for __index if table value is nil.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4623 \| lwz TAB:TMP2, TAB:RB->metatable
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4624 \| cmplwi TAB:TMP2, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4625 \| beq <3 // No metatable: done.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4626 \| lbz TMP0, TAB:TMP2->nomm
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4627 \| andix. TMP0, TMP0, 1<<MM_index
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4628 \| bne <3 // 'no __index' flag set: done.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4629 \| b ->vmeta_tgets
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4630 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4631 case BC_TGETB:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4632 \| // RA = dst8, RB = table8, RC = index*8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4633 \| lwzux CARG1, RB, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4634 \| srwi TMP0, RC, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4635 \| lwz TAB:RB, 4(RB)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4636 \| checktab CARG1; bne ->vmeta_tgetb
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4637 \| lwz TMP1, TAB:RB->asize
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4638 \| lwz TMP2, TAB:RB->array
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4639 \| cmplw TMP0, TMP1; bge ->vmeta_tgetb
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4640 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4641 \| lwzx TMP1, TMP2, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4642 \| lfdx f0, TMP2, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4643 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4644 \| lwzux TMP1, TMP2, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4645 \| lwz TMP3, 4(TMP2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4646 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4647 \| checknil TMP1; beq >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4648 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4649 \| ins_next1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4650 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4651 \| stfdx f0, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4652 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4653 \| stwux TMP1, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4654 \| stw TMP3, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4655 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4656 \| ins_next2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4657 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4658 \|5: // Check for __index if table value is nil.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4659 \| lwz TAB:TMP2, TAB:RB->metatable
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4660 \| cmplwi TAB:TMP2, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4661 \| beq <1 // No metatable: done.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4662 \| lbz TMP2, TAB:TMP2->nomm
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4663 \| andix. TMP2, TMP2, 1<<MM_index
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4664 \| bne <1 // 'no __index' flag set: done.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4665 \| b ->vmeta_tgetb // Caveat: preserve TMP0!
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4666 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4667 case BC_TGETR:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4668 \| // RA = dst8, RB = table8, RC = key*8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4669 \| add RB, BASE, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4670 \| lwz TAB:CARG1, 4(RB)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4671 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4672 \| add RC, BASE, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4673 \| lwz TMP0, TAB:CARG1->asize
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4674 \| lwz CARG2, 4(RC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4675 \| lwz TMP1, TAB:CARG1->array
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4676 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4677 \| lfdx f0, BASE, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4678 \| lwz TMP0, TAB:CARG1->asize
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4679 \| toint CARG2, f0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4680 \| lwz TMP1, TAB:CARG1->array
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4681 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4682 \| cmplw TMP0, CARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4683 \| slwi TMP2, CARG2, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4684 \| ble ->vmeta_tgetr // In array part?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4685 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4686 \| lfdx f14, TMP1, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4687 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4688 \| lwzux SAVE0, TMP2, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4689 \| lwz SAVE1, 4(TMP2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4690 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4691 \|->BC_TGETR_Z:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4692 \| ins_next1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4693 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4694 \| stfdx f14, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4695 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4696 \| stwux SAVE0, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4697 \| stw SAVE1, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4698 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4699 \| ins_next2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4700 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4701
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4702 case BC_TSETV:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4703 \| // RA = src8, RB = table8, RC = key*8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4704 \| lwzux CARG1, RB, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4705 \| lwzux CARG2, RC, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4706 \| lwz TAB:RB, 4(RB)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4707 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4708 \| lwz RC, 4(RC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4709 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4710 \| lfd f0, 0(RC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4711 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4712 \| checktab CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4713 \| checknum cr1, CARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4714 \| bne ->vmeta_tsetv
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4715 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4716 \| lwz TMP0, TAB:RB->asize
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4717 \| bne cr1, >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4718 \| lwz TMP1, TAB:RB->array
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4719 \| cmplw TMP0, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4720 \| slwi TMP0, RC, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4721 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4722 \| bge cr1, >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4723 \| // Convert number key to integer, check for integerness and range.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4724 \| fctiwz f1, f0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4725 \| fadd f2, f0, TOBIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4726 \| stfd f1, TMPD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4727 \| lwz TMP0, TAB:RB->asize
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4728 \| fsub f2, f2, TOBIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4729 \| lwz TMP2, TMPD_LO
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4730 \| lwz TMP1, TAB:RB->array
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4731 \| fcmpu cr1, f0, f2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4732 \| cmplw cr0, TMP0, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4733 \| crand 4cr0+gt, 4cr0+gt, 4*cr1+eq
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4734 \| slwi TMP0, TMP2, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4735 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4736 \| ble ->vmeta_tsetv // Integer key and in array part?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4737 \| lwzx TMP2, TMP1, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4738 \| lbz TMP3, TAB:RB->marked
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4739 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4740 \| lfdx f14, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4741 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4742 \| add SAVE1, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4743 \| lwz SAVE0, 0(SAVE1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4744 \| lwz SAVE1, 4(SAVE1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4745 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4746 \| checknil TMP2; beq >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4747 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4748 \| andix. TMP2, TMP3, LJ_GC_BLACK // isblack(table)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4749 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4750 \| stfdx f14, TMP1, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4751 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4752 \| stwux SAVE0, TMP1, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4753 \| stw SAVE1, 4(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4754 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4755 \| bne >7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4756 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4757 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4758 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4759 \|3: // Check for __newindex if previous value is nil.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4760 \| lwz TAB:TMP2, TAB:RB->metatable
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4761 \| cmplwi TAB:TMP2, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4762 \| beq <1 // No metatable: done.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4763 \| lbz TMP2, TAB:TMP2->nomm
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4764 \| andix. TMP2, TMP2, 1<<MM_newindex
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4765 \| bne <1 // 'no __newindex' flag set: done.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4766 \| b ->vmeta_tsetv
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4767 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4768 \|5:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4769 \| checkstr CARG2; bne ->vmeta_tsetv
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4770 \|.if not DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4771 \| lwz STR:RC, 4(RC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4772 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4773 \| b ->BC_TSETS_Z // String key?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4774 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4775 \|7: // Possible table write barrier for the value. Skip valiswhite check.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4776 \| barrierback TAB:RB, TMP3, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4777 \| b <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4778 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4779 case BC_TSETS:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4780 \| // RA = src8, RB = table8, RC = str_const*8 (~)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4781 \| lwzux CARG1, RB, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4782 \| srwi TMP1, RC, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4783 \| lwz TAB:RB, 4(RB)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4784 \| subfic TMP1, TMP1, -4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4785 \| checktab CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4786 \| lwzx STR:RC, KBASE, TMP1 // KBASE-4-str_const*4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4787 \| bne ->vmeta_tsets1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4788 \|->BC_TSETS_Z:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4789 \| // TAB:RB = GCtab , STR:RC = GCstr , RA = src*8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4790 \| lwz TMP0, TAB:RB->hmask
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4791 \| lwz TMP1, STR:RC->sid
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4792 \| lwz NODE:TMP2, TAB:RB->node
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4793 \| stb ZERO, TAB:RB->nomm // Clear metamethod cache.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4794 \| and TMP1, TMP1, TMP0 // idx = str->sid & tab->hmask
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4795 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4796 \| lfdx f14, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4797 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4798 \| add CARG2, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4799 \| lwz SAVE0, 0(CARG2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4800 \| lwz SAVE1, 4(CARG2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4801 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4802 \| slwi TMP0, TMP1, 5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4803 \| slwi TMP1, TMP1, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4804 \| sub TMP1, TMP0, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4805 \| lbz TMP3, TAB:RB->marked
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4806 \| add NODE:TMP2, NODE:TMP2, TMP1 // node = tab->node + (idx32-idx8)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4807 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4808 \| lwz CARG1, NODE:TMP2->key
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4809 \| lwz TMP0, 4+offsetof(Node, key)(NODE:TMP2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4810 \| lwz CARG2, NODE:TMP2->val
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4811 \| lwz NODE:TMP1, NODE:TMP2->next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4812 \| checkstr CARG1; bne >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4813 \| cmpw TMP0, STR:RC; bne >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4814 \| checknil CARG2; beq >4 // Key found, but nil value?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4815 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4816 \| andix. TMP0, TMP3, LJ_GC_BLACK // isblack(table)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4817 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4818 \| stfd f14, NODE:TMP2->val
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4819 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4820 \| stw SAVE0, NODE:TMP2->val.u32.hi
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4821 \| stw SAVE1, NODE:TMP2->val.u32.lo
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4822 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4823 \| bne >7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4824 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4825 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4826 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4827 \|4: // Check for __newindex if previous value is nil.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4828 \| lwz TAB:TMP1, TAB:RB->metatable
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4829 \| cmplwi TAB:TMP1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4830 \| beq <2 // No metatable: done.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4831 \| lbz TMP0, TAB:TMP1->nomm
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4832 \| andix. TMP0, TMP0, 1<<MM_newindex
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4833 \| bne <2 // 'no __newindex' flag set: done.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4834 \| b ->vmeta_tsets
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4835 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4836 \|5: // Follow hash chain.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4837 \| cmplwi NODE:TMP1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4838 \| mr NODE:TMP2, NODE:TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4839 \| bne <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4840 \| // End of hash chain: key not found, add a new one.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4841 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4842 \| // But check for __newindex first.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4843 \| lwz TAB:TMP1, TAB:RB->metatable
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4844 \| la CARG3, DISPATCH_GL(tmptv)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4845 \| stw PC, SAVE_PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4846 \| mr CARG1, L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4847 \| cmplwi TAB:TMP1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4848 \| stp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4849 \| beq >6 // No metatable: continue.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4850 \| lbz TMP0, TAB:TMP1->nomm
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4851 \| andix. TMP0, TMP0, 1<<MM_newindex
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4852 \| beq ->vmeta_tsets // 'no __newindex' flag NOT set: check.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4853 \|6:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4854 \| li TMP0, LJ_TSTR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4855 \| stw STR:RC, 4(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4856 \| mr CARG2, TAB:RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4857 \| stw TMP0, 0(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4858 \| bl extern lj_tab_newkey // (lua_State L, GCtab t, TValue *k)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4859 \| // Returns TValue *.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4860 \| lp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4861 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4862 \| stfd f14, 0(CRET1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4863 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4864 \| stw SAVE0, 0(CRET1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4865 \| stw SAVE1, 4(CRET1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4866 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4867 \| b <3 // No 2nd write barrier needed.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4868 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4869 \|7: // Possible table write barrier for the value. Skip valiswhite check.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4870 \| barrierback TAB:RB, TMP3, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4871 \| b <3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4872 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4873 case BC_TSETB:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4874 \| // RA = src8, RB = table8, RC = index*8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4875 \| lwzux CARG1, RB, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4876 \| srwi TMP0, RC, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4877 \| lwz TAB:RB, 4(RB)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4878 \| checktab CARG1; bne ->vmeta_tsetb
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4879 \| lwz TMP1, TAB:RB->asize
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4880 \| lwz TMP2, TAB:RB->array
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4881 \| lbz TMP3, TAB:RB->marked
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4882 \| cmplw TMP0, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4883 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4884 \| lfdx f14, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4885 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4886 \| add CARG2, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4887 \| lwz SAVE0, 0(CARG2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4888 \| lwz SAVE1, 4(CARG2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4889 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4890 \| bge ->vmeta_tsetb
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4891 \| lwzx TMP1, TMP2, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4892 \| checknil TMP1; beq >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4893 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4894 \| andix. TMP0, TMP3, LJ_GC_BLACK // isblack(table)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4895 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4896 \| stfdx f14, TMP2, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4897 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4898 \| stwux SAVE0, RC, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4899 \| stw SAVE1, 4(RC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4900 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4901 \| bne >7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4902 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4903 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4904 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4905 \|5: // Check for __newindex if previous value is nil.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4906 \| lwz TAB:TMP1, TAB:RB->metatable
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4907 \| cmplwi TAB:TMP1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4908 \| beq <1 // No metatable: done.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4909 \| lbz TMP1, TAB:TMP1->nomm
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4910 \| andix. TMP1, TMP1, 1<<MM_newindex
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4911 \| bne <1 // 'no __newindex' flag set: done.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4912 \| b ->vmeta_tsetb // Caveat: preserve TMP0!
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4913 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4914 \|7: // Possible table write barrier for the value. Skip valiswhite check.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4915 \| barrierback TAB:RB, TMP3, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4916 \| b <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4917 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4918 case BC_TSETR:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4919 \| // RA = dst8, RB = table8, RC = key*8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4920 \| add RB, BASE, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4921 \| lwz TAB:CARG2, 4(RB)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4922 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4923 \| add RC, BASE, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4924 \| lbz TMP3, TAB:CARG2->marked
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4925 \| lwz TMP0, TAB:CARG2->asize
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4926 \| lwz CARG3, 4(RC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4927 \| lwz TMP1, TAB:CARG2->array
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4928 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4929 \| lfdx f0, BASE, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4930 \| lbz TMP3, TAB:CARG2->marked
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4931 \| lwz TMP0, TAB:CARG2->asize
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4932 \| toint CARG3, f0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4933 \| lwz TMP1, TAB:CARG2->array
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4934 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4935 \| andix. TMP2, TMP3, LJ_GC_BLACK // isblack(table)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4936 \| bne >7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4937 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4938 \| cmplw TMP0, CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4939 \| slwi TMP2, CARG3, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4940 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4941 \| lfdx f14, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4942 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4943 \| lwzux SAVE0, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4944 \| lwz SAVE1, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4945 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4946 \| ble ->vmeta_tsetr // In array part?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4947 \| ins_next1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4948 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4949 \| stfdx f14, TMP1, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4950 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4951 \| stwux SAVE0, TMP1, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4952 \| stw SAVE1, 4(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4953 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4954 \| ins_next2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4955 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4956 \|7: // Possible table write barrier for the value. Skip valiswhite check.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4957 \| barrierback TAB:CARG2, TMP3, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4958 \| b <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4959 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4960
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4961
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4962 case BC_TSETM:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4963 \| // RA = base8 (table at base-1), RD = num_const8 (start index)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4964 \| add RA, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4965 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4966 \| add TMP3, KBASE, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4967 \| lwz TAB:CARG2, -4(RA) // Guaranteed to be a table.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4968 \| addic. TMP0, MULTRES, -8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4969 \| lwz TMP3, 4(TMP3) // Integer constant is in lo-word.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4970 \| srwi CARG3, TMP0, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4971 \| beq >4 // Nothing to copy?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4972 \| add CARG3, CARG3, TMP3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4973 \| lwz TMP2, TAB:CARG2->asize
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4974 \| slwi TMP1, TMP3, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4975 \| lbz TMP3, TAB:CARG2->marked
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4976 \| cmplw CARG3, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4977 \| add TMP2, RA, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4978 \| lwz TMP0, TAB:CARG2->array
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4979 \| bgt >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4980 \| add TMP1, TMP1, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4981 \| andix. TMP0, TMP3, LJ_GC_BLACK // isblack(table)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4982 \|3: // Copy result slots to table.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4983 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4984 \| lfd f0, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4985 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4986 \| lwz SAVE0, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4987 \| lwz SAVE1, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4988 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4989 \| addi RA, RA, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4990 \| cmpw cr1, RA, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4991 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4992 \| stfd f0, 0(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4993 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4994 \| stw SAVE0, 0(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4995 \| stw SAVE1, 4(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4996 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4997 \| addi TMP1, TMP1, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4998 \| blt cr1, <3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4999 \| bne >7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5000 \|4:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5001 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5002 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5003 \|5: // Need to resize array part.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5004 \| stp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5005 \| mr CARG1, L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5006 \| stw PC, SAVE_PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5007 \| mr SAVE0, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5008 \| bl extern lj_tab_reasize // (lua_State L, GCtab t, int nasize)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5009 \| // Must not reallocate the stack.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5010 \| mr RD, SAVE0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5011 \| b <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5012 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5013 \|7: // Possible table write barrier for any value. Skip valiswhite check.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5014 \| barrierback TAB:CARG2, TMP3, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5015 \| b <4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5016 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5017
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5018 /* -- Calls and vararg handling ----------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5019
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5020 case BC_CALLM:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5021 \| // RA = base8, (RB = (nresults+1)8,) RC = extra_nargs*8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5022 \| add NARGS8:RC, NARGS8:RC, MULTRES
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5023 \| // Fall through. Assumes BC_CALL follows.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5024 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5025 case BC_CALL:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5026 \| // RA = base8, (RB = (nresults+1)8,) RC = (nargs+1)*8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5027 \| mr TMP2, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5028 \| lwzux TMP0, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5029 \| lwz LFUNC:RB, 4(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5030 \| subi NARGS8:RC, NARGS8:RC, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5031 \| addi BASE, BASE, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5032 \| checkfunc TMP0; bne ->vmeta_call
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5033 \| ins_call
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5034 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5035
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5036 case BC_CALLMT:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5037 \| // RA = base8, (RB = 0,) RC = extra_nargs8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5038 \| add NARGS8:RC, NARGS8:RC, MULTRES
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5039 \| // Fall through. Assumes BC_CALLT follows.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5040 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5041 case BC_CALLT:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5042 \| // RA = base8, (RB = 0,) RC = (nargs+1)8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5043 \| lwzux TMP0, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5044 \| lwz LFUNC:RB, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5045 \| subi NARGS8:RC, NARGS8:RC, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5046 \| lwz TMP1, FRAME_PC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5047 \| checkfunc TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5048 \| addi RA, RA, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5049 \| bne ->vmeta_callt
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5050 \|->BC_CALLT_Z:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5051 \| andix. TMP0, TMP1, FRAME_TYPE // Caveat: preserve cr0 until the crand.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5052 \| lbz TMP3, LFUNC:RB->ffid
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5053 \| xori TMP2, TMP1, FRAME_VARG
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5054 \| cmplwi cr1, NARGS8:RC, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5055 \| bne >7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5056 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5057 \| stw LFUNC:RB, FRAME_FUNC(BASE) // Copy function down, but keep PC.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5058 \| li TMP2, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5059 \| cmplwi cr7, TMP3, 1 // (> FF_C) Calling a fast function?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5060 \| beq cr1, >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5061 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5062 \| addi TMP3, TMP2, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5063 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5064 \| lfdx f0, RA, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5065 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5066 \| add CARG3, RA, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5067 \| lwz CARG1, 0(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5068 \| lwz CARG2, 4(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5069 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5070 \| cmplw cr1, TMP3, NARGS8:RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5071 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5072 \| stfdx f0, BASE, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5073 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5074 \| stwux CARG1, TMP2, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5075 \| stw CARG2, 4(TMP2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5076 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5077 \| mr TMP2, TMP3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5078 \| bne cr1, <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5079 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5080 \| crand 4cr0+eq, 4cr0+eq, 4*cr7+gt
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5081 \| beq >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5082 \|4:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5083 \| ins_callt
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5084 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5085 \|5: // Tailcall to a fast function with a Lua frame below.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5086 \| lwz INS, -4(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5087 \| decode_RA8 RA, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5088 \| sub TMP1, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5089 \| lwz LFUNC:TMP1, FRAME_FUNC-8(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5090 \| lwz TMP1, LFUNC:TMP1->pc
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5091 \| lwz KBASE, PC2PROTO(k)(TMP1) // Need to prepare KBASE.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5092 \| b <4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5093 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5094 \|7: // Tailcall from a vararg function.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5095 \| andix. TMP0, TMP2, FRAME_TYPEP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5096 \| bne <1 // Vararg frame below?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5097 \| sub BASE, BASE, TMP2 // Relocate BASE down.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5098 \| lwz TMP1, FRAME_PC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5099 \| andix. TMP0, TMP1, FRAME_TYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5100 \| b <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5101 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5102
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5103 case BC_ITERC:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5104 \| // RA = base8, (RB = (nresults+1)8, RC = (nargs+1)8 ((2+1)8))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5105 \| mr TMP2, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5106 \| add BASE, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5107 \| lwz TMP1, -24(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5108 \| lwz LFUNC:RB, -20(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5109 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5110 \| lfd f1, -8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5111 \| lfd f0, -16(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5112 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5113 \| lwz CARG1, -8(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5114 \| lwz CARG2, -4(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5115 \| lwz CARG3, -16(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5116 \| lwz CARG4, -12(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5117 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5118 \| stw TMP1, 0(BASE) // Copy callable.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5119 \| stw LFUNC:RB, 4(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5120 \| checkfunc TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5121 \| li NARGS8:RC, 16 // Iterators get 2 arguments.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5122 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5123 \| stfd f1, 16(BASE) // Copy control var.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5124 \| stfdu f0, 8(BASE) // Copy state.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5125 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5126 \| stw CARG1, 16(BASE) // Copy control var.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5127 \| stw CARG2, 20(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5128 \| stwu CARG3, 8(BASE) // Copy state.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5129 \| stw CARG4, 4(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5130 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5131 \| bne ->vmeta_call
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5132 \| ins_call
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5133 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5134
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5135 case BC_ITERN:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5136 \| // RA = base8, (RB = (nresults+1)8, RC = (nargs+1)8 (2+1)8)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5137 \|.if JIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5138 \| // NYI on big-endian
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5139 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5140 \|->vm_IITERN:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5141 \| add RA, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5142 \| lwz TAB:RB, -12(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5143 \| lwz RC, -4(RA) // Get index from control var.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5144 \| lwz TMP0, TAB:RB->asize
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5145 \| lwz TMP1, TAB:RB->array
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5146 \| addi PC, PC, 4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5147 \|1: // Traverse array part.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5148 \| cmplw RC, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5149 \| slwi TMP3, RC, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5150 \| bge >5 // Index points after array part?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5151 \| lwzx TMP2, TMP1, TMP3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5152 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5153 \| lfdx f0, TMP1, TMP3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5154 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5155 \| lwzux CARG1, TMP3, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5156 \| lwz CARG2, 4(TMP3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5157 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5158 \| checknil TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5159 \| lwz INS, -4(PC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5160 \| beq >4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5161 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5162 \| stw RC, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5163 \| stw TISNUM, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5164 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5165 \| tonum_u f1, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5166 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5167 \| addi RC, RC, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5168 \| addis TMP3, PC, -(BCBIAS_J*4 >> 16)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5169 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5170 \| stfd f0, 8(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5171 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5172 \| stw CARG1, 8(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5173 \| stw CARG2, 12(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5174 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5175 \| decode_RD4 TMP1, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5176 \| stw RC, -4(RA) // Update control var.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5177 \| add PC, TMP1, TMP3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5178 \|.if not DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5179 \| stfd f1, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5180 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5181 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5182 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5183 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5184 \|4: // Skip holes in array part.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5185 \| addi RC, RC, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5186 \| b <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5187 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5188 \|5: // Traverse hash part.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5189 \| lwz TMP1, TAB:RB->hmask
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5190 \| sub RC, RC, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5191 \| lwz TMP2, TAB:RB->node
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5192 \|6:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5193 \| cmplw RC, TMP1 // End of iteration? Branch to ITERL+1.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5194 \| slwi TMP3, RC, 5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5195 \| bgty <3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5196 \| slwi RB, RC, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5197 \| sub TMP3, TMP3, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5198 \| lwzx RB, TMP2, TMP3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5199 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5200 \| lfdx f0, TMP2, TMP3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5201 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5202 \| add CARG3, TMP2, TMP3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5203 \| lwz CARG1, 0(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5204 \| lwz CARG2, 4(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5205 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5206 \| add NODE:TMP3, TMP2, TMP3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5207 \| checknil RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5208 \| lwz INS, -4(PC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5209 \| beq >7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5210 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5211 \| lfd f1, NODE:TMP3->key
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5212 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5213 \| lwz CARG3, NODE:TMP3->key.u32.hi
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5214 \| lwz CARG4, NODE:TMP3->key.u32.lo
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5215 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5216 \| addis TMP2, PC, -(BCBIAS_J*4 >> 16)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5217 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5218 \| stfd f0, 8(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5219 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5220 \| stw CARG1, 8(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5221 \| stw CARG2, 12(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5222 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5223 \| add RC, RC, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5224 \| decode_RD4 TMP1, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5225 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5226 \| stfd f1, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5227 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5228 \| stw CARG3, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5229 \| stw CARG4, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5230 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5231 \| addi RC, RC, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5232 \| add PC, TMP1, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5233 \| stw RC, -4(RA) // Update control var.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5234 \| b <3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5235 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5236 \|7: // Skip holes in hash part.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5237 \| addi RC, RC, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5238 \| b <6
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5239 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5240
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5241 case BC_ISNEXT:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5242 \| // RA = base*8, RD = target (points to ITERN)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5243 \| add RA, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5244 \| lwz TMP0, -24(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5245 \| lwz CFUNC:TMP1, -20(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5246 \| lwz TMP2, -16(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5247 \| lwz TMP3, -8(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5248 \| cmpwi cr0, TMP2, LJ_TTAB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5249 \| cmpwi cr1, TMP0, LJ_TFUNC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5250 \| cmpwi cr6, TMP3, LJ_TNIL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5251 \| bne cr1, >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5252 \| lbz TMP1, CFUNC:TMP1->ffid
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5253 \| crand 4cr0+eq, 4cr0+eq, 4*cr6+eq
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5254 \| cmpwi cr7, TMP1, FF_next_N
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5255 \| srwi TMP0, RD, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5256 \| crand 4cr0+eq, 4cr0+eq, 4*cr7+eq
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5257 \| add TMP3, PC, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5258 \| bne cr0, >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5259 \| lus TMP1, (LJ_KEYINDEX >> 16)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5260 \| ori TMP1, TMP1, (LJ_KEYINDEX & 0xffff)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5261 \| stw ZERO, -4(RA) // Initialize control var.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5262 \| stw TMP1, -8(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5263 \| addis PC, TMP3, -(BCBIAS_J*4 >> 16)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5264 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5265 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5266 \|5: // Despecialize bytecode if any of the checks fail.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5267 \| li TMP0, BC_JMP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5268 \| li TMP1, BC_ITERC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5269 \| stb TMP0, -1(PC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5270 \| addis PC, TMP3, -(BCBIAS_J*4 >> 16)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5271 \| // NYI on big-endian: unpatch JLOOP.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5272 \| stb TMP1, 3(PC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5273 \| b <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5274 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5275
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5276 case BC_VARG:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5277 \| // RA = base8, RB = (nresults+1)8, RC = numparams*8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5278 \| lwz TMP0, FRAME_PC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5279 \| add RC, BASE, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5280 \| add RA, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5281 \| addi RC, RC, FRAME_VARG
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5282 \| add TMP2, RA, RB
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5283 \| subi TMP3, BASE, 8 // TMP3 = vtop
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5284 \| sub RC, RC, TMP0 // RC = vbase
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5285 \| // Note: RC may now be even _above_ BASE if nargs was < numparams.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5286 \| cmplwi cr1, RB, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5287 \|.if PPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5288 \| sub TMP1, TMP3, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5289 \| cmpwi TMP1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5290 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5291 \| sub. TMP1, TMP3, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5292 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5293 \| beq cr1, >5 // Copy all varargs?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5294 \| subi TMP2, TMP2, 16
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5295 \| ble >2 // No vararg slots?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5296 \|1: // Copy vararg slots to destination slots.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5297 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5298 \| lfd f0, 0(RC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5299 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5300 \| lwz CARG1, 0(RC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5301 \| lwz CARG2, 4(RC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5302 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5303 \| addi RC, RC, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5304 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5305 \| stfd f0, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5306 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5307 \| stw CARG1, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5308 \| stw CARG2, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5309 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5310 \| cmplw RA, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5311 \| cmplw cr1, RC, TMP3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5312 \| bge >3 // All destination slots filled?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5313 \| addi RA, RA, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5314 \| blt cr1, <1 // More vararg slots?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5315 \|2: // Fill up remainder with nil.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5316 \| stw TISNIL, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5317 \| cmplw RA, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5318 \| addi RA, RA, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5319 \| blt <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5320 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5321 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5322 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5323 \|5: // Copy all varargs.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5324 \| lwz TMP0, L->maxstack
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5325 \| li MULTRES, 8 // MULTRES = (0+1)*8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5326 \| bley <3 // No vararg slots?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5327 \| add TMP2, RA, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5328 \| cmplw TMP2, TMP0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5329 \| addi MULTRES, TMP1, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5330 \| bgt >7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5331 \|6:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5332 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5333 \| lfd f0, 0(RC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5334 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5335 \| lwz CARG1, 0(RC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5336 \| lwz CARG2, 4(RC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5337 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5338 \| addi RC, RC, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5339 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5340 \| stfd f0, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5341 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5342 \| stw CARG1, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5343 \| stw CARG2, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5344 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5345 \| cmplw RC, TMP3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5346 \| addi RA, RA, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5347 \| blt <6 // More vararg slots?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5348 \| b <3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5349 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5350 \|7: // Grow stack for varargs.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5351 \| mr CARG1, L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5352 \| stp RA, L->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5353 \| sub SAVE0, RC, BASE // Need delta, because BASE may change.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5354 \| stp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5355 \| sub RA, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5356 \| stw PC, SAVE_PC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5357 \| srwi CARG2, TMP1, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5358 \| bl extern lj_state_growstack // (lua_State *L, int n)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5359 \| lp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5360 \| add RA, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5361 \| add RC, BASE, SAVE0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5362 \| subi TMP3, BASE, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5363 \| b <6
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5364 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5365
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5366 /* -- Returns ----------------------------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5367
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5368 case BC_RETM:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5369 \| // RA = results8, RD = extra_nresults8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5370 \| add RD, RD, MULTRES // MULTRES >= 8, so RD >= 8.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5371 \| // Fall through. Assumes BC_RET follows.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5372 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5373
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5374 case BC_RET:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5375 \| // RA = results8, RD = (nresults+1)8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5376 \| lwz PC, FRAME_PC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5377 \| add RA, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5378 \| mr MULTRES, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5379 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5380 \| andix. TMP0, PC, FRAME_TYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5381 \| xori TMP1, PC, FRAME_VARG
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5382 \| bne ->BC_RETV_Z
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5383 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5384 \|->BC_RET_Z:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5385 \| // BASE = base, RA = resultptr, RD = (nresults+1)*8, PC = return
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5386 \| lwz INS, -4(PC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5387 \| cmpwi RD, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5388 \| subi TMP2, BASE, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5389 \| subi RC, RD, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5390 \| decode_RB8 RB, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5391 \| beq >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5392 \| li TMP1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5393 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5394 \| addi TMP3, TMP1, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5395 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5396 \| lfdx f0, RA, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5397 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5398 \| add CARG3, RA, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5399 \| lwz CARG1, 0(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5400 \| lwz CARG2, 4(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5401 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5402 \| cmpw TMP3, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5403 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5404 \| stfdx f0, TMP2, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5405 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5406 \| add CARG3, TMP2, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5407 \| stw CARG1, 0(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5408 \| stw CARG2, 4(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5409 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5410 \| beq >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5411 \| addi TMP1, TMP3, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5412 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5413 \| lfdx f1, RA, TMP3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5414 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5415 \| add CARG3, RA, TMP3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5416 \| lwz CARG1, 0(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5417 \| lwz CARG2, 4(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5418 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5419 \| cmpw TMP1, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5420 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5421 \| stfdx f1, TMP2, TMP3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5422 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5423 \| add CARG3, TMP2, TMP3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5424 \| stw CARG1, 0(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5425 \| stw CARG2, 4(CARG3)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5426 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5427 \| bne <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5428 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5429 \|5:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5430 \| cmplw RB, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5431 \| decode_RA8 RA, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5432 \| bgt >6
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5433 \| sub BASE, TMP2, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5434 \| lwz LFUNC:TMP1, FRAME_FUNC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5435 \| ins_next1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5436 \| lwz TMP1, LFUNC:TMP1->pc
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5437 \| lwz KBASE, PC2PROTO(k)(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5438 \| ins_next2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5439 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5440 \|6: // Fill up results with nil.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5441 \| subi TMP1, RD, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5442 \| addi RD, RD, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5443 \| stwx TISNIL, TMP2, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5444 \| b <5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5445 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5446 \|->BC_RETV_Z: // Non-standard return case.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5447 \| andix. TMP2, TMP1, FRAME_TYPEP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5448 \| bne ->vm_return
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5449 \| // Return from vararg function: relocate BASE down.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5450 \| sub BASE, BASE, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5451 \| lwz PC, FRAME_PC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5452 \| b <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5453 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5454
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5455 case BC_RET0: case BC_RET1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5456 \| // RA = results8, RD = (nresults+1)8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5457 \| lwz PC, FRAME_PC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5458 \| add RA, BASE, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5459 \| mr MULTRES, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5460 \| andix. TMP0, PC, FRAME_TYPE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5461 \| xori TMP1, PC, FRAME_VARG
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5462 \| bney ->BC_RETV_Z
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5463 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5464 \| lwz INS, -4(PC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5465 \| subi TMP2, BASE, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5466 \| decode_RB8 RB, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5467 if (op == BC_RET1) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5468 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5469 \| lfd f0, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5470 \| stfd f0, 0(TMP2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5471 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5472 \| lwz CARG1, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5473 \| lwz CARG2, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5474 \| stw CARG1, 0(TMP2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5475 \| stw CARG2, 4(TMP2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5476 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5477 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5478 \|5:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5479 \| cmplw RB, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5480 \| decode_RA8 RA, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5481 \| bgt >6
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5482 \| sub BASE, TMP2, RA
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5483 \| lwz LFUNC:TMP1, FRAME_FUNC(BASE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5484 \| ins_next1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5485 \| lwz TMP1, LFUNC:TMP1->pc
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5486 \| lwz KBASE, PC2PROTO(k)(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5487 \| ins_next2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5488 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5489 \|6: // Fill up results with nil.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5490 \| subi TMP1, RD, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5491 \| addi RD, RD, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5492 \| stwx TISNIL, TMP2, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5493 \| b <5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5494 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5495
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5496 /* -- Loops and branches ------------------------------------------------ */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5497
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5498 case BC_FORL:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5499 \|.if JIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5500 \| hotloop
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5501 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5502 \| // Fall through. Assumes BC_IFORL follows.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5503 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5504
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5505 case BC_JFORI:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5506 case BC_JFORL:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5507 #if !LJ_HASJIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5508 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5509 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5510 case BC_FORI:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5511 case BC_IFORL:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5512 \| // RA = base*8, RD = target (after end of loop or start of loop)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5513 vk = (op == BC_IFORL \|\| op == BC_JFORL);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5514 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5515 \| // Integer loop.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5516 \| lwzux TMP1, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5517 \| lwz CARG1, FORL_IDX*8+4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5518 \| cmplw cr0, TMP1, TISNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5519 if (vk) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5520 \| lwz CARG3, FORL_STEP*8+4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5521 \| bne >9
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5522 \|.if GPR64
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5523 \| // Need to check overflow for (a<<32) + (b<<32).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5524 \| rldicr TMP0, CARG1, 32, 31
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5525 \| rldicr TMP2, CARG3, 32, 31
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5526 \| add CARG1, CARG1, CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5527 \| addo. TMP0, TMP0, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5528 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5529 \| addo. CARG1, CARG1, CARG3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5530 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5531 \| cmpwi cr6, CARG3, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5532 \| lwz CARG2, FORL_STOP*8+4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5533 \| bso >6
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5534 \|4:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5535 \| stw CARG1, FORL_IDX*8+4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5536 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5537 \| lwz SAVE0, FORL_STEP*8(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5538 \| lwz CARG3, FORL_STEP*8+4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5539 \| lwz TMP2, FORL_STOP*8(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5540 \| lwz CARG2, FORL_STOP*8+4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5541 \| cmplw cr7, SAVE0, TISNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5542 \| cmplw cr1, TMP2, TISNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5543 \| crand 4cr0+eq, 4cr0+eq, 4*cr7+eq
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5544 \| crand 4cr0+eq, 4cr0+eq, 4*cr1+eq
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5545 \| cmpwi cr6, CARG3, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5546 \| bne >9
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5547 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5548 \| blt cr6, >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5549 \| cmpw CARG1, CARG2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5550 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5551 \| stw TISNUM, FORL_EXT*8(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5552 if (op != BC_JFORL) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5553 \| srwi RD, RD, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5554 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5555 \| stw CARG1, FORL_EXT*8+4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5556 if (op != BC_JFORL) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5557 \| add RD, PC, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5558 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5559 if (op == BC_FORI) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5560 \| bgt >3 // See FP loop below.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5561 } else if (op == BC_JFORI) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5562 \| addis PC, RD, -(BCBIAS_J*4 >> 16)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5563 \| bley >7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5564 } else if (op == BC_IFORL) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5565 \| bgt >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5566 \| addis PC, RD, -(BCBIAS_J*4 >> 16)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5567 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5568 \| bley =>BC_JLOOP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5569 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5570 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5571 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5572 \|5: // Invert check for negative step.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5573 \| cmpw CARG2, CARG1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5574 \| b <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5575 if (vk) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5576 \|6: // Potential overflow.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5577 \| checkov TMP0, <4 // Ignore unrelated overflow.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5578 \| b <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5579 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5580 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5581 if (vk) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5582 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5583 \|9: // FP loop.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5584 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5585 \| lfd f1, FORL_IDX*8(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5586 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5587 \| lwz CARG1, FORL_IDX*8(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5588 \| lwz CARG2, FORL_IDX*8+4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5589 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5590 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5591 \| lfdux f1, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5592 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5593 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5594 \| lfd f3, FORL_STEP*8(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5595 \| lfd f2, FORL_STOP*8(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5596 \| fadd f1, f1, f3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5597 \| stfd f1, FORL_IDX*8(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5598 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5599 \| lwz CARG3, FORL_STEP*8(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5600 \| lwz CARG4, FORL_STEP*8+4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5601 \| mr SAVE1, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5602 \| blex __adddf3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5603 \| mr RD, SAVE1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5604 \| stw CRET1, FORL_IDX*8(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5605 \| stw CRET2, FORL_IDX*8+4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5606 \| lwz CARG3, FORL_STOP*8(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5607 \| lwz CARG4, FORL_STOP*8+4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5608 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5609 \| lwz SAVE0, FORL_STEP*8(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5610 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5611 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5612 \|9: // FP loop.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5613 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5614 \| lwzux TMP1, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5615 \| lwz SAVE0, FORL_STEP*8(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5616 \| lwz TMP2, FORL_STOP*8(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5617 \| cmplw cr0, TMP1, TISNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5618 \| cmplw cr7, SAVE0, TISNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5619 \| cmplw cr1, TMP2, TISNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5620 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5621 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5622 \| lfd f1, FORL_IDX*8(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5623 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5624 \| lwz CARG1, FORL_IDX*8(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5625 \| lwz CARG2, FORL_IDX*8+4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5626 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5627 \| crand 4cr0+lt, 4cr0+lt, 4*cr7+lt
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5628 \| crand 4cr0+lt, 4cr0+lt, 4*cr1+lt
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5629 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5630 \| lfd f2, FORL_STOP*8(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5631 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5632 \| lwz CARG3, FORL_STOP*8(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5633 \| lwz CARG4, FORL_STOP*8+4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5634 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5635 \| bge ->vmeta_for
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5636 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5637 \| cmpwi cr6, SAVE0, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5638 if (op != BC_JFORL) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5639 \| srwi RD, RD, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5640 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5641 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5642 \| stfd f1, FORL_EXT*8(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5643 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5644 \| stw CARG1, FORL_EXT*8(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5645 \| stw CARG2, FORL_EXT*8+4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5646 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5647 if (op != BC_JFORL) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5648 \| add RD, PC, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5649 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5650 \|.if FPU
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5651 \| fcmpu cr0, f1, f2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5652 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5653 \| mr SAVE1, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5654 \| blex __ledf2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5655 \| cmpwi CRET1, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5656 \| mr RD, SAVE1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5657 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5658 if (op == BC_JFORI) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5659 \| addis PC, RD, -(BCBIAS_J*4 >> 16)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5660 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5661 \| blt cr6, >5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5662 if (op == BC_FORI) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5663 \| bgt >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5664 } else if (op == BC_IFORL) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5665 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5666 \| bgty <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5667 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5668 \| bgt >2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5669 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5670 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5671 \| addis PC, RD, -(BCBIAS_J*4 >> 16)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5672 } else if (op == BC_JFORI) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5673 \| bley >7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5674 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5675 \| bley =>BC_JLOOP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5676 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5677 \|.if DUALNUM
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5678 \| b <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5679 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5680 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5681 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5682 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5683 \|5: // Negative step.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5684 if (op == BC_FORI) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5685 \| bge <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5686 \|3: // Used by integer loop, too.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5687 \| addis PC, RD, -(BCBIAS_J*4 >> 16)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5688 } else if (op == BC_IFORL) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5689 \| bgey <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5690 } else if (op == BC_JFORI) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5691 \| bgey >7
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5692 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5693 \| bgey =>BC_JLOOP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5694 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5695 \| b <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5696 if (op == BC_JFORI) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5697 \|7:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5698 \| lwz INS, -4(PC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5699 \| decode_RD8 RD, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5700 \| b =>BC_JLOOP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5701 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5702 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5703
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5704 case BC_ITERL:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5705 \|.if JIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5706 \| hotloop
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5707 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5708 \| // Fall through. Assumes BC_IITERL follows.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5709 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5710
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5711 case BC_JITERL:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5712 #if !LJ_HASJIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5713 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5714 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5715 case BC_IITERL:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5716 \| // RA = base*8, RD = target
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5717 \| lwzux TMP1, RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5718 \| lwz TMP2, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5719 \| checknil TMP1; beq >1 // Stop if iterator returned nil.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5720 if (op == BC_JITERL) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5721 \| stw TMP1, -8(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5722 \| stw TMP2, -4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5723 \| b =>BC_JLOOP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5724 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5725 \| branch_RD // Otherwise save control var + branch.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5726 \| stw TMP1, -8(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5727 \| stw TMP2, -4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5728 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5729 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5730 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5731 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5732
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5733 case BC_LOOP:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5734 \| // RA = base*8, RD = target (loop extent)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5735 \| // Note: RA/RD is only used by trace recorder to determine scope/extent
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5736 \| // This opcode does NOT jump, it's only purpose is to detect a hot loop.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5737 \|.if JIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5738 \| hotloop
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5739 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5740 \| // Fall through. Assumes BC_ILOOP follows.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5741 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5742
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5743 case BC_ILOOP:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5744 \| // RA = base*8, RD = target (loop extent)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5745 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5746 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5747
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5748 case BC_JLOOP:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5749 \|.if JIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5750 \| // RA = base8 (ignored), RD = traceno8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5751 \| lwz TMP1, DISPATCH_J(trace)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5752 \| srwi RD, RD, 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5753 \| // Traces on PPC don't store the trace number, so use 0.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5754 \| stw ZERO, DISPATCH_GL(vmstate)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5755 \| lwzx TRACE:TMP2, TMP1, RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5756 \| clrso TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5757 \| lp TMP2, TRACE:TMP2->mcode
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5758 \| stw BASE, DISPATCH_GL(jit_base)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5759 \| mtctr TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5760 \| addi JGL, DISPATCH, GG_DISP2G+32768
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5761 \| stw L, DISPATCH_GL(tmpbuf.L)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5762 \| bctr
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5763 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5764 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5765
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5766 case BC_JMP:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5767 \| // RA = base*8 (only used by trace recorder), RD = target
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5768 \| branch_RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5769 \| ins_next
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5770 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5771
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5772 /* -- Function headers -------------------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5773
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5774 case BC_FUNCF:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5775 \|.if JIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5776 \| hotcall
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5777 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5778 case BC_FUNCV: /* NYI: compiled vararg functions. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5779 \| // Fall through. Assumes BC_IFUNCF/BC_IFUNCV follow.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5780 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5781
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5782 case BC_JFUNCF:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5783 #if !LJ_HASJIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5784 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5785 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5786 case BC_IFUNCF:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5787 \| // BASE = new base, RA = BASE+framesize8, RB = LFUNC, RC = nargs8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5788 \| lwz TMP2, L->maxstack
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5789 \| lbz TMP1, -4+PC2PROTO(numparams)(PC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5790 \| lwz KBASE, -4+PC2PROTO(k)(PC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5791 \| cmplw RA, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5792 \| slwi TMP1, TMP1, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5793 \| bgt ->vm_growstack_l
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5794 if (op != BC_JFUNCF) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5795 \| ins_next1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5796 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5797 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5798 \| cmplw NARGS8:RC, TMP1 // Check for missing parameters.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5799 \| blt >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5800 if (op == BC_JFUNCF) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5801 \| decode_RD8 RD, INS
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5802 \| b =>BC_JLOOP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5803 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5804 \| ins_next2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5805 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5806 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5807 \|3: // Clear missing parameters.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5808 \| stwx TISNIL, BASE, NARGS8:RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5809 \| addi NARGS8:RC, NARGS8:RC, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5810 \| b <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5811 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5812
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5813 case BC_JFUNCV:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5814 #if !LJ_HASJIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5815 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5816 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5817 \| NYI // NYI: compiled vararg functions
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5818 break; /* NYI: compiled vararg functions. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5819
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5820 case BC_IFUNCV:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5821 \| // BASE = new base, RA = BASE+framesize8, RB = LFUNC, RC = nargs8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5822 \| lwz TMP2, L->maxstack
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5823 \| add TMP1, BASE, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5824 \| add TMP0, RA, RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5825 \| stw LFUNC:RB, 4(TMP1) // Store copy of LFUNC.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5826 \| addi TMP3, RC, 8+FRAME_VARG
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5827 \| lwz KBASE, -4+PC2PROTO(k)(PC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5828 \| cmplw TMP0, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5829 \| stw TMP3, 0(TMP1) // Store delta + FRAME_VARG.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5830 \| bge ->vm_growstack_l
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5831 \| lbz TMP2, -4+PC2PROTO(numparams)(PC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5832 \| mr RA, BASE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5833 \| mr RC, TMP1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5834 \| ins_next1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5835 \| cmpwi TMP2, 0
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5836 \| addi BASE, TMP1, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5837 \| beq >3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5838 \|1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5839 \| cmplw RA, RC // Less args than parameters?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5840 \| lwz TMP0, 0(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5841 \| lwz TMP3, 4(RA)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5842 \| bge >4
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5843 \| stw TISNIL, 0(RA) // Clear old fixarg slot (help the GC).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5844 \| addi RA, RA, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5845 \|2:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5846 \| addic. TMP2, TMP2, -1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5847 \| stw TMP0, 8(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5848 \| stw TMP3, 12(TMP1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5849 \| addi TMP1, TMP1, 8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5850 \| bne <1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5851 \|3:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5852 \| ins_next2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5853 \|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5854 \|4: // Clear missing parameters.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5855 \| li TMP0, LJ_TNIL
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5856 \| b <2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5857 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5858
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5859 case BC_FUNCC:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5860 case BC_FUNCCW:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5861 \| // BASE = new base, RA = BASE+framesize8, RB = CFUNC, RC = nargs8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5862 if (op == BC_FUNCC) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5863 \| lp RD, CFUNC:RB->f
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5864 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5865 \| lp RD, DISPATCH_GL(wrapf)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5866 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5867 \| add TMP1, RA, NARGS8:RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5868 \| lwz TMP2, L->maxstack
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5869 \| .toc lp TMP3, 0(RD)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5870 \| add RC, BASE, NARGS8:RC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5871 \| stp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5872 \| cmplw TMP1, TMP2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5873 \| stp RC, L->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5874 \| li_vmstate C
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5875 \|.if TOC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5876 \| mtctr TMP3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5877 \|.else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5878 \| mtctr RD
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5879 \|.endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5880 if (op == BC_FUNCCW) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5881 \| lp CARG2, CFUNC:RB->f
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5882 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5883 \| mr CARG1, L
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5884 \| bgt ->vm_growstack_c // Need to grow stack.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5885 \| .toc lp TOCREG, TOC_OFS(RD)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5886 \| .tocenv lp ENVREG, ENV_OFS(RD)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5887 \| st_vmstate
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5888 \| bctrl // (lua_State *L [, lua_CFunction f])
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5889 \| // Returns nresults.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5890 \| lp BASE, L->base
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5891 \| .toc ld TOCREG, SAVE_TOC
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5892 \| slwi RD, CRET1, 3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5893 \| lp TMP1, L->top
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5894 \| li_vmstate INTERP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5895 \| lwz PC, FRAME_PC(BASE) // Fetch PC of caller.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5896 \| stw L, DISPATCH_GL(cur_L)(DISPATCH)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5897 \| sub RA, TMP1, RD // RA = L->top - nresults*8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5898 \| st_vmstate
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5899 \| b ->vm_returnc
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5900 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5901
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5902 /* ---------------------------------------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5903
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5904 default:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5905 fprintf(stderr, "Error: undefined opcode BC_%s\n", bc_names[op]);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5906 exit(2);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5907 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5908 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5909 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5910
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5911 static int build_backend(BuildCtx *ctx)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5912 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5913 int op;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5914
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5915 dasm_growpc(Dst, BC__MAX);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5916
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5917 build_subroutines(ctx);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5918
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5919 \|.code_op
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5920 for (op = 0; op < BC__MAX; op++)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5921 build_ins(ctx, (BCOp)op, op);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5922
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5923 return BC__MAX;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5924 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5925
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5926 /* Emit pseudo frame-info for all assembler functions. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5927 static void emit_asm_debug(BuildCtx *ctx)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5928 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5929 int fcofs = (int)((uint8_t *)ctx->glob[GLOB_vm_ffi_call] - ctx->code);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5930 int i;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5931 switch (ctx->mode) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5932 case BUILD_elfasm:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5933 fprintf(ctx->fp, "\t.section .debug_frame,\"\",@progbits\n");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5934 fprintf(ctx->fp,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5935 ".Lframe0:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5936 "\t.long .LECIE0-.LSCIE0\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5937 ".LSCIE0:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5938 "\t.long 0xffffffff\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5939 "\t.byte 0x1\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5940 "\t.string \"\"\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5941 "\t.uleb128 0x1\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5942 "\t.sleb128 -4\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5943 "\t.byte 65\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5944 "\t.byte 0xc\n\t.uleb128 1\n\t.uleb128 0\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5945 "\t.align 2\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5946 ".LECIE0:\n\n");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5947 fprintf(ctx->fp,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5948 ".LSFDE0:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5949 "\t.long .LEFDE0-.LASFDE0\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5950 ".LASFDE0:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5951 "\t.long .Lframe0\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5952 "\t.long .Lbegin\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5953 "\t.long %d\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5954 "\t.byte 0xe\n\t.uleb128 %d\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5955 "\t.byte 0x11\n\t.uleb128 65\n\t.sleb128 -1\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5956 "\t.byte 0x5\n\t.uleb128 70\n\t.uleb128 55\n",
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5957 fcofs, CFRAME_SIZE);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5958 for (i = 14; i <= 31; i++)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5959 fprintf(ctx->fp,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5960 "\t.byte %d\n\t.uleb128 %d\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5961 "\t.byte %d\n\t.uleb128 %d\n",
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5962 0x80+i, 37+(31-i), 0x80+32+i, 2+2*(31-i));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5963 fprintf(ctx->fp,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5964 "\t.align 2\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5965 ".LEFDE0:\n\n");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5966 #if LJ_HASFFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5967 fprintf(ctx->fp,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5968 ".LSFDE1:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5969 "\t.long .LEFDE1-.LASFDE1\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5970 ".LASFDE1:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5971 "\t.long .Lframe0\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5972 #if LJ_TARGET_PS3
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5973 "\t.long .lj_vm_ffi_call\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5974 #else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5975 "\t.long lj_vm_ffi_call\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5976 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5977 "\t.long %d\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5978 "\t.byte 0x11\n\t.uleb128 65\n\t.sleb128 -1\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5979 "\t.byte 0x8e\n\t.uleb128 2\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5980 "\t.byte 0xd\n\t.uleb128 0xe\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5981 "\t.align 2\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5982 ".LEFDE1:\n\n", (int)ctx->codesz - fcofs);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5983 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5984 #if !LJ_NO_UNWIND
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5985 fprintf(ctx->fp, "\t.section .eh_frame,\"a\",@progbits\n");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5986 fprintf(ctx->fp,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5987 ".Lframe1:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5988 "\t.long .LECIE1-.LSCIE1\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5989 ".LSCIE1:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5990 "\t.long 0\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5991 "\t.byte 0x1\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5992 "\t.string \"zPR\"\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5993 "\t.uleb128 0x1\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5994 "\t.sleb128 -4\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5995 "\t.byte 65\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5996 "\t.uleb128 6\n" /* augmentation length */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5997 "\t.byte 0x1b\n" /* pcrel\|sdata4 */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5998 "\t.long lj_err_unwind_dwarf-.\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5999 "\t.byte 0x1b\n" /* pcrel\|sdata4 */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6000 "\t.byte 0xc\n\t.uleb128 1\n\t.uleb128 0\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6001 "\t.align 2\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6002 ".LECIE1:\n\n");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6003 fprintf(ctx->fp,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6004 ".LSFDE2:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6005 "\t.long .LEFDE2-.LASFDE2\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6006 ".LASFDE2:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6007 "\t.long .LASFDE2-.Lframe1\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6008 "\t.long .Lbegin-.\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6009 "\t.long %d\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6010 "\t.uleb128 0\n" /* augmentation length */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6011 "\t.byte 0xe\n\t.uleb128 %d\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6012 "\t.byte 0x11\n\t.uleb128 65\n\t.sleb128 -1\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6013 "\t.byte 0x5\n\t.uleb128 70\n\t.uleb128 55\n",
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6014 fcofs, CFRAME_SIZE);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6015 for (i = 14; i <= 31; i++)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6016 fprintf(ctx->fp,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6017 "\t.byte %d\n\t.uleb128 %d\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6018 "\t.byte %d\n\t.uleb128 %d\n",
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6019 0x80+i, 37+(31-i), 0x80+32+i, 2+2*(31-i));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6020 fprintf(ctx->fp,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6021 "\t.align 2\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6022 ".LEFDE2:\n\n");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6023 #if LJ_HASFFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6024 fprintf(ctx->fp,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6025 ".Lframe2:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6026 "\t.long .LECIE2-.LSCIE2\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6027 ".LSCIE2:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6028 "\t.long 0\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6029 "\t.byte 0x1\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6030 "\t.string \"zR\"\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6031 "\t.uleb128 0x1\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6032 "\t.sleb128 -4\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6033 "\t.byte 65\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6034 "\t.uleb128 1\n" /* augmentation length */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6035 "\t.byte 0x1b\n" /* pcrel\|sdata4 */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6036 "\t.byte 0xc\n\t.uleb128 1\n\t.uleb128 0\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6037 "\t.align 2\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6038 ".LECIE2:\n\n");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6039 fprintf(ctx->fp,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6040 ".LSFDE3:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6041 "\t.long .LEFDE3-.LASFDE3\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6042 ".LASFDE3:\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6043 "\t.long .LASFDE3-.Lframe2\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6044 "\t.long lj_vm_ffi_call-.\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6045 "\t.long %d\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6046 "\t.uleb128 0\n" /* augmentation length */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6047 "\t.byte 0x11\n\t.uleb128 65\n\t.sleb128 -1\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6048 "\t.byte 0x8e\n\t.uleb128 2\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6049 "\t.byte 0xd\n\t.uleb128 0xe\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6050 "\t.align 2\n"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6051 ".LEFDE3:\n\n", (int)ctx->codesz - fcofs);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6052 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6053 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6054 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6055 default:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6056 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6057 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6058 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6059

Mercurial

annotate third_party/luajit/src/vm_ppc.dasc @ 279:b3b547563ec7