Mercurial
annotate third_party/luajit/src/lj_target_arm64.h @ 279:b3b547563ec7
Add Google connector service and agent wiki
Implement the C/Seobeo Google Drive and Gmail connector with encrypted OAuth storage, Zenbu authentication, browser testing, AI tool discovery, chunked HTTP decoding, and Bazel coverage. Consolidate repository guidance into progressive wiki documentation and enforce arena-first allocation for new first-party C code.
Co-authored-by: Copilot <[email protected]>
Copilot-Session: 84c338fd-0939-4bb3-b7f3-1062eb213e5d
| author | MrJuneJune <me@mrjunejune.com> |
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| date | Mon, 17 Aug 2026 22:22:36 -0700 |
| parents | 94705b5986b3 |
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| rev | line source |
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1 /* |
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2 ** Definitions for ARM64 CPUs. |
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3 ** Copyright (C) 2005-2023 Mike Pall. See Copyright Notice in luajit.h |
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4 */ |
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5 |
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6 #ifndef _LJ_TARGET_ARM64_H |
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7 #define _LJ_TARGET_ARM64_H |
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8 |
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9 /* -- Registers IDs ------------------------------------------------------- */ |
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10 |
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11 #define GPRDEF(_) \ |
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12 _(X0) _(X1) _(X2) _(X3) _(X4) _(X5) _(X6) _(X7) \ |
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13 _(X8) _(X9) _(X10) _(X11) _(X12) _(X13) _(X14) _(X15) \ |
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14 _(X16) _(X17) _(X18) _(X19) _(X20) _(X21) _(X22) _(X23) \ |
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15 _(X24) _(X25) _(X26) _(X27) _(X28) _(FP) _(LR) _(SP) |
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16 #define FPRDEF(_) \ |
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17 _(D0) _(D1) _(D2) _(D3) _(D4) _(D5) _(D6) _(D7) \ |
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18 _(D8) _(D9) _(D10) _(D11) _(D12) _(D13) _(D14) _(D15) \ |
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19 _(D16) _(D17) _(D18) _(D19) _(D20) _(D21) _(D22) _(D23) \ |
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20 _(D24) _(D25) _(D26) _(D27) _(D28) _(D29) _(D30) _(D31) |
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21 #define VRIDDEF(_) |
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22 |
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23 #define RIDENUM(name) RID_##name, |
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24 |
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25 enum { |
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26 GPRDEF(RIDENUM) /* General-purpose registers (GPRs). */ |
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27 FPRDEF(RIDENUM) /* Floating-point registers (FPRs). */ |
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28 RID_MAX, |
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29 RID_TMP = RID_LR, |
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30 RID_ZERO = RID_SP, |
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31 |
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32 /* Calling conventions. */ |
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33 RID_RET = RID_X0, |
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34 RID_RETLO = RID_X0, |
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35 RID_RETHI = RID_X1, |
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36 RID_FPRET = RID_D0, |
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37 |
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38 /* These definitions must match with the *.dasc file(s): */ |
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39 RID_BASE = RID_X19, /* Interpreter BASE. */ |
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40 RID_LPC = RID_X21, /* Interpreter PC. */ |
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41 RID_GL = RID_X22, /* Interpreter GL. */ |
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42 RID_LREG = RID_X23, /* Interpreter L. */ |
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43 |
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44 /* Register ranges [min, max) and number of registers. */ |
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45 RID_MIN_GPR = RID_X0, |
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46 RID_MAX_GPR = RID_SP+1, |
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47 RID_MIN_FPR = RID_MAX_GPR, |
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48 RID_MAX_FPR = RID_D31+1, |
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49 RID_NUM_GPR = RID_MAX_GPR - RID_MIN_GPR, |
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50 RID_NUM_FPR = RID_MAX_FPR - RID_MIN_FPR |
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51 }; |
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52 |
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53 #define RID_NUM_KREF RID_NUM_GPR |
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54 #define RID_MIN_KREF RID_X0 |
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55 |
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56 /* -- Register sets ------------------------------------------------------- */ |
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57 |
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58 /* Make use of all registers, except for x18, fp, lr and sp. */ |
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59 #define RSET_FIXED \ |
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60 (RID2RSET(RID_X18)|RID2RSET(RID_FP)|RID2RSET(RID_LR)|RID2RSET(RID_SP)|\ |
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61 RID2RSET(RID_GL)) |
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62 #define RSET_GPR (RSET_RANGE(RID_MIN_GPR, RID_MAX_GPR) - RSET_FIXED) |
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63 #define RSET_FPR RSET_RANGE(RID_MIN_FPR, RID_MAX_FPR) |
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64 #define RSET_ALL (RSET_GPR|RSET_FPR) |
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65 #define RSET_INIT RSET_ALL |
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66 |
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67 /* lr is an implicit scratch register. */ |
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68 #define RSET_SCRATCH_GPR (RSET_RANGE(RID_X0, RID_X17+1)) |
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69 #define RSET_SCRATCH_FPR \ |
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70 (RSET_RANGE(RID_D0, RID_D7+1)|RSET_RANGE(RID_D16, RID_D31+1)) |
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71 #define RSET_SCRATCH (RSET_SCRATCH_GPR|RSET_SCRATCH_FPR) |
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72 #define REGARG_FIRSTGPR RID_X0 |
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73 #define REGARG_LASTGPR RID_X7 |
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74 #define REGARG_NUMGPR 8 |
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75 #define REGARG_FIRSTFPR RID_D0 |
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76 #define REGARG_LASTFPR RID_D7 |
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77 #define REGARG_NUMFPR 8 |
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78 |
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79 /* -- Spill slots --------------------------------------------------------- */ |
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80 |
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81 /* Spill slots are 32 bit wide. An even/odd pair is used for FPRs. |
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82 ** |
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83 ** SPS_FIXED: Available fixed spill slots in interpreter frame. |
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84 ** This definition must match with the vm_arm64.dasc file. |
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85 ** Pre-allocate some slots to avoid sp adjust in every root trace. |
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86 ** |
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87 ** SPS_FIRST: First spill slot for general use. Reserve min. two 32 bit slots. |
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88 */ |
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89 #define SPS_FIXED 4 |
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90 #define SPS_FIRST 2 |
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91 |
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92 #define SPOFS_TMP 0 |
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93 |
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94 #define sps_scale(slot) (4 * (int32_t)(slot)) |
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95 #define sps_align(slot) (((slot) - SPS_FIXED + 3) & ~3) |
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96 |
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97 /* -- Exit state ---------------------------------------------------------- */ |
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98 |
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99 /* This definition must match with the *.dasc file(s). */ |
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100 typedef struct { |
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101 lua_Number fpr[RID_NUM_FPR]; /* Floating-point registers. */ |
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102 intptr_t gpr[RID_NUM_GPR]; /* General-purpose registers. */ |
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103 int32_t spill[256]; /* Spill slots. */ |
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104 } ExitState; |
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105 |
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106 /* Highest exit + 1 indicates stack check. */ |
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107 #define EXITSTATE_CHECKEXIT 1 |
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108 |
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109 /* Return the address of a per-trace exit stub. */ |
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110 static LJ_AINLINE uint32_t *exitstub_trace_addr_(uint32_t *p, uint32_t exitno) |
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111 { |
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112 while (*p == (LJ_LE ? 0xd503201f : 0x1f2003d5)) p++; /* Skip A64I_NOP. */ |
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113 return p + 3 + exitno; |
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114 } |
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115 /* Avoid dependence on lj_jit.h if only including lj_target.h. */ |
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116 #define exitstub_trace_addr(T, exitno) \ |
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117 exitstub_trace_addr_((MCode *)((char *)(T)->mcode + (T)->szmcode), (exitno)) |
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118 |
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119 /* -- Instructions -------------------------------------------------------- */ |
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120 |
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121 /* ARM64 instructions are always little-endian. Swap for ARM64BE. */ |
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122 #if LJ_BE |
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123 #define A64I_LE(x) (lj_bswap(x)) |
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124 #else |
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125 #define A64I_LE(x) (x) |
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126 #endif |
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127 |
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128 /* Instruction fields. */ |
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129 #define A64F_D(r) (r) |
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130 #define A64F_N(r) ((r) << 5) |
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131 #define A64F_A(r) ((r) << 10) |
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132 #define A64F_M(r) ((r) << 16) |
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133 #define A64F_IMMS(x) ((x) << 10) |
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134 #define A64F_IMMR(x) ((x) << 16) |
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135 #define A64F_U16(x) ((x) << 5) |
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136 #define A64F_U12(x) ((x) << 10) |
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137 #define A64F_S26(x) (((uint32_t)(x) & 0x03ffffffu)) |
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138 #define A64F_S19(x) (((uint32_t)(x) & 0x7ffffu) << 5) |
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139 #define A64F_S14(x) (((uint32_t)(x) & 0x3fffu) << 5) |
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140 #define A64F_S9(x) ((x) << 12) |
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141 #define A64F_BIT(x) ((x) << 19) |
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142 #define A64F_SH(sh, x) (((sh) << 22) | ((x) << 10)) |
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143 #define A64F_EX(ex) (A64I_EX | ((ex) << 13)) |
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144 #define A64F_EXSH(ex,x) (A64I_EX | ((ex) << 13) | ((x) << 10)) |
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145 #define A64F_FP8(x) ((x) << 13) |
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146 #define A64F_CC(cc) ((cc) << 12) |
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147 #define A64F_LSL16(x) (((x) / 16) << 21) |
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148 #define A64F_BSH(sh) ((sh) << 10) |
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149 |
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150 /* Check for valid field range. */ |
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151 #define A64F_S_OK(x, b) ((((x) + (1 << (b-1))) >> (b)) == 0) |
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152 |
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153 typedef enum A64Ins { |
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154 A64I_S = 0x20000000, |
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155 A64I_X = 0x80000000, |
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156 A64I_EX = 0x00200000, |
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157 A64I_ON = 0x00200000, |
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158 A64I_K12 = 0x1a000000, |
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159 A64I_K13 = 0x18000000, |
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160 A64I_LS_U = 0x01000000, |
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161 A64I_LS_S = 0x00800000, |
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162 A64I_LS_R = 0x01200800, |
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163 A64I_LS_SH = 0x00001000, |
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164 A64I_LS_UXTWx = 0x00004000, |
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165 A64I_LS_SXTWx = 0x0000c000, |
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166 A64I_LS_SXTXx = 0x0000e000, |
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167 A64I_LS_LSLx = 0x00006000, |
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168 |
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169 A64I_ADDw = 0x0b000000, |
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170 A64I_ADDx = 0x8b000000, |
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171 A64I_ADDSw = 0x2b000000, |
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172 A64I_ADDSx = 0xab000000, |
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173 A64I_NEGw = 0x4b0003e0, |
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174 A64I_NEGx = 0xcb0003e0, |
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175 A64I_SUBw = 0x4b000000, |
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176 A64I_SUBx = 0xcb000000, |
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177 A64I_SUBSw = 0x6b000000, |
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178 A64I_SUBSx = 0xeb000000, |
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179 |
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180 A64I_MULw = 0x1b007c00, |
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181 A64I_MULx = 0x9b007c00, |
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182 A64I_SMULL = 0x9b207c00, |
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183 |
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184 A64I_ANDw = 0x0a000000, |
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185 A64I_ANDx = 0x8a000000, |
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186 A64I_ANDSw = 0x6a000000, |
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187 A64I_ANDSx = 0xea000000, |
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188 A64I_EORw = 0x4a000000, |
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189 A64I_EORx = 0xca000000, |
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190 A64I_ORRw = 0x2a000000, |
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191 A64I_ORRx = 0xaa000000, |
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192 A64I_TSTw = 0x6a00001f, |
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193 A64I_TSTx = 0xea00001f, |
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194 |
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195 A64I_CMPw = 0x6b00001f, |
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196 A64I_CMPx = 0xeb00001f, |
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197 A64I_CMNw = 0x2b00001f, |
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198 A64I_CMNx = 0xab00001f, |
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199 A64I_CCMPw = 0x7a400000, |
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200 A64I_CCMPx = 0xfa400000, |
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201 A64I_CSELw = 0x1a800000, |
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202 A64I_CSELx = 0x9a800000, |
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203 |
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204 A64I_ASRw = 0x13007c00, |
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205 A64I_ASRx = 0x9340fc00, |
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206 A64I_LSLx = 0xd3400000, |
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207 A64I_LSRx = 0xd340fc00, |
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208 A64I_SHRw = 0x1ac02000, |
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MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
209 A64I_SHRx = 0x9ac02000, /* lsl/lsr/asr/ror x0, x0, x0 */ |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
210 A64I_REVw = 0x5ac00800, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
211 A64I_REVx = 0xdac00c00, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
212 |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
213 A64I_EXTRw = 0x13800000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
214 A64I_EXTRx = 0x93c00000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
215 A64I_BFMw = 0x33000000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
216 A64I_BFMx = 0xb3400000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
217 A64I_SBFMw = 0x13000000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
218 A64I_SBFMx = 0x93400000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
219 A64I_SXTBw = 0x13001c00, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
220 A64I_SXTHw = 0x13003c00, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
221 A64I_SXTW = 0x93407c00, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
222 A64I_UBFMw = 0x53000000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
223 A64I_UBFMx = 0xd3400000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
224 A64I_UXTBw = 0x53001c00, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
225 A64I_UXTHw = 0x53003c00, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
226 |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
227 A64I_MOVw = 0x2a0003e0, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
228 A64I_MOVx = 0xaa0003e0, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
229 A64I_MVNw = 0x2a2003e0, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
230 A64I_MVNx = 0xaa2003e0, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
231 A64I_MOVKw = 0x72800000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
232 A64I_MOVKx = 0xf2800000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
233 A64I_MOVZw = 0x52800000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
234 A64I_MOVZx = 0xd2800000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
235 A64I_MOVNw = 0x12800000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
236 A64I_MOVNx = 0x92800000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
237 |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
238 A64I_LDRB = 0x39400000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
239 A64I_LDRH = 0x79400000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
240 A64I_LDRw = 0xb9400000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
241 A64I_LDRx = 0xf9400000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
242 A64I_LDRLw = 0x18000000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
243 A64I_LDRLx = 0x58000000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
244 A64I_STRB = 0x39000000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
245 A64I_STRH = 0x79000000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
246 A64I_STRw = 0xb9000000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
247 A64I_STRx = 0xf9000000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
248 A64I_STPw = 0x29000000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
249 A64I_STPx = 0xa9000000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
250 A64I_LDPw = 0x29400000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
251 A64I_LDPx = 0xa9400000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
252 |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
253 A64I_B = 0x14000000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
254 A64I_BCC = 0x54000000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
255 A64I_BL = 0x94000000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
256 A64I_BR = 0xd61f0000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
257 A64I_BLR = 0xd63f0000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
258 A64I_TBZ = 0x36000000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
259 A64I_TBNZ = 0x37000000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
260 A64I_CBZ = 0x34000000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
261 A64I_CBNZ = 0x35000000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
262 |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
263 A64I_BRAAZ = 0xd61f081f, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
264 A64I_BLRAAZ = 0xd63f081f, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
265 |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
266 A64I_NOP = 0xd503201f, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
267 |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
268 /* FP */ |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
269 A64I_FADDd = 0x1e602800, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
270 A64I_FSUBd = 0x1e603800, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
271 A64I_FMADDd = 0x1f400000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
272 A64I_FMSUBd = 0x1f408000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
273 A64I_FNMADDd = 0x1f600000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
274 A64I_FNMSUBd = 0x1f608000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
275 A64I_FMULd = 0x1e600800, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
276 A64I_FDIVd = 0x1e601800, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
277 A64I_FNEGd = 0x1e614000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
278 A64I_FABS = 0x1e60c000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
279 A64I_FSQRTd = 0x1e61c000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
280 A64I_LDRs = 0xbd400000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
281 A64I_LDRd = 0xfd400000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
282 A64I_STRs = 0xbd000000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
283 A64I_STRd = 0xfd000000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
284 A64I_LDPs = 0x2d400000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
285 A64I_LDPd = 0x6d400000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
286 A64I_STPs = 0x2d000000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
287 A64I_STPd = 0x6d000000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
288 A64I_FCMPd = 0x1e602000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
289 A64I_FCMPZd = 0x1e602008, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
290 A64I_FCSELd = 0x1e600c00, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
291 A64I_FRINTMd = 0x1e654000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
292 A64I_FRINTPd = 0x1e64c000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
293 A64I_FRINTZd = 0x1e65c000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
294 |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
295 A64I_FCVT_F32_F64 = 0x1e624000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
296 A64I_FCVT_F64_F32 = 0x1e22c000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
297 A64I_FCVT_F32_S32 = 0x1e220000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
298 A64I_FCVT_F64_S32 = 0x1e620000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
299 A64I_FCVT_F32_U32 = 0x1e230000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
300 A64I_FCVT_F64_U32 = 0x1e630000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
301 A64I_FCVT_F32_S64 = 0x9e220000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
302 A64I_FCVT_F64_S64 = 0x9e620000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
303 A64I_FCVT_F32_U64 = 0x9e230000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
304 A64I_FCVT_F64_U64 = 0x9e630000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
305 A64I_FCVT_S32_F64 = 0x1e780000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
306 A64I_FCVT_S32_F32 = 0x1e380000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
307 A64I_FCVT_U32_F64 = 0x1e790000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
308 A64I_FCVT_U32_F32 = 0x1e390000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
309 A64I_FCVT_S64_F64 = 0x9e780000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
310 A64I_FCVT_S64_F32 = 0x9e380000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
311 A64I_FCVT_U64_F64 = 0x9e790000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
312 A64I_FCVT_U64_F32 = 0x9e390000, |
|
94705b5986b3
[ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff
changeset
|
313 |
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314 A64I_FMOV_S = 0x1e204000, |
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315 A64I_FMOV_D = 0x1e604000, |
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316 A64I_FMOV_R_S = 0x1e260000, |
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317 A64I_FMOV_S_R = 0x1e270000, |
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318 A64I_FMOV_R_D = 0x9e660000, |
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319 A64I_FMOV_D_R = 0x9e670000, |
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320 A64I_FMOV_DI = 0x1e601000, |
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321 } A64Ins; |
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322 |
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323 #define A64I_BR_AUTH (LJ_ABI_PAUTH ? A64I_BRAAZ : A64I_BR) |
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324 #define A64I_BLR_AUTH (LJ_ABI_PAUTH ? A64I_BLRAAZ : A64I_BLR) |
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325 |
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326 typedef enum A64Shift { |
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327 A64SH_LSL, A64SH_LSR, A64SH_ASR, A64SH_ROR |
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328 } A64Shift; |
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329 |
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330 typedef enum A64Extend { |
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331 A64EX_UXTB, A64EX_UXTH, A64EX_UXTW, A64EX_UXTX, |
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332 A64EX_SXTB, A64EX_SXTH, A64EX_SXTW, A64EX_SXTX, |
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333 } A64Extend; |
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334 |
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335 /* ARM condition codes. */ |
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336 typedef enum A64CC { |
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337 CC_EQ, CC_NE, CC_CS, CC_CC, CC_MI, CC_PL, CC_VS, CC_VC, |
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338 CC_HI, CC_LS, CC_GE, CC_LT, CC_GT, CC_LE, CC_AL, |
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339 CC_HS = CC_CS, CC_LO = CC_CC |
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340 } A64CC; |
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341 |
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342 #endif |