/home/mrjunejune/zenbu: third_party/luajit/src/lj

annotate third_party/luajit/src/lj_record.c @ 186:8cf4ec5e2191 hg-web

Fixed merge conflict.

author	MrJuneJune <me@mrjunejune.com>
date	Fri, 23 Jan 2026 22:38:59 -0800
parents	94705b5986b3
children

rev	line source
178 94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1 /*
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2 ** Trace recorder (bytecode -> SSA IR).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	3 ** Copyright (C) 2005-2023 Mike Pall. See Copyright Notice in luajit.h
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	4 */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	5
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	6 #define lj_record_c
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	7 #define LUA_CORE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	8
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	9 #include "lj_obj.h"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	10
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	11 #if LJ_HASJIT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	12
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	13 #include "lj_err.h"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	14 #include "lj_str.h"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	15 #include "lj_tab.h"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	16 #include "lj_meta.h"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	17 #include "lj_frame.h"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	18 #if LJ_HASFFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	19 #include "lj_ctype.h"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	20 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	21 #include "lj_bc.h"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	22 #include "lj_ff.h"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	23 #if LJ_HASPROFILE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	24 #include "lj_debug.h"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	25 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	26 #include "lj_ir.h"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	27 #include "lj_jit.h"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	28 #include "lj_ircall.h"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	29 #include "lj_iropt.h"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	30 #include "lj_trace.h"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	31 #include "lj_record.h"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	32 #include "lj_ffrecord.h"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	33 #include "lj_snap.h"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	34 #include "lj_dispatch.h"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	35 #include "lj_vm.h"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	36 #include "lj_prng.h"
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	37
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	38 /* Some local macros to save typing. Undef'd at the end. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	39 #define IR(ref) (&J->cur.ir[(ref)])
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	40
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	41 /* Pass IR on to next optimization in chain (FOLD). */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	42 #define emitir(ot, a, b) (lj_ir_set(J, (ot), (a), (b)), lj_opt_fold(J))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	43
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	44 /* Emit raw IR without passing through optimizations. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	45 #define emitir_raw(ot, a, b) (lj_ir_set(J, (ot), (a), (b)), lj_ir_emit(J))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	46
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	47 /* -- Sanity checks ------------------------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	48
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	49 #ifdef LUA_USE_ASSERT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	50 /* Sanity check the whole IR -- sloooow. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	51 static void rec_check_ir(jit_State *J)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	52 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	53 IRRef i, nins = J->cur.nins, nk = J->cur.nk;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	54 lj_assertJ(nk <= REF_BIAS && nins >= REF_BIAS && nins < 65536,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	55 "inconsistent IR layout");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	56 for (i = nk; i < nins; i++) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	57 IRIns *ir = IR(i);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	58 uint32_t mode = lj_ir_mode[ir->o];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	59 IRRef op1 = ir->op1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	60 IRRef op2 = ir->op2;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	61 const char *err = NULL;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	62 switch (irm_op1(mode)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	63 case IRMnone:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	64 if (op1 != 0) err = "IRMnone op1 used";
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	65 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	66 case IRMref:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	67 if (op1 < nk \|\| (i >= REF_BIAS ? op1 >= i : op1 <= i))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	68 err = "IRMref op1 out of range";
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	69 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	70 case IRMlit: break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	71 case IRMcst:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	72 if (i >= REF_BIAS) { err = "constant in IR range"; break; }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	73 if (irt_is64(ir->t) && ir->o != IR_KNULL)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	74 i++;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	75 continue;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	76 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	77 switch (irm_op2(mode)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	78 case IRMnone:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	79 if (op2) err = "IRMnone op2 used";
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	80 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	81 case IRMref:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	82 if (op2 < nk \|\| (i >= REF_BIAS ? op2 >= i : op2 <= i))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	83 err = "IRMref op2 out of range";
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	84 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	85 case IRMlit: break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	86 case IRMcst: err = "IRMcst op2"; break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	87 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	88 if (!err && ir->prev) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	89 if (ir->prev < nk \|\| (i >= REF_BIAS ? ir->prev >= i : ir->prev <= i))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	90 err = "chain out of range";
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	91 else if (ir->o != IR_NOP && IR(ir->prev)->o != ir->o)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	92 err = "chain to different op";
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	93 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	94 lj_assertJ(!err, "bad IR %04d op %d(%04d,%04d): %s",
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	95 i-REF_BIAS,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	96 ir->o,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	97 irm_op1(mode) == IRMref ? op1-REF_BIAS : op1,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	98 irm_op2(mode) == IRMref ? op2-REF_BIAS : op2,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	99 err);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	100 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	101 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	102
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	103 /* Compare stack slots and frames of the recorder and the VM. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	104 static void rec_check_slots(jit_State *J)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	105 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	106 BCReg s, nslots = J->baseslot + J->maxslot;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	107 int32_t depth = 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	108 cTValue *base = J->L->base - J->baseslot;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	109 lj_assertJ(J->baseslot >= 1+LJ_FR2, "bad baseslot");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	110 lj_assertJ(J->baseslot == 1+LJ_FR2 \|\| (J->slot[J->baseslot-1] & TREF_FRAME),
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	111 "baseslot does not point to frame");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	112 lj_assertJ(nslots <= LJ_MAX_JSLOTS, "slot overflow");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	113 for (s = 0; s < nslots; s++) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	114 TRef tr = J->slot[s];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	115 if (tr) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	116 cTValue *tv = &base[s];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	117 IRRef ref = tref_ref(tr);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	118 IRIns ir = NULL; / Silence compiler. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	119 lj_assertJ(tv < J->L->top, "slot %d above top of Lua stack", s);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	120 if (!LJ_FR2 \|\| ref \|\| !(tr & (TREF_FRAME \| TREF_CONT))) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	121 lj_assertJ(ref >= J->cur.nk && ref < J->cur.nins,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	122 "slot %d ref %04d out of range", s, ref - REF_BIAS);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	123 ir = IR(ref);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	124 lj_assertJ(irt_t(ir->t) == tref_t(tr), "slot %d IR type mismatch", s);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	125 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	126 if (s == 0) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	127 lj_assertJ(tref_isfunc(tr), "frame slot 0 is not a function");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	128 #if LJ_FR2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	129 } else if (s == 1) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	130 lj_assertJ((tr & ~TREF_FRAME) == 0, "bad frame slot 1");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	131 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	132 } else if ((tr & TREF_FRAME)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	133 GCfunc *fn = gco2func(frame_gc(tv));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	134 BCReg delta = (BCReg)(tv - frame_prev(tv));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	135 #if LJ_FR2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	136 lj_assertJ(!ref \|\| ir_knum(ir)->u64 == tv->u64,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	137 "frame slot %d PC mismatch", s);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	138 tr = J->slot[s-1];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	139 ir = IR(tref_ref(tr));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	140 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	141 lj_assertJ(tref_isfunc(tr),
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	142 "frame slot %d is not a function", s-LJ_FR2);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	143 lj_assertJ(!tref_isk(tr) \|\| fn == ir_kfunc(ir),
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	144 "frame slot %d function mismatch", s-LJ_FR2);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	145 lj_assertJ(s > delta + LJ_FR2 ? (J->slot[s-delta] & TREF_FRAME)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	146 : (s == delta + LJ_FR2),
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	147 "frame slot %d broken chain", s-LJ_FR2);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	148 depth++;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	149 } else if ((tr & TREF_CONT)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	150 #if LJ_FR2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	151 lj_assertJ(!ref \|\| ir_knum(ir)->u64 == tv->u64,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	152 "cont slot %d continuation mismatch", s);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	153 #else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	154 lj_assertJ(ir_kptr(ir) == gcrefp(tv->gcr, void),
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	155 "cont slot %d continuation mismatch", s);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	156 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	157 lj_assertJ((J->slot[s+1+LJ_FR2] & TREF_FRAME),
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	158 "cont slot %d not followed by frame", s);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	159 depth++;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	160 } else if ((tr & TREF_KEYINDEX)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	161 lj_assertJ(tref_isint(tr), "keyindex slot %d bad type %d",
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	162 s, tref_type(tr));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	163 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	164 /* Number repr. may differ, but other types must be the same. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	165 lj_assertJ(tvisnumber(tv) ? tref_isnumber(tr) :
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	166 itype2irt(tv) == tref_type(tr),
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	167 "slot %d type mismatch: stack type %d vs IR type %d",
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	168 s, itypemap(tv), tref_type(tr));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	169 if (tref_isk(tr)) { /* Compare constants. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	170 TValue tvk;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	171 lj_ir_kvalue(J->L, &tvk, ir);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	172 lj_assertJ((tvisnum(&tvk) && tvisnan(&tvk)) ?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	173 (tvisnum(tv) && tvisnan(tv)) :
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	174 lj_obj_equal(tv, &tvk),
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	175 "slot %d const mismatch: stack %016llx vs IR %016llx",
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	176 s, tv->u64, tvk.u64);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	177 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	178 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	179 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	180 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	181 lj_assertJ(J->framedepth == depth,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	182 "frame depth mismatch %d vs %d", J->framedepth, depth);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	183 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	184 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	185
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	186 /* -- Type handling and specialization ------------------------------------ */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	187
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	188 /* Note: these functions return tagged references (TRef). */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	189
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	190 /* Specialize a slot to a specific type. Note: slot can be negative! */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	191 static TRef sloadt(jit_State *J, int32_t slot, IRType t, int mode)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	192 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	193 /* Caller may set IRT_GUARD in t. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	194 TRef ref = emitir_raw(IRT(IR_SLOAD, t), (int32_t)J->baseslot+slot, mode);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	195 J->base[slot] = ref;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	196 return ref;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	197 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	198
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	199 /* Specialize a slot to the runtime type. Note: slot can be negative! */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	200 static TRef sload(jit_State *J, int32_t slot)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	201 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	202 IRType t = itype2irt(&J->L->base[slot]);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	203 TRef ref = emitir_raw(IRTG(IR_SLOAD, t), (int32_t)J->baseslot+slot,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	204 IRSLOAD_TYPECHECK);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	205 if (irtype_ispri(t)) ref = TREF_PRI(t); /* Canonicalize primitive refs. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	206 J->base[slot] = ref;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	207 return ref;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	208 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	209
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	210 /* Get TRef from slot. Load slot and specialize if not done already. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	211 #define getslot(J, s) (J->base[(s)] ? J->base[(s)] : sload(J, (int32_t)(s)))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	212
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	213 /* Get TRef for current function. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	214 static TRef getcurrf(jit_State *J)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	215 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	216 if (J->base[-1-LJ_FR2])
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	217 return J->base[-1-LJ_FR2];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	218 /* Non-base frame functions ought to be loaded already. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	219 lj_assertJ(J->baseslot == 1+LJ_FR2, "bad baseslot");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	220 return sloadt(J, -1-LJ_FR2, IRT_FUNC, IRSLOAD_READONLY);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	221 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	222
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	223 /* Compare for raw object equality.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	224 ** Returns 0 if the objects are the same.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	225 ** Returns 1 if they are different, but the same type.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	226 ** Returns 2 for two different types.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	227 ** Comparisons between primitives always return 1 -- no caller cares about it.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	228 */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	229 int lj_record_objcmp(jit_State J, TRef a, TRef b, cTValue av, cTValue *bv)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	230 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	231 int diff = !lj_obj_equal(av, bv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	232 if (!tref_isk2(a, b)) { /* Shortcut, also handles primitives. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	233 IRType ta = tref_isinteger(a) ? IRT_INT : tref_type(a);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	234 IRType tb = tref_isinteger(b) ? IRT_INT : tref_type(b);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	235 if (ta != tb) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	236 /* Widen mixed number/int comparisons to number/number comparison. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	237 if (ta == IRT_INT && tb == IRT_NUM) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	238 a = emitir(IRTN(IR_CONV), a, IRCONV_NUM_INT);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	239 ta = IRT_NUM;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	240 } else if (ta == IRT_NUM && tb == IRT_INT) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	241 b = emitir(IRTN(IR_CONV), b, IRCONV_NUM_INT);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	242 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	243 return 2; /* Two different types are never equal. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	244 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	245 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	246 emitir(IRTG(diff ? IR_NE : IR_EQ, ta), a, b);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	247 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	248 return diff;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	249 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	250
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	251 /* Constify a value. Returns 0 for non-representable object types. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	252 TRef lj_record_constify(jit_State J, cTValue o)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	253 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	254 if (tvisgcv(o))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	255 return lj_ir_kgc(J, gcV(o), itype2irt(o));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	256 else if (tvisint(o))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	257 return lj_ir_kint(J, intV(o));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	258 else if (tvisnum(o))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	259 return lj_ir_knumint(J, numV(o));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	260 else if (tvisbool(o))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	261 return TREF_PRI(itype2irt(o));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	262 else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	263 return 0; /* Can't represent lightuserdata (pointless). */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	264 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	265
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	266 /* Emit a VLOAD with the correct type. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	267 TRef lj_record_vload(jit_State *J, TRef ref, MSize idx, IRType t)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	268 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	269 TRef tr = emitir(IRTG(IR_VLOAD, t), ref, idx);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	270 if (irtype_ispri(t)) tr = TREF_PRI(t); /* Canonicalize primitives. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	271 return tr;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	272 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	273
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	274 /* -- Record loop ops ----------------------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	275
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	276 /* Loop event. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	277 typedef enum {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	278 LOOPEV_LEAVE, /* Loop is left or not entered. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	279 LOOPEV_ENTERLO, /* Loop is entered with a low iteration count left. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	280 LOOPEV_ENTER /* Loop is entered. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	281 } LoopEvent;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	282
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	283 /* Canonicalize slots: convert integers to numbers. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	284 static void canonicalize_slots(jit_State *J)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	285 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	286 BCReg s;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	287 if (LJ_DUALNUM) return;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	288 for (s = J->baseslot+J->maxslot-1; s >= 1; s--) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	289 TRef tr = J->slot[s];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	290 if (tref_isinteger(tr) && !(tr & TREF_KEYINDEX)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	291 IRIns *ir = IR(tref_ref(tr));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	292 if (!(ir->o == IR_SLOAD && (ir->op2 & (IRSLOAD_READONLY))))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	293 J->slot[s] = emitir(IRTN(IR_CONV), tr, IRCONV_NUM_INT);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	294 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	295 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	296 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	297
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	298 /* Stop recording. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	299 void lj_record_stop(jit_State *J, TraceLink linktype, TraceNo lnk)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	300 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	301 #ifdef LUAJIT_ENABLE_TABLE_BUMP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	302 if (J->retryrec)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	303 lj_trace_err(J, LJ_TRERR_RETRY);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	304 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	305 lj_trace_end(J);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	306 J->cur.linktype = (uint8_t)linktype;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	307 J->cur.link = (uint16_t)lnk;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	308 /* Looping back at the same stack level? */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	309 if (lnk == J->cur.traceno && J->framedepth + J->retdepth == 0) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	310 if ((J->flags & JIT_F_OPT_LOOP)) /* Shall we try to create a loop? */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	311 goto nocanon; /* Do not canonicalize or we lose the narrowing. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	312 if (J->cur.root) /* Otherwise ensure we always link to the root trace. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	313 J->cur.link = J->cur.root;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	314 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	315 canonicalize_slots(J);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	316 nocanon:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	317 /* Note: all loop ops must set J->pc to the following instruction! */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	318 lj_snap_add(J); /* Add loop snapshot. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	319 J->needsnap = 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	320 J->mergesnap = 1; /* In case recording continues. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	321 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	322
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	323 /* Search bytecode backwards for a int/num constant slot initializer. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	324 static TRef find_kinit(jit_State J, const BCIns endpc, BCReg slot, IRType t)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	325 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	326 /* This algorithm is rather simplistic and assumes quite a bit about
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	327 ** how the bytecode is generated. It works fine for FORI initializers,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	328 ** but it won't necessarily work in other cases (e.g. iterator arguments).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	329 ** It doesn't do anything fancy, either (like backpropagating MOVs).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	330 */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	331 const BCIns pc, startpc = proto_bc(J->pt);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	332 for (pc = endpc-1; pc > startpc; pc--) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	333 BCIns ins = *pc;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	334 BCOp op = bc_op(ins);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	335 /* First try to find the last instruction that stores to this slot. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	336 if (bcmode_a(op) == BCMbase && bc_a(ins) <= slot) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	337 return 0; /* Multiple results, e.g. from a CALL or KNIL. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	338 } else if (bcmode_a(op) == BCMdst && bc_a(ins) == slot) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	339 if (op == BC_KSHORT \|\| op == BC_KNUM) { /* Found const. initializer. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	340 /* Now try to verify there's no forward jump across it. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	341 const BCIns *kpc = pc;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	342 for (; pc > startpc; pc--)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	343 if (bc_op(*pc) == BC_JMP) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	344 const BCIns target = pc+bc_j(pc)+1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	345 if (target > kpc && target <= endpc)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	346 return 0; /* Conditional assignment. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	347 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	348 if (op == BC_KSHORT) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	349 int32_t k = (int32_t)(int16_t)bc_d(ins);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	350 return t == IRT_INT ? lj_ir_kint(J, k) : lj_ir_knum(J, (lua_Number)k);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	351 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	352 cTValue *tv = proto_knumtv(J->pt, bc_d(ins));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	353 if (t == IRT_INT) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	354 int32_t k = numberVint(tv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	355 if (tvisint(tv) \|\| numV(tv) == (lua_Number)k) /* -0 is ok here. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	356 return lj_ir_kint(J, k);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	357 return 0; /* Type mismatch. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	358 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	359 return lj_ir_knum(J, numberVnum(tv));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	360 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	361 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	362 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	363 return 0; /* Non-constant initializer. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	364 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	365 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	366 return 0; /* No assignment to this slot found? */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	367 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	368
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	369 /* Load and optionally convert a FORI argument from a slot. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	370 static TRef fori_load(jit_State *J, BCReg slot, IRType t, int mode)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	371 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	372 int conv = (tvisint(&J->L->base[slot]) != (t==IRT_INT)) ? IRSLOAD_CONVERT : 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	373 return sloadt(J, (int32_t)slot,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	374 t + (((mode & IRSLOAD_TYPECHECK) \|\|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	375 (conv && t == IRT_INT && !(mode >> 16))) ?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	376 IRT_GUARD : 0),
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	377 mode + conv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	378 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	379
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	380 /* Peek before FORI to find a const initializer. Otherwise load from slot. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	381 static TRef fori_arg(jit_State J, const BCIns fori, BCReg slot,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	382 IRType t, int mode)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	383 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	384 TRef tr = J->base[slot];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	385 if (!tr) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	386 tr = find_kinit(J, fori, slot, t);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	387 if (!tr)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	388 tr = fori_load(J, slot, t, mode);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	389 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	390 return tr;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	391 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	392
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	393 /* Return the direction of the FOR loop iterator.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	394 ** It's important to exactly reproduce the semantics of the interpreter.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	395 */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	396 static int rec_for_direction(cTValue *o)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	397 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	398 return (tvisint(o) ? intV(o) : (int32_t)o->u32.hi) >= 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	399 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	400
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	401 /* Simulate the runtime behavior of the FOR loop iterator. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	402 static LoopEvent rec_for_iter(IROp op, cTValue o, int isforl)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	403 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	404 lua_Number stopv = numberVnum(&o[FORL_STOP]);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	405 lua_Number idxv = numberVnum(&o[FORL_IDX]);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	406 lua_Number stepv = numberVnum(&o[FORL_STEP]);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	407 if (isforl)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	408 idxv += stepv;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	409 if (rec_for_direction(&o[FORL_STEP])) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	410 if (idxv <= stopv) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	411 *op = IR_LE;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	412 return idxv + 2*stepv > stopv ? LOOPEV_ENTERLO : LOOPEV_ENTER;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	413 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	414 *op = IR_GT; return LOOPEV_LEAVE;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	415 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	416 if (stopv <= idxv) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	417 *op = IR_GE;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	418 return idxv + 2*stepv < stopv ? LOOPEV_ENTERLO : LOOPEV_ENTER;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	419 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	420 *op = IR_LT; return LOOPEV_LEAVE;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	421 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	422 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	423
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	424 /* Record checks for FOR loop overflow and step direction. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	425 static void rec_for_check(jit_State *J, IRType t, int dir,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	426 TRef stop, TRef step, int init)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	427 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	428 if (!tref_isk(step)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	429 /* Non-constant step: need a guard for the direction. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	430 TRef zero = (t == IRT_INT) ? lj_ir_kint(J, 0) : lj_ir_knum_zero(J);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	431 emitir(IRTG(dir ? IR_GE : IR_LT, t), step, zero);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	432 /* Add hoistable overflow checks for a narrowed FORL index. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	433 if (init && t == IRT_INT) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	434 if (tref_isk(stop)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	435 /* Constant stop: optimize check away or to a range check for step. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	436 int32_t k = IR(tref_ref(stop))->i;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	437 if (dir) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	438 if (k > 0)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	439 emitir(IRTGI(IR_LE), step, lj_ir_kint(J, (int32_t)0x7fffffff-k));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	440 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	441 if (k < 0)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	442 emitir(IRTGI(IR_GE), step, lj_ir_kint(J, (int32_t)0x80000000-k));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	443 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	444 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	445 /* Stop+step variable: need full overflow check. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	446 TRef tr = emitir(IRTGI(IR_ADDOV), step, stop);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	447 emitir(IRTI(IR_USE), tr, 0); /* ADDOV is weak. Avoid dead result. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	448 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	449 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	450 } else if (init && t == IRT_INT && !tref_isk(stop)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	451 /* Constant step: optimize overflow check to a range check for stop. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	452 int32_t k = IR(tref_ref(step))->i;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	453 k = (int32_t)(dir ? 0x7fffffff : 0x80000000) - k;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	454 emitir(IRTGI(dir ? IR_LE : IR_GE), stop, lj_ir_kint(J, k));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	455 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	456 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	457
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	458 /* Record a FORL instruction. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	459 static void rec_for_loop(jit_State J, const BCIns fori, ScEvEntry *scev,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	460 int init)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	461 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	462 BCReg ra = bc_a(*fori);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	463 cTValue *tv = &J->L->base[ra];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	464 TRef idx = J->base[ra+FORL_IDX];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	465 IRType t = idx ? tref_type(idx) :
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	466 (init \|\| LJ_DUALNUM) ? lj_opt_narrow_forl(J, tv) : IRT_NUM;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	467 int mode = IRSLOAD_INHERIT +
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	468 ((!LJ_DUALNUM \|\| tvisint(tv) == (t == IRT_INT)) ? IRSLOAD_READONLY : 0);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	469 TRef stop = fori_arg(J, fori, ra+FORL_STOP, t, mode);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	470 TRef step = fori_arg(J, fori, ra+FORL_STEP, t, mode);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	471 int tc, dir = rec_for_direction(&tv[FORL_STEP]);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	472 lj_assertJ(bc_op(fori) == BC_FORI \|\| bc_op(fori) == BC_JFORI,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	473 "bad bytecode %d instead of FORI/JFORI", bc_op(*fori));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	474 scev->t.irt = t;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	475 scev->dir = dir;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	476 scev->stop = tref_ref(stop);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	477 scev->step = tref_ref(step);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	478 rec_for_check(J, t, dir, stop, step, init);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	479 scev->start = tref_ref(find_kinit(J, fori, ra+FORL_IDX, IRT_INT));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	480 tc = (LJ_DUALNUM &&
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	481 !(scev->start && irref_isk(scev->stop) && irref_isk(scev->step) &&
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	482 tvisint(&tv[FORL_IDX]) == (t == IRT_INT))) ?
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	483 IRSLOAD_TYPECHECK : 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	484 if (tc) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	485 J->base[ra+FORL_STOP] = stop;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	486 J->base[ra+FORL_STEP] = step;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	487 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	488 if (!idx)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	489 idx = fori_load(J, ra+FORL_IDX, t,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	490 IRSLOAD_INHERIT + tc + (J->scev.start << 16));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	491 if (!init)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	492 J->base[ra+FORL_IDX] = idx = emitir(IRT(IR_ADD, t), idx, step);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	493 J->base[ra+FORL_EXT] = idx;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	494 scev->idx = tref_ref(idx);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	495 setmref(scev->pc, fori);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	496 J->maxslot = ra+FORL_EXT+1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	497 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	498
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	499 /* Record FORL/JFORL or FORI/JFORI. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	500 static LoopEvent rec_for(jit_State J, const BCIns fori, int isforl)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	501 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	502 BCReg ra = bc_a(*fori);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	503 TValue *tv = &J->L->base[ra];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	504 TRef *tr = &J->base[ra];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	505 IROp op;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	506 LoopEvent ev;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	507 TRef stop;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	508 IRType t;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	509 if (isforl) { /* Handle FORL/JFORL opcodes. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	510 TRef idx = tr[FORL_IDX];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	511 if (mref(J->scev.pc, const BCIns) == fori && tref_ref(idx) == J->scev.idx) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	512 t = J->scev.t.irt;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	513 stop = J->scev.stop;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	514 idx = emitir(IRT(IR_ADD, t), idx, J->scev.step);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	515 tr[FORL_EXT] = tr[FORL_IDX] = idx;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	516 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	517 ScEvEntry scev;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	518 rec_for_loop(J, fori, &scev, 0);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	519 t = scev.t.irt;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	520 stop = scev.stop;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	521 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	522 } else { /* Handle FORI/JFORI opcodes. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	523 BCReg i;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	524 lj_meta_for(J->L, tv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	525 t = (LJ_DUALNUM \|\| tref_isint(tr[FORL_IDX])) ? lj_opt_narrow_forl(J, tv) :
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	526 IRT_NUM;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	527 for (i = FORL_IDX; i <= FORL_STEP; i++) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	528 if (!tr[i]) sload(J, ra+i);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	529 lj_assertJ(tref_isnumber_str(tr[i]), "bad FORI argument type");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	530 if (tref_isstr(tr[i]))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	531 tr[i] = emitir(IRTG(IR_STRTO, IRT_NUM), tr[i], 0);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	532 if (t == IRT_INT) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	533 if (!tref_isinteger(tr[i]))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	534 tr[i] = emitir(IRTGI(IR_CONV), tr[i], IRCONV_INT_NUM\|IRCONV_CHECK);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	535 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	536 if (!tref_isnum(tr[i]))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	537 tr[i] = emitir(IRTN(IR_CONV), tr[i], IRCONV_NUM_INT);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	538 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	539 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	540 tr[FORL_EXT] = tr[FORL_IDX];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	541 stop = tr[FORL_STOP];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	542 rec_for_check(J, t, rec_for_direction(&tv[FORL_STEP]),
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	543 stop, tr[FORL_STEP], 1);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	544 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	545
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	546 ev = rec_for_iter(&op, tv, isforl);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	547 if (ev == LOOPEV_LEAVE) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	548 J->maxslot = ra+FORL_EXT+1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	549 J->pc = fori+1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	550 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	551 J->maxslot = ra;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	552 J->pc = fori+bc_j(*fori)+1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	553 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	554 lj_snap_add(J);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	555
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	556 emitir(IRTG(op, t), tr[FORL_IDX], stop);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	557
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	558 if (ev == LOOPEV_LEAVE) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	559 J->maxslot = ra;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	560 J->pc = fori+bc_j(*fori)+1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	561 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	562 J->maxslot = ra+FORL_EXT+1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	563 J->pc = fori+1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	564 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	565 J->needsnap = 1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	566 return ev;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	567 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	568
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	569 /* Record ITERL/JITERL. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	570 static LoopEvent rec_iterl(jit_State *J, const BCIns iterins)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	571 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	572 BCReg ra = bc_a(iterins);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	573 if (!tref_isnil(getslot(J, ra))) { /* Looping back? */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	574 J->base[ra-1] = J->base[ra]; /* Copy result of ITERC to control var. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	575 J->maxslot = ra-1+bc_b(J->pc[-1]);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	576 J->pc += bc_j(iterins)+1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	577 return LOOPEV_ENTER;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	578 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	579 J->maxslot = ra-3;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	580 J->pc++;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	581 return LOOPEV_LEAVE;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	582 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	583 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	584
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	585 /* Record LOOP/JLOOP. Now, that was easy. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	586 static LoopEvent rec_loop(jit_State *J, BCReg ra, int skip)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	587 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	588 if (ra < J->maxslot) J->maxslot = ra;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	589 J->pc += skip;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	590 return LOOPEV_ENTER;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	591 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	592
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	593 /* Check if a loop repeatedly failed to trace because it didn't loop back. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	594 static int innerloopleft(jit_State J, const BCIns pc)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	595 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	596 ptrdiff_t i;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	597 for (i = 0; i < PENALTY_SLOTS; i++)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	598 if (mref(J->penalty[i].pc, const BCIns) == pc) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	599 if ((J->penalty[i].reason == LJ_TRERR_LLEAVE \|\|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	600 J->penalty[i].reason == LJ_TRERR_LINNER) &&
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	601 J->penalty[i].val >= 2*PENALTY_MIN)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	602 return 1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	603 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	604 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	605 return 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	606 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	607
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	608 /* Handle the case when an interpreted loop op is hit. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	609 static void rec_loop_interp(jit_State J, const BCIns pc, LoopEvent ev)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	610 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	611 if (J->parent == 0 && J->exitno == 0) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	612 if (pc == J->startpc && J->framedepth + J->retdepth == 0) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	613 if (bc_op(J->cur.startins) == BC_ITERN) return; /* See rec_itern(). */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	614 /* Same loop? */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	615 if (ev == LOOPEV_LEAVE) /* Must loop back to form a root trace. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	616 lj_trace_err(J, LJ_TRERR_LLEAVE);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	617 lj_record_stop(J, LJ_TRLINK_LOOP, J->cur.traceno); /* Looping trace. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	618 } else if (ev != LOOPEV_LEAVE) { /* Entering inner loop? */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	619 /* It's usually better to abort here and wait until the inner loop
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	620 ** is traced. But if the inner loop repeatedly didn't loop back,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	621 ** this indicates a low trip count. In this case try unrolling
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	622 ** an inner loop even in a root trace. But it's better to be a bit
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	623 ** more conservative here and only do it for very short loops.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	624 */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	625 if (bc_j(*pc) != -1 && !innerloopleft(J, pc))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	626 lj_trace_err(J, LJ_TRERR_LINNER); /* Root trace hit an inner loop. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	627 if ((ev != LOOPEV_ENTERLO &&
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	628 J->loopref && J->cur.nins - J->loopref > 24) \|\| --J->loopunroll < 0)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	629 lj_trace_err(J, LJ_TRERR_LUNROLL); /* Limit loop unrolling. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	630 J->loopref = J->cur.nins;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	631 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	632 } else if (ev != LOOPEV_LEAVE) { /* Side trace enters an inner loop. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	633 J->loopref = J->cur.nins;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	634 if (--J->loopunroll < 0)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	635 lj_trace_err(J, LJ_TRERR_LUNROLL); /* Limit loop unrolling. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	636 } /* Side trace continues across a loop that's left or not entered. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	637 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	638
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	639 /* Handle the case when an already compiled loop op is hit. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	640 static void rec_loop_jit(jit_State *J, TraceNo lnk, LoopEvent ev)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	641 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	642 if (J->parent == 0 && J->exitno == 0) { /* Root trace hit an inner loop. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	643 /* Better let the inner loop spawn a side trace back here. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	644 lj_trace_err(J, LJ_TRERR_LINNER);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	645 } else if (ev != LOOPEV_LEAVE) { /* Side trace enters a compiled loop. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	646 J->instunroll = 0; /* Cannot continue across a compiled loop op. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	647 if (J->pc == J->startpc && J->framedepth + J->retdepth == 0)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	648 lj_record_stop(J, LJ_TRLINK_LOOP, J->cur.traceno); /* Form extra loop. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	649 else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	650 lj_record_stop(J, LJ_TRLINK_ROOT, lnk); /* Link to the loop. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	651 } /* Side trace continues across a loop that's left or not entered. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	652 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	653
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	654 /* Record ITERN. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	655 static LoopEvent rec_itern(jit_State *J, BCReg ra, BCReg rb)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	656 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	657 #if LJ_BE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	658 /* YAGNI: Disabled on big-endian due to issues with lj_vm_next,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	659 ** IR_HIOP, RID_RETLO/RID_RETHI and ra_destpair.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	660 */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	661 UNUSED(ra); UNUSED(rb);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	662 setintV(&J->errinfo, (int32_t)BC_ITERN);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	663 lj_trace_err_info(J, LJ_TRERR_NYIBC);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	664 #else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	665 RecordIndex ix;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	666 /* Since ITERN is recorded at the start, we need our own loop detection. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	667 if (J->pc == J->startpc &&
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	668 J->framedepth + J->retdepth == 0 && J->parent == 0 && J->exitno == 0) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	669 IRRef ref = REF_FIRST + LJ_HASPROFILE;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	670 #ifdef LUAJIT_ENABLE_CHECKHOOK
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	671 ref += 3;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	672 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	673 if (J->cur.nins > ref \|\|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	674 (LJ_HASPROFILE && J->cur.nins == ref && J->cur.ir[ref-1].o != IR_PROF)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	675 J->instunroll = 0; /* Cannot continue unrolling across an ITERN. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	676 lj_record_stop(J, LJ_TRLINK_LOOP, J->cur.traceno); /* Looping trace. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	677 return LOOPEV_ENTER;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	678 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	679 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	680 J->maxslot = ra;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	681 lj_snap_add(J); /* Required to make JLOOP the first ins in a side-trace. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	682 ix.tab = getslot(J, ra-2);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	683 ix.key = J->base[ra-1] ? J->base[ra-1] :
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	684 sloadt(J, (int32_t)(ra-1), IRT_GUARD\|IRT_INT,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	685 IRSLOAD_TYPECHECK\|IRSLOAD_KEYINDEX);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	686 copyTV(J->L, &ix.tabv, &J->L->base[ra-2]);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	687 copyTV(J->L, &ix.keyv, &J->L->base[ra-1]);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	688 ix.idxchain = (rb < 3); /* Omit value type check, if unused. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	689 ix.mobj = 1; /* We need the next index, too. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	690 J->maxslot = ra + lj_record_next(J, &ix);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	691 J->needsnap = 1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	692 if (!tref_isnil(ix.key)) { /* Looping back? */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	693 J->base[ra-1] = ix.mobj \| TREF_KEYINDEX; /* Control var has next index. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	694 J->base[ra] = ix.key;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	695 J->base[ra+1] = ix.val;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	696 J->pc += bc_j(J->pc[1])+2;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	697 return LOOPEV_ENTER;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	698 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	699 J->maxslot = ra-3;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	700 J->pc += 2;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	701 return LOOPEV_LEAVE;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	702 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	703 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	704 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	705
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	706 /* Record ISNEXT. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	707 static void rec_isnext(jit_State *J, BCReg ra)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	708 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	709 cTValue *b = &J->L->base[ra-3];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	710 if (tvisfunc(b) && funcV(b)->c.ffid == FF_next &&
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	711 tvistab(b+1) && tvisnil(b+2)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	712 /* These checks are folded away for a compiled pairs(). */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	713 TRef func = getslot(J, ra-3);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	714 TRef trid = emitir(IRT(IR_FLOAD, IRT_U8), func, IRFL_FUNC_FFID);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	715 emitir(IRTGI(IR_EQ), trid, lj_ir_kint(J, FF_next));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	716 (void)getslot(J, ra-2); /* Type check for table. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	717 (void)getslot(J, ra-1); /* Type check for nil key. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	718 J->base[ra-1] = lj_ir_kint(J, 0) \| TREF_KEYINDEX;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	719 J->maxslot = ra;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	720 } else { /* Abort trace. Interpreter will despecialize bytecode. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	721 lj_trace_err(J, LJ_TRERR_RECERR);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	722 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	723 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	724
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	725 /* -- Record profiler hook checks ----------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	726
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	727 #if LJ_HASPROFILE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	728
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	729 /* Need to insert profiler hook check? */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	730 static int rec_profile_need(jit_State J, GCproto pt, const BCIns *pc)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	731 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	732 GCproto *ppt;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	733 lj_assertJ(J->prof_mode == 'f' \|\| J->prof_mode == 'l',
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	734 "bad profiler mode %c", J->prof_mode);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	735 if (!pt)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	736 return 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	737 ppt = J->prev_pt;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	738 J->prev_pt = pt;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	739 if (pt != ppt && ppt) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	740 J->prev_line = -1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	741 return 1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	742 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	743 if (J->prof_mode == 'l') {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	744 BCLine line = lj_debug_line(pt, proto_bcpos(pt, pc));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	745 BCLine pline = J->prev_line;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	746 J->prev_line = line;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	747 if (pline != line)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	748 return 1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	749 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	750 return 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	751 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	752
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	753 static void rec_profile_ins(jit_State J, const BCIns pc)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	754 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	755 if (J->prof_mode && rec_profile_need(J, J->pt, pc)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	756 emitir(IRTG(IR_PROF, IRT_NIL), 0, 0);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	757 lj_snap_add(J);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	758 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	759 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	760
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	761 static void rec_profile_ret(jit_State *J)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	762 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	763 if (J->prof_mode == 'f') {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	764 emitir(IRTG(IR_PROF, IRT_NIL), 0, 0);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	765 J->prev_pt = NULL;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	766 lj_snap_add(J);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	767 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	768 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	769
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	770 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	771
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	772 /* -- Record calls and returns -------------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	773
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	774 /* Specialize to the runtime value of the called function or its prototype. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	775 static TRef rec_call_specialize(jit_State J, GCfunc fn, TRef tr)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	776 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	777 TRef kfunc;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	778 if (isluafunc(fn)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	779 GCproto *pt = funcproto(fn);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	780 /* Too many closures created? Probably not a monomorphic function. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	781 if (pt->flags >= PROTO_CLC_POLY) { /* Specialize to prototype instead. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	782 TRef trpt = emitir(IRT(IR_FLOAD, IRT_PGC), tr, IRFL_FUNC_PC);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	783 emitir(IRTG(IR_EQ, IRT_PGC), trpt, lj_ir_kptr(J, proto_bc(pt)));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	784 (void)lj_ir_kgc(J, obj2gco(pt), IRT_PROTO); /* Prevent GC of proto. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	785 return tr;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	786 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	787 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	788 /* Don't specialize to non-monomorphic builtins. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	789 switch (fn->c.ffid) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	790 case FF_coroutine_wrap_aux:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	791 case FF_string_gmatch_aux:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	792 /* NYI: io_file_iter doesn't have an ffid, yet. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	793 { /* Specialize to the ffid. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	794 TRef trid = emitir(IRT(IR_FLOAD, IRT_U8), tr, IRFL_FUNC_FFID);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	795 emitir(IRTGI(IR_EQ), trid, lj_ir_kint(J, fn->c.ffid));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	796 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	797 return tr;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	798 default:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	799 /* NYI: don't specialize to non-monomorphic C functions. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	800 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	801 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	802 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	803 /* Otherwise specialize to the function (closure) value itself. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	804 kfunc = lj_ir_kfunc(J, fn);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	805 emitir(IRTG(IR_EQ, IRT_FUNC), tr, kfunc);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	806 return kfunc;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	807 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	808
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	809 /* Record call setup. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	810 static void rec_call_setup(jit_State *J, BCReg func, ptrdiff_t nargs)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	811 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	812 RecordIndex ix;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	813 TValue *functv = &J->L->base[func];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	814 TRef kfunc, *fbase = &J->base[func];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	815 ptrdiff_t i;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	816 (void)getslot(J, func); /* Ensure func has a reference. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	817 for (i = 1; i <= nargs; i++)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	818 (void)getslot(J, func+LJ_FR2+i); /* Ensure all args have a reference. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	819 if (!tref_isfunc(fbase[0])) { /* Resolve __call metamethod. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	820 ix.tab = fbase[0];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	821 copyTV(J->L, &ix.tabv, functv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	822 if (!lj_record_mm_lookup(J, &ix, MM_call) \|\| !tref_isfunc(ix.mobj))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	823 lj_trace_err(J, LJ_TRERR_NOMM);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	824 for (i = ++nargs; i > LJ_FR2; i--) /* Shift arguments up. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	825 fbase[i+LJ_FR2] = fbase[i+LJ_FR2-1];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	826 #if LJ_FR2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	827 fbase[2] = fbase[0];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	828 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	829 fbase[0] = ix.mobj; /* Replace function. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	830 functv = &ix.mobjv;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	831 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	832 kfunc = rec_call_specialize(J, funcV(functv), fbase[0]);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	833 #if LJ_FR2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	834 fbase[0] = kfunc;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	835 fbase[1] = TREF_FRAME;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	836 #else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	837 fbase[0] = kfunc \| TREF_FRAME;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	838 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	839 J->maxslot = (BCReg)nargs;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	840 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	841
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	842 /* Record call. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	843 void lj_record_call(jit_State *J, BCReg func, ptrdiff_t nargs)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	844 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	845 rec_call_setup(J, func, nargs);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	846 /* Bump frame. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	847 J->framedepth++;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	848 J->base += func+1+LJ_FR2;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	849 J->baseslot += func+1+LJ_FR2;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	850 if (J->baseslot + J->maxslot >= LJ_MAX_JSLOTS)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	851 lj_trace_err(J, LJ_TRERR_STACKOV);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	852 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	853
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	854 /* Record tail call. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	855 void lj_record_tailcall(jit_State *J, BCReg func, ptrdiff_t nargs)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	856 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	857 rec_call_setup(J, func, nargs);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	858 if (frame_isvarg(J->L->base - 1)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	859 BCReg cbase = (BCReg)frame_delta(J->L->base - 1);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	860 if (--J->framedepth < 0)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	861 lj_trace_err(J, LJ_TRERR_NYIRETL);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	862 J->baseslot -= (BCReg)cbase;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	863 J->base -= cbase;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	864 func += cbase;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	865 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	866 /* Move func + args down. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	867 if (LJ_FR2 && J->baseslot == 2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	868 J->base[func+1] = TREF_FRAME;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	869 memmove(&J->base[-1-LJ_FR2], &J->base[func], sizeof(TRef)*(J->maxslot+1+LJ_FR2));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	870 /* Note: the new TREF_FRAME is now at J->base[-1] (even for slot #0). */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	871 /* Tailcalls can form a loop, so count towards the loop unroll limit. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	872 if (++J->tailcalled > J->loopunroll)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	873 lj_trace_err(J, LJ_TRERR_LUNROLL);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	874 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	875
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	876 /* Check unroll limits for down-recursion. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	877 static int check_downrec_unroll(jit_State J, GCproto pt)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	878 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	879 IRRef ptref;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	880 for (ptref = J->chain[IR_KGC]; ptref; ptref = IR(ptref)->prev)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	881 if (ir_kgc(IR(ptref)) == obj2gco(pt)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	882 int count = 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	883 IRRef ref;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	884 for (ref = J->chain[IR_RETF]; ref; ref = IR(ref)->prev)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	885 if (IR(ref)->op1 == ptref)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	886 count++;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	887 if (count) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	888 if (J->pc == J->startpc) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	889 if (count + J->tailcalled > J->param[JIT_P_recunroll])
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	890 return 1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	891 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	892 lj_trace_err(J, LJ_TRERR_DOWNREC);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	893 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	894 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	895 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	896 return 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	897 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	898
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	899 static TRef rec_cat(jit_State *J, BCReg baseslot, BCReg topslot);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	900
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	901 /* Record return. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	902 void lj_record_ret(jit_State *J, BCReg rbase, ptrdiff_t gotresults)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	903 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	904 TValue *frame = J->L->base - 1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	905 ptrdiff_t i;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	906 for (i = 0; i < gotresults; i++)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	907 (void)getslot(J, rbase+i); /* Ensure all results have a reference. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	908 while (frame_ispcall(frame)) { /* Immediately resolve pcall() returns. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	909 BCReg cbase = (BCReg)frame_delta(frame);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	910 if (--J->framedepth <= 0)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	911 lj_trace_err(J, LJ_TRERR_NYIRETL);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	912 lj_assertJ(J->baseslot > 1+LJ_FR2, "bad baseslot for return");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	913 gotresults++;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	914 rbase += cbase;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	915 J->baseslot -= (BCReg)cbase;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	916 J->base -= cbase;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	917 J->base[--rbase] = TREF_TRUE; /* Prepend true to results. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	918 frame = frame_prevd(frame);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	919 J->needsnap = 1; /* Stop catching on-trace errors. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	920 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	921 /* Return to lower frame via interpreter for unhandled cases. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	922 if (J->framedepth == 0 && J->pt && bc_isret(bc_op(*J->pc)) &&
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	923 (!frame_islua(frame) \|\|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	924 (J->parent == 0 && J->exitno == 0 &&
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	925 !bc_isret(bc_op(J->cur.startins))))) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	926 /* NYI: specialize to frame type and return directly, not via RET. /
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	927 for (i = 0; i < (ptrdiff_t)rbase; i++)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	928 J->base[i] = 0; /* Purge dead slots. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	929 J->maxslot = rbase + (BCReg)gotresults;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	930 lj_record_stop(J, LJ_TRLINK_RETURN, 0); /* Return to interpreter. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	931 return;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	932 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	933 if (frame_isvarg(frame)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	934 BCReg cbase = (BCReg)frame_delta(frame);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	935 if (--J->framedepth < 0) /* NYI: return of vararg func to lower frame. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	936 lj_trace_err(J, LJ_TRERR_NYIRETL);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	937 lj_assertJ(J->baseslot > 1+LJ_FR2, "bad baseslot for return");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	938 rbase += cbase;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	939 J->baseslot -= (BCReg)cbase;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	940 J->base -= cbase;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	941 frame = frame_prevd(frame);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	942 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	943 if (frame_islua(frame)) { /* Return to Lua frame. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	944 BCIns callins = *(frame_pc(frame)-1);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	945 ptrdiff_t nresults = bc_b(callins) ? (ptrdiff_t)bc_b(callins)-1 :gotresults;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	946 BCReg cbase = bc_a(callins);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	947 GCproto *pt = funcproto(frame_func(frame - (cbase+1+LJ_FR2)));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	948 if ((pt->flags & PROTO_NOJIT))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	949 lj_trace_err(J, LJ_TRERR_CJITOFF);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	950 if (J->framedepth == 0 && J->pt && frame == J->L->base - 1) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	951 if (check_downrec_unroll(J, pt)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	952 J->maxslot = (BCReg)(rbase + gotresults);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	953 lj_snap_purge(J);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	954 lj_record_stop(J, LJ_TRLINK_DOWNREC, J->cur.traceno); /* Down-rec. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	955 return;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	956 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	957 lj_snap_add(J);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	958 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	959 for (i = 0; i < nresults; i++) /* Adjust results. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	960 J->base[i-1-LJ_FR2] = i < gotresults ? J->base[rbase+i] : TREF_NIL;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	961 J->maxslot = cbase+(BCReg)nresults;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	962 if (J->framedepth > 0) { /* Return to a frame that is part of the trace. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	963 J->framedepth--;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	964 lj_assertJ(J->baseslot > cbase+1+LJ_FR2, "bad baseslot for return");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	965 J->baseslot -= cbase+1+LJ_FR2;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	966 J->base -= cbase+1+LJ_FR2;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	967 } else if (J->parent == 0 && J->exitno == 0 &&
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	968 !bc_isret(bc_op(J->cur.startins))) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	969 /* Return to lower frame would leave the loop in a root trace. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	970 lj_trace_err(J, LJ_TRERR_LLEAVE);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	971 } else if (J->needsnap) { /* Tailcalled to ff with side-effects. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	972 lj_trace_err(J, LJ_TRERR_NYIRETL); /* No way to insert snapshot here. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	973 } else { /* Return to lower frame. Guard for the target we return to. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	974 TRef trpt = lj_ir_kgc(J, obj2gco(pt), IRT_PROTO);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	975 TRef trpc = lj_ir_kptr(J, (void *)frame_pc(frame));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	976 emitir(IRTG(IR_RETF, IRT_PGC), trpt, trpc);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	977 J->retdepth++;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	978 J->needsnap = 1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	979 lj_assertJ(J->baseslot == 1+LJ_FR2, "bad baseslot for return");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	980 /* Shift result slots up and clear the slots of the new frame below. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	981 memmove(J->base + cbase, J->base-1-LJ_FR2, sizeof(TRef)*nresults);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	982 memset(J->base-1-LJ_FR2, 0, sizeof(TRef)*(cbase+1+LJ_FR2));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	983 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	984 } else if (frame_iscont(frame)) { /* Return to continuation frame. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	985 ASMFunction cont = frame_contf(frame);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	986 BCReg cbase = (BCReg)frame_delta(frame);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	987 if ((J->framedepth -= 2) < 0)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	988 lj_trace_err(J, LJ_TRERR_NYIRETL);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	989 J->baseslot -= (BCReg)cbase;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	990 J->base -= cbase;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	991 J->maxslot = cbase-(2<<LJ_FR2);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	992 if (cont == lj_cont_ra) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	993 /* Copy result to destination slot. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	994 BCReg dst = bc_a(*(frame_contpc(frame)-1));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	995 J->base[dst] = gotresults ? J->base[cbase+rbase] : TREF_NIL;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	996 if (dst >= J->maxslot) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	997 J->maxslot = dst+1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	998 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	999 } else if (cont == lj_cont_nop) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1000 /* Nothing to do here. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1001 } else if (cont == lj_cont_cat) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1002 BCReg bslot = bc_b(*(frame_contpc(frame)-1));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1003 TRef tr = gotresults ? J->base[cbase+rbase] : TREF_NIL;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1004 if (bslot != J->maxslot) { /* Concatenate the remainder. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1005 TValue b = J->L->base, save; / Simulate lower frame and result. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1006 /* Can't handle MM_concat + CALLT + fast func side-effects. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1007 if (J->postproc != LJ_POST_NONE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1008 lj_trace_err(J, LJ_TRERR_NYIRETL);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1009 J->base[J->maxslot] = tr;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1010 copyTV(J->L, &save, b-(2<<LJ_FR2));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1011 if (gotresults)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1012 copyTV(J->L, b-(2<<LJ_FR2), b+rbase);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1013 else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1014 setnilV(b-(2<<LJ_FR2));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1015 J->L->base = b - cbase;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1016 tr = rec_cat(J, bslot, cbase-(2<<LJ_FR2));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1017 b = J->L->base + cbase; /* Undo. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1018 J->L->base = b;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1019 copyTV(J->L, b-(2<<LJ_FR2), &save);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1020 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1021 if (tr) { /* Store final result. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1022 BCReg dst = bc_a(*(frame_contpc(frame)-1));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1023 J->base[dst] = tr;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1024 if (dst >= J->maxslot) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1025 J->maxslot = dst+1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1026 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1027 } /* Otherwise continue with another __concat call. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1028 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1029 /* Result type already specialized. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1030 lj_assertJ(cont == lj_cont_condf \|\| cont == lj_cont_condt,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1031 "bad continuation type");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1032 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1033 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1034 lj_trace_err(J, LJ_TRERR_NYIRETL); /* NYI: handle return to C frame. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1035 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1036 lj_assertJ(J->baseslot >= 1+LJ_FR2, "bad baseslot for return");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1037 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1038
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1039 /* -- Metamethod handling ------------------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1040
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1041 /* Prepare to record call to metamethod. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1042 static BCReg rec_mm_prep(jit_State *J, ASMFunction cont)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1043 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1044 BCReg s, top = cont == lj_cont_cat ? J->maxslot : curr_proto(J->L)->framesize;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1045 #if LJ_FR2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1046 J->base[top] = lj_ir_k64(J, IR_KNUM, u64ptr(contptr(cont)));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1047 J->base[top+1] = TREF_CONT;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1048 #else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1049 J->base[top] = lj_ir_kptr(J, contptr(cont)) \| TREF_CONT;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1050 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1051 J->framedepth++;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1052 for (s = J->maxslot; s < top; s++)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1053 J->base[s] = 0; /* Clear frame gap to avoid resurrecting previous refs. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1054 return top+1+LJ_FR2;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1055 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1056
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1057 /* Record metamethod lookup. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1058 int lj_record_mm_lookup(jit_State J, RecordIndex ix, MMS mm)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1059 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1060 RecordIndex mix;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1061 GCtab *mt;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1062 if (tref_istab(ix->tab)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1063 mt = tabref(tabV(&ix->tabv)->metatable);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1064 mix.tab = emitir(IRT(IR_FLOAD, IRT_TAB), ix->tab, IRFL_TAB_META);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1065 } else if (tref_isudata(ix->tab)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1066 int udtype = udataV(&ix->tabv)->udtype;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1067 mt = tabref(udataV(&ix->tabv)->metatable);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1068 /* The metatables of special userdata objects are treated as immutable. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1069 if (udtype != UDTYPE_USERDATA) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1070 cTValue *mo;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1071 if (LJ_HASFFI && udtype == UDTYPE_FFI_CLIB) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1072 /* Specialize to the C library namespace object. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1073 emitir(IRTG(IR_EQ, IRT_PGC), ix->tab, lj_ir_kptr(J, udataV(&ix->tabv)));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1074 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1075 /* Specialize to the type of userdata. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1076 TRef tr = emitir(IRT(IR_FLOAD, IRT_U8), ix->tab, IRFL_UDATA_UDTYPE);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1077 emitir(IRTGI(IR_EQ), tr, lj_ir_kint(J, udtype));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1078 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1079 immutable_mt:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1080 mo = lj_tab_getstr(mt, mmname_str(J2G(J), mm));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1081 if (!mo \|\| tvisnil(mo))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1082 return 0; /* No metamethod. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1083 /* Treat metamethod or index table as immutable, too. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1084 if (!(tvisfunc(mo) \|\| tvistab(mo)))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1085 lj_trace_err(J, LJ_TRERR_BADTYPE);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1086 copyTV(J->L, &ix->mobjv, mo);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1087 ix->mobj = lj_ir_kgc(J, gcV(mo), tvisfunc(mo) ? IRT_FUNC : IRT_TAB);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1088 ix->mtv = mt;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1089 ix->mt = TREF_NIL; /* Dummy value for comparison semantics. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1090 return 1; /* Got metamethod or index table. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1091 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1092 mix.tab = emitir(IRT(IR_FLOAD, IRT_TAB), ix->tab, IRFL_UDATA_META);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1093 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1094 /* Specialize to base metatable. Must flush mcode in lua_setmetatable(). */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1095 mt = tabref(basemt_obj(J2G(J), &ix->tabv));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1096 if (mt == NULL) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1097 ix->mt = TREF_NIL;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1098 return 0; /* No metamethod. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1099 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1100 /* The cdata metatable is treated as immutable. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1101 if (LJ_HASFFI && tref_iscdata(ix->tab)) goto immutable_mt;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1102 ix->mt = mix.tab = lj_ir_ggfload(J, IRT_TAB,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1103 GG_OFS(g.gcroot[GCROOT_BASEMT+itypemap(&ix->tabv)]));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1104 goto nocheck;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1105 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1106 ix->mt = mt ? mix.tab : TREF_NIL;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1107 emitir(IRTG(mt ? IR_NE : IR_EQ, IRT_TAB), mix.tab, lj_ir_knull(J, IRT_TAB));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1108 nocheck:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1109 if (mt) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1110 GCstr *mmstr = mmname_str(J2G(J), mm);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1111 cTValue *mo = lj_tab_getstr(mt, mmstr);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1112 if (mo && !tvisnil(mo))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1113 copyTV(J->L, &ix->mobjv, mo);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1114 ix->mtv = mt;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1115 settabV(J->L, &mix.tabv, mt);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1116 setstrV(J->L, &mix.keyv, mmstr);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1117 mix.key = lj_ir_kstr(J, mmstr);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1118 mix.val = 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1119 mix.idxchain = 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1120 ix->mobj = lj_record_idx(J, &mix);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1121 return !tref_isnil(ix->mobj); /* 1 if metamethod found, 0 if not. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1122 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1123 return 0; /* No metamethod. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1124 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1125
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1126 /* Record call to arithmetic metamethod. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1127 static TRef rec_mm_arith(jit_State J, RecordIndex ix, MMS mm)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1128 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1129 /* Set up metamethod call first to save ix->tab and ix->tabv. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1130 BCReg func = rec_mm_prep(J, mm == MM_concat ? lj_cont_cat : lj_cont_ra);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1131 TRef *base = J->base + func;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1132 TValue *basev = J->L->base + func;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1133 base[1+LJ_FR2] = ix->tab; base[2+LJ_FR2] = ix->key;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1134 copyTV(J->L, basev+1+LJ_FR2, &ix->tabv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1135 copyTV(J->L, basev+2+LJ_FR2, &ix->keyv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1136 if (!lj_record_mm_lookup(J, ix, mm)) { /* Lookup mm on 1st operand. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1137 if (mm != MM_unm) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1138 ix->tab = ix->key;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1139 copyTV(J->L, &ix->tabv, &ix->keyv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1140 if (lj_record_mm_lookup(J, ix, mm)) /* Lookup mm on 2nd operand. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1141 goto ok;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1142 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1143 lj_trace_err(J, LJ_TRERR_NOMM);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1144 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1145 ok:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1146 base[0] = ix->mobj;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1147 #if LJ_FR2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1148 base[1] = 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1149 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1150 copyTV(J->L, basev+0, &ix->mobjv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1151 lj_record_call(J, func, 2);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1152 return 0; /* No result yet. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1153 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1154
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1155 /* Record call to __len metamethod. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1156 static TRef rec_mm_len(jit_State J, TRef tr, TValue tv)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1157 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1158 RecordIndex ix;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1159 ix.tab = tr;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1160 copyTV(J->L, &ix.tabv, tv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1161 if (lj_record_mm_lookup(J, &ix, MM_len)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1162 BCReg func = rec_mm_prep(J, lj_cont_ra);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1163 TRef *base = J->base + func;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1164 TValue *basev = J->L->base + func;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1165 base[0] = ix.mobj; copyTV(J->L, basev+0, &ix.mobjv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1166 base += LJ_FR2;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1167 basev += LJ_FR2;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1168 base[1] = tr; copyTV(J->L, basev+1, tv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1169 #if LJ_52
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1170 base[2] = tr; copyTV(J->L, basev+2, tv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1171 #else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1172 base[2] = TREF_NIL; setnilV(basev+2);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1173 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1174 lj_record_call(J, func, 2);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1175 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1176 if (LJ_52 && tref_istab(tr))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1177 return emitir(IRTI(IR_ALEN), tr, TREF_NIL);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1178 lj_trace_err(J, LJ_TRERR_NOMM);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1179 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1180 return 0; /* No result yet. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1181 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1182
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1183 /* Call a comparison metamethod. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1184 static void rec_mm_callcomp(jit_State J, RecordIndex ix, int op)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1185 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1186 BCReg func = rec_mm_prep(J, (op&1) ? lj_cont_condf : lj_cont_condt);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1187 TRef *base = J->base + func + LJ_FR2;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1188 TValue *tv = J->L->base + func + LJ_FR2;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1189 base[-LJ_FR2] = ix->mobj; base[1] = ix->val; base[2] = ix->key;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1190 copyTV(J->L, tv-LJ_FR2, &ix->mobjv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1191 copyTV(J->L, tv+1, &ix->valv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1192 copyTV(J->L, tv+2, &ix->keyv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1193 lj_record_call(J, func, 2);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1194 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1195
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1196 /* Record call to equality comparison metamethod (for tab and udata only). */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1197 static void rec_mm_equal(jit_State J, RecordIndex ix, int op)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1198 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1199 ix->tab = ix->val;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1200 copyTV(J->L, &ix->tabv, &ix->valv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1201 if (lj_record_mm_lookup(J, ix, MM_eq)) { /* Lookup mm on 1st operand. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1202 cTValue *bv;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1203 TRef mo1 = ix->mobj;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1204 TValue mo1v;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1205 copyTV(J->L, &mo1v, &ix->mobjv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1206 /* Avoid the 2nd lookup and the objcmp if the metatables are equal. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1207 bv = &ix->keyv;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1208 if (tvistab(bv) && tabref(tabV(bv)->metatable) == ix->mtv) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1209 TRef mt2 = emitir(IRT(IR_FLOAD, IRT_TAB), ix->key, IRFL_TAB_META);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1210 emitir(IRTG(IR_EQ, IRT_TAB), mt2, ix->mt);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1211 } else if (tvisudata(bv) && tabref(udataV(bv)->metatable) == ix->mtv) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1212 TRef mt2 = emitir(IRT(IR_FLOAD, IRT_TAB), ix->key, IRFL_UDATA_META);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1213 emitir(IRTG(IR_EQ, IRT_TAB), mt2, ix->mt);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1214 } else { /* Lookup metamethod on 2nd operand and compare both. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1215 ix->tab = ix->key;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1216 copyTV(J->L, &ix->tabv, bv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1217 if (!lj_record_mm_lookup(J, ix, MM_eq) \|\|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1218 lj_record_objcmp(J, mo1, ix->mobj, &mo1v, &ix->mobjv))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1219 return;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1220 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1221 rec_mm_callcomp(J, ix, op);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1222 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1223 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1224
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1225 /* Record call to ordered comparison metamethods (for arbitrary objects). */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1226 static void rec_mm_comp(jit_State J, RecordIndex ix, int op)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1227 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1228 ix->tab = ix->val;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1229 copyTV(J->L, &ix->tabv, &ix->valv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1230 while (1) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1231 MMS mm = (op & 2) ? MM_le : MM_lt; /* Try __le + __lt or only __lt. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1232 #if LJ_52
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1233 if (!lj_record_mm_lookup(J, ix, mm)) { /* Lookup mm on 1st operand. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1234 ix->tab = ix->key;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1235 copyTV(J->L, &ix->tabv, &ix->keyv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1236 if (!lj_record_mm_lookup(J, ix, mm)) /* Lookup mm on 2nd operand. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1237 goto nomatch;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1238 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1239 rec_mm_callcomp(J, ix, op);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1240 return;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1241 #else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1242 if (lj_record_mm_lookup(J, ix, mm)) { /* Lookup mm on 1st operand. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1243 cTValue *bv;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1244 TRef mo1 = ix->mobj;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1245 TValue mo1v;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1246 copyTV(J->L, &mo1v, &ix->mobjv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1247 /* Avoid the 2nd lookup and the objcmp if the metatables are equal. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1248 bv = &ix->keyv;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1249 if (tvistab(bv) && tabref(tabV(bv)->metatable) == ix->mtv) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1250 TRef mt2 = emitir(IRT(IR_FLOAD, IRT_TAB), ix->key, IRFL_TAB_META);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1251 emitir(IRTG(IR_EQ, IRT_TAB), mt2, ix->mt);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1252 } else if (tvisudata(bv) && tabref(udataV(bv)->metatable) == ix->mtv) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1253 TRef mt2 = emitir(IRT(IR_FLOAD, IRT_TAB), ix->key, IRFL_UDATA_META);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1254 emitir(IRTG(IR_EQ, IRT_TAB), mt2, ix->mt);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1255 } else { /* Lookup metamethod on 2nd operand and compare both. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1256 ix->tab = ix->key;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1257 copyTV(J->L, &ix->tabv, bv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1258 if (!lj_record_mm_lookup(J, ix, mm) \|\|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1259 lj_record_objcmp(J, mo1, ix->mobj, &mo1v, &ix->mobjv))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1260 goto nomatch;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1261 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1262 rec_mm_callcomp(J, ix, op);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1263 return;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1264 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1265 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1266 nomatch:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1267 /* Lookup failed. Retry with __lt and swapped operands. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1268 if (!(op & 2)) break; /* Already at __lt. Interpreter will throw. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1269 ix->tab = ix->key; ix->key = ix->val; ix->val = ix->tab;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1270 copyTV(J->L, &ix->tabv, &ix->keyv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1271 copyTV(J->L, &ix->keyv, &ix->valv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1272 copyTV(J->L, &ix->valv, &ix->tabv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1273 op ^= 3;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1274 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1275 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1276
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1277 #if LJ_HASFFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1278 /* Setup call to cdata comparison metamethod. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1279 static void rec_mm_comp_cdata(jit_State J, RecordIndex ix, int op, MMS mm)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1280 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1281 lj_snap_add(J);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1282 if (tref_iscdata(ix->val)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1283 ix->tab = ix->val;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1284 copyTV(J->L, &ix->tabv, &ix->valv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1285 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1286 lj_assertJ(tref_iscdata(ix->key), "cdata expected");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1287 ix->tab = ix->key;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1288 copyTV(J->L, &ix->tabv, &ix->keyv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1289 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1290 lj_record_mm_lookup(J, ix, mm);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1291 rec_mm_callcomp(J, ix, op);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1292 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1293 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1294
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1295 /* -- Indexed access ------------------------------------------------------ */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1296
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1297 #ifdef LUAJIT_ENABLE_TABLE_BUMP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1298 /* Bump table allocations in bytecode when they grow during recording. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1299 static void rec_idx_bump(jit_State J, RecordIndex ix)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1300 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1301 RBCHashEntry *rbc = &J->rbchash[(ix->tab & (RBCHASH_SLOTS-1))];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1302 if (tref_ref(ix->tab) == rbc->ref) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1303 const BCIns *pc = mref(rbc->pc, const BCIns);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1304 GCtab *tb = tabV(&ix->tabv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1305 uint32_t nhbits;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1306 IRIns *ir;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1307 if (!tvisnil(&ix->keyv))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1308 (void)lj_tab_set(J->L, tb, &ix->keyv); /* Grow table right now. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1309 nhbits = tb->hmask > 0 ? lj_fls(tb->hmask)+1 : 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1310 ir = IR(tref_ref(ix->tab));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1311 if (ir->o == IR_TNEW) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1312 uint32_t ah = bc_d(*pc);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1313 uint32_t asize = ah & 0x7ff, hbits = ah >> 11;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1314 if (nhbits > hbits) hbits = nhbits;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1315 if (tb->asize > asize) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1316 asize = tb->asize <= 0x7ff ? tb->asize : 0x7ff;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1317 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1318 if ((asize \| (hbits<<11)) != ah) { /* Has the size changed? */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1319 /* Patch bytecode, but continue recording (for more patching). */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1320 setbc_d(pc, (asize \| (hbits<<11)));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1321 /* Patching TNEW operands is only safe if the trace is aborted. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1322 ir->op1 = asize; ir->op2 = hbits;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1323 J->retryrec = 1; /* Abort the trace at the end of recording. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1324 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1325 } else if (ir->o == IR_TDUP) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1326 GCtab tpl = gco2tab(proto_kgc(&gcref(rbc->pt)->pt, ~(ptrdiff_t)bc_d(pc)));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1327 /* Grow template table, but preserve keys with nil values. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1328 if ((tb->asize > tpl->asize && (1u << nhbits)-1 == tpl->hmask) \|\|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1329 (tb->asize == tpl->asize && (1u << nhbits)-1 > tpl->hmask)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1330 Node *node = noderef(tpl->node);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1331 uint32_t i, hmask = tpl->hmask, asize;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1332 TValue *array;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1333 for (i = 0; i <= hmask; i++) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1334 if (!tvisnil(&node[i].key) && tvisnil(&node[i].val))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1335 settabV(J->L, &node[i].val, tpl);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1336 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1337 if (!tvisnil(&ix->keyv) && tref_isk(ix->key)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1338 TValue *o = lj_tab_set(J->L, tpl, &ix->keyv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1339 if (tvisnil(o)) settabV(J->L, o, tpl);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1340 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1341 lj_tab_resize(J->L, tpl, tb->asize, nhbits);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1342 node = noderef(tpl->node);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1343 hmask = tpl->hmask;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1344 for (i = 0; i <= hmask; i++) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1345 /* This is safe, since template tables only hold immutable values. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1346 if (tvistab(&node[i].val))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1347 setnilV(&node[i].val);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1348 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1349 /* The shape of the table may have changed. Clean up array part, too. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1350 asize = tpl->asize;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1351 array = tvref(tpl->array);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1352 for (i = 0; i < asize; i++) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1353 if (tvistab(&array[i]))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1354 setnilV(&array[i]);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1355 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1356 J->retryrec = 1; /* Abort the trace at the end of recording. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1357 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1358 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1359 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1360 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1361 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1362
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1363 /* Record bounds-check. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1364 static void rec_idx_abc(jit_State *J, TRef asizeref, TRef ikey, uint32_t asize)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1365 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1366 /* Try to emit invariant bounds checks. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1367 if ((J->flags & (JIT_F_OPT_LOOP\|JIT_F_OPT_ABC)) ==
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1368 (JIT_F_OPT_LOOP\|JIT_F_OPT_ABC)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1369 IRRef ref = tref_ref(ikey);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1370 IRIns *ir = IR(ref);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1371 int32_t ofs = 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1372 IRRef ofsref = 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1373 /* Handle constant offsets. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1374 if (ir->o == IR_ADD && irref_isk(ir->op2)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1375 ofsref = ir->op2;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1376 ofs = IR(ofsref)->i;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1377 ref = ir->op1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1378 ir = IR(ref);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1379 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1380 /* Got scalar evolution analysis results for this reference? */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1381 if (ref == J->scev.idx) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1382 int32_t stop;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1383 lj_assertJ(irt_isint(J->scev.t) && ir->o == IR_SLOAD,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1384 "only int SCEV supported");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1385 stop = numberVint(&(J->L->base - J->baseslot)[ir->op1 + FORL_STOP]);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1386 /* Runtime value for stop of loop is within bounds? */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1387 if ((uint64_t)stop + ofs < (uint64_t)asize) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1388 /* Emit invariant bounds check for stop. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1389 emitir(IRTG(IR_ABC, IRT_P32), asizeref, ofs == 0 ? J->scev.stop :
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1390 emitir(IRTI(IR_ADD), J->scev.stop, ofsref));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1391 /* Emit invariant bounds check for start, if not const or negative. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1392 if (!(J->scev.dir && J->scev.start &&
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1393 (int64_t)IR(J->scev.start)->i + ofs >= 0))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1394 emitir(IRTG(IR_ABC, IRT_P32), asizeref, ikey);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1395 return;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1396 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1397 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1398 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1399 emitir(IRTGI(IR_ABC), asizeref, ikey); /* Emit regular bounds check. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1400 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1401
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1402 /* Record indexed key lookup. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1403 static TRef rec_idx_key(jit_State J, RecordIndex ix, IRRef *rbref,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1404 IRType1 *rbguard)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1405 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1406 TRef key;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1407 GCtab *t = tabV(&ix->tabv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1408 ix->oldv = lj_tab_get(J->L, t, &ix->keyv); /* Lookup previous value. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1409 *rbref = 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1410 rbguard->irt = 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1411
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1412 /* Integer keys are looked up in the array part first. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1413 key = ix->key;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1414 if (tref_isnumber(key)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1415 int32_t k = numberVint(&ix->keyv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1416 if (!tvisint(&ix->keyv) && numV(&ix->keyv) != (lua_Number)k)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1417 k = LJ_MAX_ASIZE;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1418 if ((MSize)k < LJ_MAX_ASIZE) { /* Potential array key? */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1419 TRef ikey = lj_opt_narrow_index(J, key);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1420 TRef asizeref = emitir(IRTI(IR_FLOAD), ix->tab, IRFL_TAB_ASIZE);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1421 if ((MSize)k < t->asize) { /* Currently an array key? */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1422 TRef arrayref;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1423 rec_idx_abc(J, asizeref, ikey, t->asize);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1424 arrayref = emitir(IRT(IR_FLOAD, IRT_PGC), ix->tab, IRFL_TAB_ARRAY);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1425 return emitir(IRT(IR_AREF, IRT_PGC), arrayref, ikey);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1426 } else { /* Currently not in array (may be an array extension)? */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1427 emitir(IRTGI(IR_ULE), asizeref, ikey); /* Inv. bounds check. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1428 if (k == 0 && tref_isk(key))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1429 key = lj_ir_knum_zero(J); /* Canonicalize 0 or +-0.0 to +0.0. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1430 /* And continue with the hash lookup. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1431 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1432 } else if (!tref_isk(key)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1433 /* We can rule out const numbers which failed the integerness test
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1434 ** above. But all other numbers are potential array keys.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1435 */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1436 if (t->asize == 0) { /* True sparse tables have an empty array part. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1437 /* Guard that the array part stays empty. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1438 TRef tmp = emitir(IRTI(IR_FLOAD), ix->tab, IRFL_TAB_ASIZE);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1439 emitir(IRTGI(IR_EQ), tmp, lj_ir_kint(J, 0));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1440 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1441 lj_trace_err(J, LJ_TRERR_NYITMIX);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1442 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1443 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1444 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1445
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1446 /* Otherwise the key is located in the hash part. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1447 if (t->hmask == 0) { /* Shortcut for empty hash part. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1448 /* Guard that the hash part stays empty. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1449 TRef tmp = emitir(IRTI(IR_FLOAD), ix->tab, IRFL_TAB_HMASK);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1450 emitir(IRTGI(IR_EQ), tmp, lj_ir_kint(J, 0));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1451 return lj_ir_kkptr(J, niltvg(J2G(J)));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1452 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1453 if (tref_isinteger(key)) /* Hash keys are based on numbers, not ints. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1454 key = emitir(IRTN(IR_CONV), key, IRCONV_NUM_INT);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1455 if (tref_isk(key)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1456 /* Optimize lookup of constant hash keys. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1457 GCSize hslot = (GCSize)((char )ix->oldv-(char )&noderef(t->node)[0].val);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1458 if (hslot <= t->hmask*(GCSize)sizeof(Node) &&
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1459 hslot <= 65535*(GCSize)sizeof(Node)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1460 TRef node, kslot, hm;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1461 rbref = J->cur.nins; / Mark possible rollback point. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1462 *rbguard = J->guardemit;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1463 hm = emitir(IRTI(IR_FLOAD), ix->tab, IRFL_TAB_HMASK);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1464 emitir(IRTGI(IR_EQ), hm, lj_ir_kint(J, (int32_t)t->hmask));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1465 node = emitir(IRT(IR_FLOAD, IRT_PGC), ix->tab, IRFL_TAB_NODE);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1466 kslot = lj_ir_kslot(J, key, (IRRef)(hslot / sizeof(Node)));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1467 return emitir(IRTG(IR_HREFK, IRT_PGC), node, kslot);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1468 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1469 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1470 /* Fall back to a regular hash lookup. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1471 return emitir(IRT(IR_HREF, IRT_PGC), ix->tab, key);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1472 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1473
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1474 /* Determine whether a key is NOT one of the fast metamethod names. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1475 static int nommstr(jit_State *J, TRef key)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1476 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1477 if (tref_isstr(key)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1478 if (tref_isk(key)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1479 GCstr *str = ir_kstr(IR(tref_ref(key)));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1480 uint32_t mm;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1481 for (mm = 0; mm <= MM_FAST; mm++)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1482 if (mmname_str(J2G(J), mm) == str)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1483 return 0; /* MUST be one the fast metamethod names. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1484 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1485 return 0; /* Variable string key MAY be a metamethod name. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1486 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1487 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1488 return 1; /* CANNOT be a metamethod name. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1489 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1490
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1491 /* Record indexed load/store. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1492 TRef lj_record_idx(jit_State J, RecordIndex ix)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1493 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1494 TRef xref;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1495 IROp xrefop, loadop;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1496 IRRef rbref;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1497 IRType1 rbguard;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1498 cTValue *oldv;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1499
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1500 while (!tref_istab(ix->tab)) { /* Handle non-table lookup. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1501 /* Never call raw lj_record_idx() on non-table. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1502 lj_assertJ(ix->idxchain != 0, "bad usage");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1503 if (!lj_record_mm_lookup(J, ix, ix->val ? MM_newindex : MM_index))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1504 lj_trace_err(J, LJ_TRERR_NOMM);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1505 handlemm:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1506 if (tref_isfunc(ix->mobj)) { /* Handle metamethod call. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1507 BCReg func = rec_mm_prep(J, ix->val ? lj_cont_nop : lj_cont_ra);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1508 TRef *base = J->base + func + LJ_FR2;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1509 TValue *tv = J->L->base + func + LJ_FR2;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1510 base[-LJ_FR2] = ix->mobj; base[1] = ix->tab; base[2] = ix->key;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1511 setfuncV(J->L, tv-LJ_FR2, funcV(&ix->mobjv));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1512 copyTV(J->L, tv+1, &ix->tabv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1513 copyTV(J->L, tv+2, &ix->keyv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1514 if (ix->val) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1515 base[3] = ix->val;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1516 copyTV(J->L, tv+3, &ix->valv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1517 lj_record_call(J, func, 3); /* mobj(tab, key, val) */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1518 return 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1519 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1520 lj_record_call(J, func, 2); /* res = mobj(tab, key) */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1521 return 0; /* No result yet. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1522 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1523 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1524 #if LJ_HASBUFFER
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1525 /* The index table of buffer objects is treated as immutable. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1526 if (ix->mt == TREF_NIL && !ix->val &&
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1527 tref_isudata(ix->tab) && udataV(&ix->tabv)->udtype == UDTYPE_BUFFER &&
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1528 tref_istab(ix->mobj) && tref_isstr(ix->key) && tref_isk(ix->key)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1529 cTValue *val = lj_tab_getstr(tabV(&ix->mobjv), strV(&ix->keyv));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1530 TRef tr = lj_record_constify(J, val);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1531 if (tr) return tr; /* Specialize to the value, i.e. a method. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1532 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1533 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1534 /* Otherwise retry lookup with metaobject. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1535 ix->tab = ix->mobj;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1536 copyTV(J->L, &ix->tabv, &ix->mobjv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1537 if (--ix->idxchain == 0)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1538 lj_trace_err(J, LJ_TRERR_IDXLOOP);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1539 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1540
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1541 /* First catch nil and NaN keys for tables. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1542 if (tvisnil(&ix->keyv) \|\| (tvisnum(&ix->keyv) && tvisnan(&ix->keyv))) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1543 if (ix->val) /* Better fail early. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1544 lj_trace_err(J, LJ_TRERR_STORENN);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1545 if (tref_isk(ix->key)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1546 if (ix->idxchain && lj_record_mm_lookup(J, ix, MM_index))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1547 goto handlemm;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1548 return TREF_NIL;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1549 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1550 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1551
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1552 /* Record the key lookup. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1553 xref = rec_idx_key(J, ix, &rbref, &rbguard);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1554 xrefop = IR(tref_ref(xref))->o;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1555 loadop = xrefop == IR_AREF ? IR_ALOAD : IR_HLOAD;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1556 /* The lj_meta_tset() inconsistency is gone, but better play safe. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1557 oldv = xrefop == IR_KKPTR ? (cTValue *)ir_kptr(IR(tref_ref(xref))) : ix->oldv;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1558
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1559 if (ix->val == 0) { /* Indexed load */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1560 IRType t = itype2irt(oldv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1561 TRef res;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1562 if (oldv == niltvg(J2G(J))) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1563 emitir(IRTG(IR_EQ, IRT_PGC), xref, lj_ir_kkptr(J, niltvg(J2G(J))));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1564 res = TREF_NIL;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1565 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1566 res = emitir(IRTG(loadop, t), xref, 0);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1567 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1568 if (tref_ref(res) < rbref) { /* HREFK + load forwarded? */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1569 lj_ir_rollback(J, rbref); /* Rollback to eliminate hmask guard. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1570 J->guardemit = rbguard;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1571 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1572 if (t == IRT_NIL && ix->idxchain && lj_record_mm_lookup(J, ix, MM_index))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1573 goto handlemm;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1574 if (irtype_ispri(t)) res = TREF_PRI(t); /* Canonicalize primitives. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1575 return res;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1576 } else { /* Indexed store. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1577 GCtab *mt = tabref(tabV(&ix->tabv)->metatable);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1578 int keybarrier = tref_isgcv(ix->key) && !tref_isnil(ix->val);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1579 if (tref_ref(xref) < rbref) { /* HREFK forwarded? */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1580 lj_ir_rollback(J, rbref); /* Rollback to eliminate hmask guard. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1581 J->guardemit = rbguard;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1582 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1583 if (tvisnil(oldv)) { /* Previous value was nil? */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1584 /* Need to duplicate the hasmm check for the early guards. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1585 int hasmm = 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1586 if (ix->idxchain && mt) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1587 cTValue *mo = lj_tab_getstr(mt, mmname_str(J2G(J), MM_newindex));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1588 hasmm = mo && !tvisnil(mo);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1589 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1590 if (hasmm)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1591 emitir(IRTG(loadop, IRT_NIL), xref, 0); /* Guard for nil value. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1592 else if (xrefop == IR_HREF)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1593 emitir(IRTG(oldv == niltvg(J2G(J)) ? IR_EQ : IR_NE, IRT_PGC),
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1594 xref, lj_ir_kkptr(J, niltvg(J2G(J))));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1595 if (ix->idxchain && lj_record_mm_lookup(J, ix, MM_newindex)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1596 lj_assertJ(hasmm, "inconsistent metamethod handling");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1597 goto handlemm;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1598 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1599 lj_assertJ(!hasmm, "inconsistent metamethod handling");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1600 if (oldv == niltvg(J2G(J))) { /* Need to insert a new key. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1601 TRef key = ix->key;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1602 if (tref_isinteger(key)) /* NEWREF needs a TValue as a key. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1603 key = emitir(IRTN(IR_CONV), key, IRCONV_NUM_INT);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1604 else if (tref_isnumber(key) && tref_isk(key) && tvismzero(&ix->keyv))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1605 key = lj_ir_knum_zero(J); /* Canonicalize -0.0 to +0.0. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1606 xref = emitir(IRT(IR_NEWREF, IRT_PGC), ix->tab, key);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1607 keybarrier = 0; /* NEWREF already takes care of the key barrier. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1608 #ifdef LUAJIT_ENABLE_TABLE_BUMP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1609 if ((J->flags & JIT_F_OPT_SINK)) /* Avoid a separate flag. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1610 rec_idx_bump(J, ix);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1611 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1612 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1613 } else if (!lj_opt_fwd_wasnonnil(J, loadop, tref_ref(xref))) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1614 /* Cannot derive that the previous value was non-nil, must do checks. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1615 if (xrefop == IR_HREF) /* Guard against store to niltv. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1616 emitir(IRTG(IR_NE, IRT_PGC), xref, lj_ir_kkptr(J, niltvg(J2G(J))));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1617 if (ix->idxchain) { /* Metamethod lookup required? */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1618 /* A check for NULL metatable is cheaper (hoistable) than a load. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1619 if (!mt) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1620 TRef mtref = emitir(IRT(IR_FLOAD, IRT_TAB), ix->tab, IRFL_TAB_META);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1621 emitir(IRTG(IR_EQ, IRT_TAB), mtref, lj_ir_knull(J, IRT_TAB));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1622 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1623 IRType t = itype2irt(oldv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1624 emitir(IRTG(loadop, t), xref, 0); /* Guard for non-nil value. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1625 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1626 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1627 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1628 keybarrier = 0; /* Previous non-nil value kept the key alive. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1629 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1630 /* Convert int to number before storing. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1631 if (!LJ_DUALNUM && tref_isinteger(ix->val))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1632 ix->val = emitir(IRTN(IR_CONV), ix->val, IRCONV_NUM_INT);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1633 emitir(IRT(loadop+IRDELTA_L2S, tref_type(ix->val)), xref, ix->val);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1634 if (keybarrier \|\| tref_isgcv(ix->val))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1635 emitir(IRT(IR_TBAR, IRT_NIL), ix->tab, 0);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1636 /* Invalidate neg. metamethod cache for stores with certain string keys. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1637 if (!nommstr(J, ix->key)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1638 TRef fref = emitir(IRT(IR_FREF, IRT_PGC), ix->tab, IRFL_TAB_NOMM);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1639 emitir(IRT(IR_FSTORE, IRT_U8), fref, lj_ir_kint(J, 0));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1640 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1641 J->needsnap = 1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1642 return 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1643 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1644 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1645
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1646 /* Determine result type of table traversal. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1647 static IRType rec_next_types(GCtab *t, uint32_t idx)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1648 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1649 for (; idx < t->asize; idx++) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1650 cTValue *a = arrayslot(t, idx);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1651 if (LJ_LIKELY(!tvisnil(a)))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1652 return (LJ_DUALNUM ? IRT_INT : IRT_NUM) + (itype2irt(a) << 8);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1653 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1654 idx -= t->asize;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1655 for (; idx <= t->hmask; idx++) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1656 Node *n = &noderef(t->node)[idx];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1657 if (!tvisnil(&n->val))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1658 return itype2irt(&n->key) + (itype2irt(&n->val) << 8);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1659 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1660 return IRT_NIL + (IRT_NIL << 8);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1661 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1662
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1663 /* Record a table traversal step aka next(). */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1664 int lj_record_next(jit_State J, RecordIndex ix)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1665 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1666 IRType t, tkey, tval;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1667 TRef trvk;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1668 t = rec_next_types(tabV(&ix->tabv), ix->keyv.u32.lo);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1669 tkey = (t & 0xff); tval = (t >> 8);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1670 trvk = lj_ir_call(J, IRCALL_lj_vm_next, ix->tab, ix->key);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1671 if (ix->mobj \|\| tkey == IRT_NIL) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1672 TRef idx = emitir(IRTI(IR_HIOP), trvk, trvk);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1673 /* Always check for invalid key from next() for nil result. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1674 if (!ix->mobj) emitir(IRTGI(IR_NE), idx, lj_ir_kint(J, -1));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1675 ix->mobj = idx;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1676 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1677 ix->key = lj_record_vload(J, trvk, 1, tkey);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1678 if (tkey == IRT_NIL \|\| ix->idxchain) { /* Omit value type check. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1679 ix->val = TREF_NIL;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1680 return 1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1681 } else { /* Need value. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1682 ix->val = lj_record_vload(J, trvk, 0, tval);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1683 return 2;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1684 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1685 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1686
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1687 static void rec_tsetm(jit_State *J, BCReg ra, BCReg rn, int32_t i)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1688 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1689 RecordIndex ix;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1690 cTValue *basev = J->L->base;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1691 GCtab *t = tabV(&basev[ra-1]);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1692 settabV(J->L, &ix.tabv, t);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1693 ix.tab = getslot(J, ra-1);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1694 ix.idxchain = 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1695 #ifdef LUAJIT_ENABLE_TABLE_BUMP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1696 if ((J->flags & JIT_F_OPT_SINK)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1697 if (t->asize < i+rn-ra)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1698 lj_tab_reasize(J->L, t, i+rn-ra);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1699 setnilV(&ix.keyv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1700 rec_idx_bump(J, &ix);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1701 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1702 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1703 for (; ra < rn; i++, ra++) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1704 setintV(&ix.keyv, i);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1705 ix.key = lj_ir_kint(J, i);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1706 copyTV(J->L, &ix.valv, &basev[ra]);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1707 ix.val = getslot(J, ra);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1708 lj_record_idx(J, &ix);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1709 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1710 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1711
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1712 /* -- Upvalue access ------------------------------------------------------ */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1713
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1714 /* Check whether upvalue is immutable and ok to constify. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1715 static int rec_upvalue_constify(jit_State J, GCupval uvp)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1716 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1717 if (uvp->immutable) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1718 cTValue *o = uvval(uvp);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1719 /* Don't constify objects that may retain large amounts of memory. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1720 #if LJ_HASFFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1721 if (tviscdata(o)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1722 GCcdata *cd = cdataV(o);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1723 if (!cdataisv(cd) && !(cd->marked & LJ_GC_CDATA_FIN)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1724 CType *ct = ctype_raw(ctype_ctsG(J2G(J)), cd->ctypeid);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1725 if (!ctype_hassize(ct->info) \|\| ct->size <= 16)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1726 return 1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1727 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1728 return 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1729 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1730 #else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1731 UNUSED(J);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1732 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1733 if (!(tvistab(o) \|\| tvisudata(o) \|\| tvisthread(o)))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1734 return 1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1735 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1736 return 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1737 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1738
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1739 /* Record upvalue load/store. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1740 static TRef rec_upvalue(jit_State *J, uint32_t uv, TRef val)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1741 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1742 GCupval *uvp = &gcref(J->fn->l.uvptr[uv])->uv;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1743 TRef fn = getcurrf(J);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1744 IRRef uref;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1745 int needbarrier = 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1746 if (rec_upvalue_constify(J, uvp)) { /* Try to constify immutable upvalue. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1747 TRef tr, kfunc;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1748 lj_assertJ(val == 0, "bad usage");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1749 if (!tref_isk(fn)) { /* Late specialization of current function. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1750 if (J->pt->flags >= PROTO_CLC_POLY)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1751 goto noconstify;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1752 kfunc = lj_ir_kfunc(J, J->fn);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1753 emitir(IRTG(IR_EQ, IRT_FUNC), fn, kfunc);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1754 #if LJ_FR2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1755 J->base[-2] = kfunc;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1756 #else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1757 J->base[-1] = kfunc \| TREF_FRAME;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1758 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1759 fn = kfunc;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1760 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1761 tr = lj_record_constify(J, uvval(uvp));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1762 if (tr)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1763 return tr;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1764 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1765 noconstify:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1766 /* Note: this effectively limits LJ_MAX_UPVAL to 127. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1767 uv = (uv << 8) \| (hashrot(uvp->dhash, uvp->dhash + HASH_BIAS) & 0xff);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1768 if (!uvp->closed) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1769 uref = tref_ref(emitir(IRTG(IR_UREFO, IRT_PGC), fn, uv));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1770 /* In current stack? */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1771 if (uvval(uvp) >= tvref(J->L->stack) &&
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1772 uvval(uvp) < tvref(J->L->maxstack)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1773 int32_t slot = (int32_t)(uvval(uvp) - (J->L->base - J->baseslot));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1774 if (slot >= 0) { /* Aliases an SSA slot? */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1775 emitir(IRTG(IR_EQ, IRT_PGC),
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1776 REF_BASE,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1777 emitir(IRT(IR_ADD, IRT_PGC), uref,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1778 lj_ir_kint(J, (slot - 1 - LJ_FR2) * -8)));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1779 slot -= (int32_t)J->baseslot; /* Note: slot number may be negative! */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1780 if (val == 0) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1781 return getslot(J, slot);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1782 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1783 J->base[slot] = val;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1784 if (slot >= (int32_t)J->maxslot) J->maxslot = (BCReg)(slot+1);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1785 return 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1786 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1787 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1788 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1789 emitir(IRTG(IR_UGT, IRT_PGC),
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1790 emitir(IRT(IR_SUB, IRT_PGC), uref, REF_BASE),
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1791 lj_ir_kint(J, (J->baseslot + J->maxslot) * 8));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1792 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1793 needbarrier = 1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1794 uref = tref_ref(emitir(IRTG(IR_UREFC, IRT_PGC), fn, uv));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1795 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1796 if (val == 0) { /* Upvalue load */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1797 IRType t = itype2irt(uvval(uvp));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1798 TRef res = emitir(IRTG(IR_ULOAD, t), uref, 0);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1799 if (irtype_ispri(t)) res = TREF_PRI(t); /* Canonicalize primitive refs. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1800 return res;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1801 } else { /* Upvalue store. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1802 /* Convert int to number before storing. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1803 if (!LJ_DUALNUM && tref_isinteger(val))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1804 val = emitir(IRTN(IR_CONV), val, IRCONV_NUM_INT);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1805 emitir(IRT(IR_USTORE, tref_type(val)), uref, val);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1806 if (needbarrier && tref_isgcv(val))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1807 emitir(IRT(IR_OBAR, IRT_NIL), uref, val);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1808 J->needsnap = 1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1809 return 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1810 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1811 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1812
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1813 /* -- Record calls to Lua functions --------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1814
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1815 /* Check unroll limits for calls. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1816 static void check_call_unroll(jit_State *J, TraceNo lnk)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1817 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1818 cTValue *frame = J->L->base - 1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1819 void *pc = mref(frame_func(frame)->l.pc, void);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1820 int32_t depth = J->framedepth;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1821 int32_t count = 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1822 if ((J->pt->flags & PROTO_VARARG)) depth--; /* Vararg frame still missing. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1823 for (; depth > 0; depth--) { /* Count frames with same prototype. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1824 if (frame_iscont(frame)) depth--;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1825 frame = frame_prev(frame);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1826 if (mref(frame_func(frame)->l.pc, void) == pc)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1827 count++;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1828 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1829 if (J->pc == J->startpc) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1830 if (count + J->tailcalled > J->param[JIT_P_recunroll]) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1831 J->pc++;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1832 if (J->framedepth + J->retdepth == 0)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1833 lj_record_stop(J, LJ_TRLINK_TAILREC, J->cur.traceno); /* Tail-rec. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1834 else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1835 lj_record_stop(J, LJ_TRLINK_UPREC, J->cur.traceno); /* Up-recursion. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1836 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1837 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1838 if (count > J->param[JIT_P_callunroll]) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1839 if (lnk) { /* Possible tail- or up-recursion. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1840 lj_trace_flush(J, lnk); /* Flush trace that only returns. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1841 /* Set a small, pseudo-random hotcount for a quick retry of JFUNC. /
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1842 hotcount_set(J2GG(J), J->pc+1, lj_prng_u64(&J2G(J)->prng) & 15u);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1843 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1844 lj_trace_err(J, LJ_TRERR_CUNROLL);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1845 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1846 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1847 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1848
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1849 /* Record Lua function setup. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1850 static void rec_func_setup(jit_State *J)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1851 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1852 GCproto *pt = J->pt;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1853 BCReg s, numparams = pt->numparams;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1854 if ((pt->flags & PROTO_NOJIT))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1855 lj_trace_err(J, LJ_TRERR_CJITOFF);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1856 if (J->baseslot + pt->framesize >= LJ_MAX_JSLOTS)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1857 lj_trace_err(J, LJ_TRERR_STACKOV);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1858 /* Fill up missing parameters with nil. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1859 for (s = J->maxslot; s < numparams; s++)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1860 J->base[s] = TREF_NIL;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1861 /* The remaining slots should never be read before they are written. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1862 J->maxslot = numparams;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1863 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1864
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1865 /* Record Lua vararg function setup. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1866 static void rec_func_vararg(jit_State *J)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1867 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1868 GCproto *pt = J->pt;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1869 BCReg s, fixargs, vframe = J->maxslot+1+LJ_FR2;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1870 lj_assertJ((pt->flags & PROTO_VARARG), "FUNCV in non-vararg function");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1871 if (J->baseslot + vframe + pt->framesize >= LJ_MAX_JSLOTS)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1872 lj_trace_err(J, LJ_TRERR_STACKOV);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1873 J->base[vframe-1-LJ_FR2] = J->base[-1-LJ_FR2]; /* Copy function up. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1874 #if LJ_FR2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1875 J->base[vframe-1] = TREF_FRAME;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1876 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1877 /* Copy fixarg slots up and set their original slots to nil. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1878 fixargs = pt->numparams < J->maxslot ? pt->numparams : J->maxslot;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1879 for (s = 0; s < fixargs; s++) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1880 J->base[vframe+s] = J->base[s];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1881 J->base[s] = TREF_NIL;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1882 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1883 J->maxslot = fixargs;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1884 J->framedepth++;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1885 J->base += vframe;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1886 J->baseslot += vframe;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1887 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1888
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1889 /* Record entry to a Lua function. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1890 static void rec_func_lua(jit_State *J)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1891 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1892 rec_func_setup(J);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1893 check_call_unroll(J, 0);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1894 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1895
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1896 /* Record entry to an already compiled function. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1897 static void rec_func_jit(jit_State *J, TraceNo lnk)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1898 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1899 GCtrace *T;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1900 rec_func_setup(J);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1901 T = traceref(J, lnk);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1902 if (T->linktype == LJ_TRLINK_RETURN) { /* Trace returns to interpreter? */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1903 check_call_unroll(J, lnk);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1904 /* Temporarily unpatch JFUNC* to continue recording across function. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1905 J->patchins = *J->pc;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1906 J->patchpc = (BCIns *)J->pc;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1907 *J->patchpc = T->startins;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1908 return;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1909 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1910 J->instunroll = 0; /* Cannot continue across a compiled function. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1911 if (J->pc == J->startpc && J->framedepth + J->retdepth == 0)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1912 lj_record_stop(J, LJ_TRLINK_TAILREC, J->cur.traceno); /* Extra tail-rec. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1913 else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1914 lj_record_stop(J, LJ_TRLINK_ROOT, lnk); /* Link to the function. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1915 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1916
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1917 /* -- Vararg handling ----------------------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1918
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1919 /* Detect y = select(x, ...) idiom. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1920 static int select_detect(jit_State *J)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1921 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1922 BCIns ins = J->pc[1];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1923 if (bc_op(ins) == BC_CALLM && bc_b(ins) == 2 && bc_c(ins) == 1) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1924 cTValue *func = &J->L->base[bc_a(ins)];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1925 if (tvisfunc(func) && funcV(func)->c.ffid == FF_select) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1926 TRef kfunc = lj_ir_kfunc(J, funcV(func));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1927 emitir(IRTG(IR_EQ, IRT_FUNC), getslot(J, bc_a(ins)), kfunc);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1928 return 1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1929 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1930 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1931 return 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1932 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1933
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1934 /* Record vararg instruction. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1935 static void rec_varg(jit_State *J, BCReg dst, ptrdiff_t nresults)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1936 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1937 int32_t numparams = J->pt->numparams;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1938 ptrdiff_t nvararg = frame_delta(J->L->base-1) - numparams - 1 - LJ_FR2;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1939 lj_assertJ(frame_isvarg(J->L->base-1), "VARG in non-vararg frame");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1940 if (LJ_FR2 && dst > J->maxslot)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1941 J->base[dst-1] = 0; /* Prevent resurrection of unrelated slot. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1942 if (J->framedepth > 0) { /* Simple case: varargs defined on-trace. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1943 ptrdiff_t i;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1944 if (nvararg < 0) nvararg = 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1945 if (nresults != 1) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1946 if (nresults == -1) nresults = nvararg;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1947 J->maxslot = dst + (BCReg)nresults;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1948 } else if (dst >= J->maxslot) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1949 J->maxslot = dst + 1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1950 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1951 if (J->baseslot + J->maxslot >= LJ_MAX_JSLOTS)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1952 lj_trace_err(J, LJ_TRERR_STACKOV);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1953 for (i = 0; i < nresults; i++)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1954 J->base[dst+i] = i < nvararg ? getslot(J, i - nvararg - 1 - LJ_FR2) : TREF_NIL;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1955 } else { /* Unknown number of varargs passed to trace. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1956 TRef fr = emitir(IRTI(IR_SLOAD), LJ_FR2, IRSLOAD_READONLY\|IRSLOAD_FRAME);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1957 int32_t frofs = 8*(1+LJ_FR2+numparams)+FRAME_VARG;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1958 if (nresults >= 0) { /* Known fixed number of results. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1959 ptrdiff_t i;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1960 if (nvararg > 0) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1961 ptrdiff_t nload = nvararg >= nresults ? nresults : nvararg;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1962 TRef vbase;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1963 if (nvararg >= nresults)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1964 emitir(IRTGI(IR_GE), fr, lj_ir_kint(J, frofs+8*(int32_t)nresults));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1965 else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1966 emitir(IRTGI(IR_EQ), fr,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1967 lj_ir_kint(J, (int32_t)frame_ftsz(J->L->base-1)));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1968 vbase = emitir(IRT(IR_SUB, IRT_IGC), REF_BASE, fr);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1969 vbase = emitir(IRT(IR_ADD, IRT_PGC), vbase, lj_ir_kint(J, frofs-8*(1+LJ_FR2)));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1970 for (i = 0; i < nload; i++) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1971 IRType t = itype2irt(&J->L->base[i-1-LJ_FR2-nvararg]);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1972 J->base[dst+i] = lj_record_vload(J, vbase, (MSize)i, t);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1973 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1974 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1975 emitir(IRTGI(IR_LE), fr, lj_ir_kint(J, frofs));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1976 nvararg = 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1977 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1978 for (i = nvararg; i < nresults; i++)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1979 J->base[dst+i] = TREF_NIL;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1980 if (nresults != 1 \|\| dst >= J->maxslot) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1981 J->maxslot = dst + (BCReg)nresults;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1982 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1983 } else if (select_detect(J)) { /* y = select(x, ...) */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1984 TRef tridx = J->base[dst-1];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1985 TRef tr = TREF_NIL;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1986 ptrdiff_t idx = lj_ffrecord_select_mode(J, tridx, &J->L->base[dst-1]);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1987 if (idx < 0) goto nyivarg;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1988 if (idx != 0 && !tref_isinteger(tridx))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1989 tridx = emitir(IRTGI(IR_CONV), tridx, IRCONV_INT_NUM\|IRCONV_INDEX);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1990 if (idx != 0 && tref_isk(tridx)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1991 emitir(IRTGI(idx <= nvararg ? IR_GE : IR_LT),
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1992 fr, lj_ir_kint(J, frofs+8*(int32_t)idx));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1993 frofs -= 8; /* Bias for 1-based index. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1994 } else if (idx <= nvararg) { /* Compute size. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1995 TRef tmp = emitir(IRTI(IR_ADD), fr, lj_ir_kint(J, -frofs));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1996 if (numparams)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1997 emitir(IRTGI(IR_GE), tmp, lj_ir_kint(J, 0));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1998 tr = emitir(IRTI(IR_BSHR), tmp, lj_ir_kint(J, 3));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	1999 if (idx != 0) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2000 tridx = emitir(IRTI(IR_ADD), tridx, lj_ir_kint(J, -1));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2001 rec_idx_abc(J, tr, tridx, (uint32_t)nvararg);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2002 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2003 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2004 TRef tmp = lj_ir_kint(J, frofs);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2005 if (idx != 0) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2006 TRef tmp2 = emitir(IRTI(IR_BSHL), tridx, lj_ir_kint(J, 3));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2007 tmp = emitir(IRTI(IR_ADD), tmp2, tmp);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2008 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2009 tr = lj_ir_kint(J, 0);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2010 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2011 emitir(IRTGI(IR_LT), fr, tmp);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2012 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2013 if (idx != 0 && idx <= nvararg) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2014 IRType t;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2015 TRef aref, vbase = emitir(IRT(IR_SUB, IRT_IGC), REF_BASE, fr);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2016 vbase = emitir(IRT(IR_ADD, IRT_PGC), vbase,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2017 lj_ir_kint(J, frofs-(8<<LJ_FR2)));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2018 t = itype2irt(&J->L->base[idx-2-LJ_FR2-nvararg]);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2019 aref = emitir(IRT(IR_AREF, IRT_PGC), vbase, tridx);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2020 tr = lj_record_vload(J, aref, 0, t);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2021 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2022 J->base[dst-2-LJ_FR2] = tr;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2023 J->maxslot = dst-1-LJ_FR2;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2024 J->bcskip = 2; /* Skip CALLM + select. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2025 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2026 nyivarg:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2027 setintV(&J->errinfo, BC_VARG);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2028 lj_trace_err_info(J, LJ_TRERR_NYIBC);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2029 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2030 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2031 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2032
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2033 /* -- Record allocations -------------------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2034
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2035 static TRef rec_tnew(jit_State *J, uint32_t ah)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2036 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2037 uint32_t asize = ah & 0x7ff;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2038 uint32_t hbits = ah >> 11;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2039 TRef tr;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2040 if (asize == 0x7ff) asize = 0x801;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2041 tr = emitir(IRTG(IR_TNEW, IRT_TAB), asize, hbits);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2042 #ifdef LUAJIT_ENABLE_TABLE_BUMP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2043 J->rbchash[(tr & (RBCHASH_SLOTS-1))].ref = tref_ref(tr);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2044 setmref(J->rbchash[(tr & (RBCHASH_SLOTS-1))].pc, J->pc);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2045 setgcref(J->rbchash[(tr & (RBCHASH_SLOTS-1))].pt, obj2gco(J->pt));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2046 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2047 return tr;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2048 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2049
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2050 /* -- Concatenation ------------------------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2051
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2052 static TRef rec_cat(jit_State *J, BCReg baseslot, BCReg topslot)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2053 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2054 TRef *top = &J->base[topslot];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2055 TValue savetv[5+LJ_FR2];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2056 BCReg s;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2057 RecordIndex ix;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2058 lj_assertJ(baseslot < topslot, "bad CAT arg");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2059 for (s = baseslot; s <= topslot; s++)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2060 (void)getslot(J, s); /* Ensure all arguments have a reference. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2061 if (tref_isnumber_str(top[0]) && tref_isnumber_str(top[-1])) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2062 TRef tr, hdr, trp, xbase, *base = &J->base[baseslot];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2063 /* First convert numbers to strings. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2064 for (trp = top; trp >= base; trp--) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2065 if (tref_isnumber(*trp))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2066 trp = emitir(IRT(IR_TOSTR, IRT_STR), trp,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2067 tref_isnum(*trp) ? IRTOSTR_NUM : IRTOSTR_INT);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2068 else if (!tref_isstr(*trp))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2069 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2070 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2071 xbase = ++trp;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2072 tr = hdr = emitir(IRT(IR_BUFHDR, IRT_PGC),
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2073 lj_ir_kptr(J, &J2G(J)->tmpbuf), IRBUFHDR_RESET);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2074 do {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2075 tr = emitir(IRTG(IR_BUFPUT, IRT_PGC), tr, *trp++);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2076 } while (trp <= top);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2077 tr = emitir(IRTG(IR_BUFSTR, IRT_STR), tr, hdr);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2078 J->maxslot = (BCReg)(xbase - J->base);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2079 if (xbase == base) return tr; /* Return simple concatenation result. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2080 /* Pass partial result. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2081 topslot = J->maxslot--;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2082 *xbase = tr;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2083 top = xbase;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2084 setstrV(J->L, &ix.keyv, &J2G(J)->strempty); /* Simulate string result. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2085 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2086 J->maxslot = topslot-1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2087 copyTV(J->L, &ix.keyv, &J->L->base[topslot]);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2088 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2089 copyTV(J->L, &ix.tabv, &J->L->base[topslot-1]);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2090 ix.tab = top[-1];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2091 ix.key = top[0];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2092 memcpy(savetv, &J->L->base[topslot-1], sizeof(savetv)); /* Save slots. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2093 rec_mm_arith(J, &ix, MM_concat); /* Call __concat metamethod. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2094 memcpy(&J->L->base[topslot-1], savetv, sizeof(savetv)); /* Restore slots. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2095 return 0; /* No result yet. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2096 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2097
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2098 /* -- Record bytecode ops ------------------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2099
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2100 /* Prepare for comparison. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2101 static void rec_comp_prep(jit_State *J)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2102 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2103 /* Prevent merging with snapshot #0 (GC exit) since we fixup the PC. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2104 if (J->cur.nsnap == 1 && J->cur.snap[0].ref == J->cur.nins)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2105 emitir_raw(IRT(IR_NOP, IRT_NIL), 0, 0);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2106 lj_snap_add(J);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2107 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2108
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2109 /* Fixup comparison. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2110 static void rec_comp_fixup(jit_State J, const BCIns pc, int cond)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2111 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2112 BCIns jmpins = pc[1];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2113 const BCIns *npc = pc + 2 + (cond ? bc_j(jmpins) : 0);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2114 SnapShot *snap = &J->cur.snap[J->cur.nsnap-1];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2115 /* Set PC to opposite target to avoid re-recording the comp. in side trace. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2116 #if LJ_FR2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2117 SnapEntry *flink = &J->cur.snapmap[snap->mapofs + snap->nent];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2118 uint64_t pcbase;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2119 memcpy(&pcbase, flink, sizeof(uint64_t));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2120 pcbase = (pcbase & 0xff) \| (u64ptr(npc) << 8);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2121 memcpy(flink, &pcbase, sizeof(uint64_t));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2122 #else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2123 J->cur.snapmap[snap->mapofs + snap->nent] = SNAP_MKPC(npc);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2124 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2125 J->needsnap = 1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2126 if (bc_a(jmpins) < J->maxslot) J->maxslot = bc_a(jmpins);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2127 lj_snap_shrink(J); /* Shrink last snapshot if possible. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2128 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2129
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2130 /* Record the next bytecode instruction (_before_ it's executed). */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2131 void lj_record_ins(jit_State *J)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2132 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2133 cTValue *lbase;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2134 RecordIndex ix;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2135 const BCIns *pc;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2136 BCIns ins;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2137 BCOp op;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2138 TRef ra, rb, rc;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2139
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2140 /* Perform post-processing action before recording the next instruction. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2141 if (LJ_UNLIKELY(J->postproc != LJ_POST_NONE)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2142 switch (J->postproc) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2143 case LJ_POST_FIXCOMP: /* Fixup comparison. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2144 pc = (const BCIns *)(uintptr_t)J2G(J)->tmptv.u64;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2145 rec_comp_fixup(J, pc, (!tvistruecond(&J2G(J)->tmptv2) ^ (bc_op(*pc)&1)));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2146 /* fallthrough */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2147 case LJ_POST_FIXGUARD: /* Fixup and emit pending guard. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2148 case LJ_POST_FIXGUARDSNAP: /* Fixup and emit pending guard and snapshot. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2149 if (!tvistruecond(&J2G(J)->tmptv2)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2150 J->fold.ins.o ^= 1; /* Flip guard to opposite. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2151 if (J->postproc == LJ_POST_FIXGUARDSNAP) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2152 SnapShot *snap = &J->cur.snap[J->cur.nsnap-1];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2153 J->cur.snapmap[snap->mapofs+snap->nent-1]--; /* False -> true. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2154 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2155 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2156 lj_opt_fold(J); /* Emit pending guard. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2157 /* fallthrough */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2158 case LJ_POST_FIXBOOL:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2159 if (!tvistruecond(&J2G(J)->tmptv2)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2160 BCReg s;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2161 TValue *tv = J->L->base;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2162 for (s = 0; s < J->maxslot; s++) /* Fixup stack slot (if any). */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2163 if (J->base[s] == TREF_TRUE && tvisfalse(&tv[s])) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2164 J->base[s] = TREF_FALSE;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2165 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2166 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2167 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2168 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2169 case LJ_POST_FIXCONST:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2170 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2171 BCReg s;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2172 TValue *tv = J->L->base;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2173 for (s = 0; s < J->maxslot; s++) /* Constify stack slots (if any). */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2174 if (J->base[s] == TREF_NIL && !tvisnil(&tv[s]))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2175 J->base[s] = lj_record_constify(J, &tv[s]);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2176 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2177 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2178 case LJ_POST_FFRETRY: /* Suppress recording of retried fast function. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2179 if (bc_op(*J->pc) >= BC__MAX)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2180 return;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2181 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2182 default: lj_assertJ(0, "bad post-processing mode"); break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2183 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2184 J->postproc = LJ_POST_NONE;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2185 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2186
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2187 /* Need snapshot before recording next bytecode (e.g. after a store). */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2188 if (J->needsnap) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2189 J->needsnap = 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2190 if (J->pt) lj_snap_purge(J);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2191 lj_snap_add(J);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2192 J->mergesnap = 1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2193 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2194
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2195 /* Skip some bytecodes. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2196 if (LJ_UNLIKELY(J->bcskip > 0)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2197 J->bcskip--;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2198 return;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2199 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2200
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2201 /* Record only closed loops for root traces. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2202 pc = J->pc;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2203 if (J->framedepth == 0 &&
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2204 (MSize)((char )pc - (char )J->bc_min) >= J->bc_extent)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2205 lj_trace_err(J, LJ_TRERR_LLEAVE);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2206
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2207 #ifdef LUA_USE_ASSERT
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2208 rec_check_slots(J);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2209 rec_check_ir(J);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2210 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2211
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2212 #if LJ_HASPROFILE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2213 rec_profile_ins(J, pc);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2214 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2215
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2216 /* Keep a copy of the runtime values of var/num/str operands. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2217 #define rav (&ix.valv)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2218 #define rbv (&ix.tabv)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2219 #define rcv (&ix.keyv)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2220
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2221 lbase = J->L->base;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2222 ins = *pc;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2223 op = bc_op(ins);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2224 ra = bc_a(ins);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2225 ix.val = 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2226 switch (bcmode_a(op)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2227 case BCMvar:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2228 copyTV(J->L, rav, &lbase[ra]); ix.val = ra = getslot(J, ra); break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2229 default: break; /* Handled later. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2230 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2231 rb = bc_b(ins);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2232 rc = bc_c(ins);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2233 switch (bcmode_b(op)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2234 case BCMnone: rb = 0; rc = bc_d(ins); break; /* Upgrade rc to 'rd'. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2235 case BCMvar:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2236 copyTV(J->L, rbv, &lbase[rb]); ix.tab = rb = getslot(J, rb); break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2237 default: break; /* Handled later. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2238 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2239 switch (bcmode_c(op)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2240 case BCMvar:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2241 copyTV(J->L, rcv, &lbase[rc]); ix.key = rc = getslot(J, rc); break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2242 case BCMpri: setpriV(rcv, ~rc); ix.key = rc = TREF_PRI(IRT_NIL+rc); break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2243 case BCMnum: { cTValue *tv = proto_knumtv(J->pt, rc);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2244 copyTV(J->L, rcv, tv); ix.key = rc = tvisint(tv) ? lj_ir_kint(J, intV(tv)) :
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2245 tv->u32.hi == LJ_KEYINDEX ? (lj_ir_kint(J, 0) \| TREF_KEYINDEX) :
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2246 lj_ir_knumint(J, numV(tv)); } break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2247 case BCMstr: { GCstr *s = gco2str(proto_kgc(J->pt, ~(ptrdiff_t)rc));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2248 setstrV(J->L, rcv, s); ix.key = rc = lj_ir_kstr(J, s); } break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2249 default: break; /* Handled later. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2250 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2251
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2252 switch (op) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2253
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2254 /* -- Comparison ops ---------------------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2255
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2256 case BC_ISLT: case BC_ISGE: case BC_ISLE: case BC_ISGT:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2257 #if LJ_HASFFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2258 if (tref_iscdata(ra) \|\| tref_iscdata(rc)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2259 rec_mm_comp_cdata(J, &ix, op, ((int)op & 2) ? MM_le : MM_lt);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2260 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2261 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2262 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2263 /* Emit nothing for two numeric or string consts. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2264 if (!(tref_isk2(ra,rc) && tref_isnumber_str(ra) && tref_isnumber_str(rc))) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2265 IRType ta = tref_isinteger(ra) ? IRT_INT : tref_type(ra);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2266 IRType tc = tref_isinteger(rc) ? IRT_INT : tref_type(rc);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2267 int irop;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2268 if (ta != tc) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2269 /* Widen mixed number/int comparisons to number/number comparison. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2270 if (ta == IRT_INT && tc == IRT_NUM) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2271 ra = emitir(IRTN(IR_CONV), ra, IRCONV_NUM_INT);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2272 ta = IRT_NUM;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2273 } else if (ta == IRT_NUM && tc == IRT_INT) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2274 rc = emitir(IRTN(IR_CONV), rc, IRCONV_NUM_INT);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2275 } else if (LJ_52) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2276 ta = IRT_NIL; /* Force metamethod for different types. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2277 } else if (!((ta == IRT_FALSE \|\| ta == IRT_TRUE) &&
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2278 (tc == IRT_FALSE \|\| tc == IRT_TRUE))) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2279 break; /* Interpreter will throw for two different types. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2280 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2281 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2282 rec_comp_prep(J);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2283 irop = (int)op - (int)BC_ISLT + (int)IR_LT;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2284 if (ta == IRT_NUM) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2285 if ((irop & 1)) irop ^= 4; /* ISGE/ISGT are unordered. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2286 if (!lj_ir_numcmp(numberVnum(rav), numberVnum(rcv), (IROp)irop))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2287 irop ^= 5;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2288 } else if (ta == IRT_INT) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2289 if (!lj_ir_numcmp(numberVnum(rav), numberVnum(rcv), (IROp)irop))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2290 irop ^= 1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2291 } else if (ta == IRT_STR) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2292 if (!lj_ir_strcmp(strV(rav), strV(rcv), (IROp)irop)) irop ^= 1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2293 ra = lj_ir_call(J, IRCALL_lj_str_cmp, ra, rc);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2294 rc = lj_ir_kint(J, 0);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2295 ta = IRT_INT;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2296 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2297 rec_mm_comp(J, &ix, (int)op);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2298 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2299 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2300 emitir(IRTG(irop, ta), ra, rc);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2301 rec_comp_fixup(J, J->pc, ((int)op ^ irop) & 1);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2302 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2303 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2304
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2305 case BC_ISEQV: case BC_ISNEV:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2306 case BC_ISEQS: case BC_ISNES:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2307 case BC_ISEQN: case BC_ISNEN:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2308 case BC_ISEQP: case BC_ISNEP:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2309 #if LJ_HASFFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2310 if (tref_iscdata(ra) \|\| tref_iscdata(rc)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2311 rec_mm_comp_cdata(J, &ix, op, MM_eq);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2312 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2313 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2314 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2315 /* Emit nothing for two non-table, non-udata consts. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2316 if (!(tref_isk2(ra, rc) && !(tref_istab(ra) \|\| tref_isudata(ra)))) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2317 int diff;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2318 rec_comp_prep(J);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2319 diff = lj_record_objcmp(J, ra, rc, rav, rcv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2320 if (diff == 2 \|\| !(tref_istab(ra) \|\| tref_isudata(ra)))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2321 rec_comp_fixup(J, J->pc, ((int)op & 1) == !diff);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2322 else if (diff == 1) /* Only check __eq if different, but same type. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2323 rec_mm_equal(J, &ix, (int)op);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2324 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2325 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2326
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2327 /* -- Unary test and copy ops ------------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2328
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2329 case BC_ISTC: case BC_ISFC:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2330 if ((op & 1) == tref_istruecond(rc))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2331 rc = 0; /* Don't store if condition is not true. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2332 /* fallthrough */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2333 case BC_IST: case BC_ISF: /* Type specialization suffices. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2334 if (bc_a(pc[1]) < J->maxslot)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2335 J->maxslot = bc_a(pc[1]); /* Shrink used slots. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2336 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2337
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2338 case BC_ISTYPE: case BC_ISNUM:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2339 /* These coercions need to correspond with lj_meta_istype(). */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2340 if (LJ_DUALNUM && rc == ~LJ_TNUMX+1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2341 ra = lj_opt_narrow_toint(J, ra);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2342 else if (rc == ~LJ_TNUMX+2)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2343 ra = lj_ir_tonum(J, ra);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2344 else if (rc == ~LJ_TSTR+1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2345 ra = lj_ir_tostr(J, ra);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2346 /* else: type specialization suffices. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2347 J->base[bc_a(ins)] = ra;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2348 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2349
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2350 /* -- Unary ops --------------------------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2351
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2352 case BC_NOT:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2353 /* Type specialization already forces const result. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2354 rc = tref_istruecond(rc) ? TREF_FALSE : TREF_TRUE;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2355 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2356
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2357 case BC_LEN:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2358 if (tref_isstr(rc))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2359 rc = emitir(IRTI(IR_FLOAD), rc, IRFL_STR_LEN);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2360 else if (!LJ_52 && tref_istab(rc))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2361 rc = emitir(IRTI(IR_ALEN), rc, TREF_NIL);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2362 else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2363 rc = rec_mm_len(J, rc, rcv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2364 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2365
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2366 /* -- Arithmetic ops ---------------------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2367
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2368 case BC_UNM:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2369 if (tref_isnumber_str(rc)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2370 rc = lj_opt_narrow_unm(J, rc, rcv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2371 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2372 ix.tab = rc;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2373 copyTV(J->L, &ix.tabv, rcv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2374 rc = rec_mm_arith(J, &ix, MM_unm);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2375 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2376 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2377
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2378 case BC_ADDNV: case BC_SUBNV: case BC_MULNV: case BC_DIVNV: case BC_MODNV:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2379 /* Swap rb/rc and rbv/rcv. rav is temp. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2380 ix.tab = rc; ix.key = rc = rb; rb = ix.tab;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2381 copyTV(J->L, rav, rbv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2382 copyTV(J->L, rbv, rcv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2383 copyTV(J->L, rcv, rav);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2384 if (op == BC_MODNV)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2385 goto recmod;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2386 /* fallthrough */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2387 case BC_ADDVN: case BC_SUBVN: case BC_MULVN: case BC_DIVVN:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2388 case BC_ADDVV: case BC_SUBVV: case BC_MULVV: case BC_DIVVV: {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2389 MMS mm = bcmode_mm(op);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2390 if (tref_isnumber_str(rb) && tref_isnumber_str(rc))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2391 rc = lj_opt_narrow_arith(J, rb, rc, rbv, rcv,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2392 (int)mm - (int)MM_add + (int)IR_ADD);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2393 else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2394 rc = rec_mm_arith(J, &ix, mm);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2395 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2396 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2397
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2398 case BC_MODVN: case BC_MODVV:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2399 recmod:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2400 if (tref_isnumber_str(rb) && tref_isnumber_str(rc))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2401 rc = lj_opt_narrow_mod(J, rb, rc, rbv, rcv);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2402 else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2403 rc = rec_mm_arith(J, &ix, MM_mod);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2404 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2405
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2406 case BC_POW:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2407 if (tref_isnumber_str(rb) && tref_isnumber_str(rc))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2408 rc = lj_opt_narrow_arith(J, rb, rc, rbv, rcv, IR_POW);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2409 else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2410 rc = rec_mm_arith(J, &ix, MM_pow);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2411 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2412
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2413 /* -- Miscellaneous ops ------------------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2414
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2415 case BC_CAT:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2416 rc = rec_cat(J, rb, rc);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2417 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2418
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2419 /* -- Constant and move ops --------------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2420
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2421 case BC_MOV:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2422 /* Clear gap of method call to avoid resurrecting previous refs. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2423 if (ra > J->maxslot) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2424 #if LJ_FR2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2425 memset(J->base + J->maxslot, 0, (ra - J->maxslot) * sizeof(TRef));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2426 #else
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2427 J->base[ra-1] = 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2428 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2429 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2430 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2431 case BC_KSTR: case BC_KNUM: case BC_KPRI:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2432 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2433 case BC_KSHORT:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2434 rc = lj_ir_kint(J, (int32_t)(int16_t)rc);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2435 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2436 case BC_KNIL:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2437 if (LJ_FR2 && ra > J->maxslot)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2438 J->base[ra-1] = 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2439 while (ra <= rc)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2440 J->base[ra++] = TREF_NIL;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2441 if (rc >= J->maxslot) J->maxslot = rc+1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2442 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2443 #if LJ_HASFFI
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2444 case BC_KCDATA:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2445 rc = lj_ir_kgc(J, proto_kgc(J->pt, ~(ptrdiff_t)rc), IRT_CDATA);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2446 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2447 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2448
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2449 /* -- Upvalue and function ops ------------------------------------------ */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2450
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2451 case BC_UGET:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2452 rc = rec_upvalue(J, rc, 0);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2453 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2454 case BC_USETV: case BC_USETS: case BC_USETN: case BC_USETP:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2455 rec_upvalue(J, ra, rc);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2456 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2457
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2458 /* -- Table ops --------------------------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2459
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2460 case BC_GGET: case BC_GSET:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2461 settabV(J->L, &ix.tabv, tabref(J->fn->l.env));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2462 ix.tab = emitir(IRT(IR_FLOAD, IRT_TAB), getcurrf(J), IRFL_FUNC_ENV);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2463 ix.idxchain = LJ_MAX_IDXCHAIN;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2464 rc = lj_record_idx(J, &ix);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2465 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2466
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2467 case BC_TGETB: case BC_TSETB:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2468 setintV(&ix.keyv, (int32_t)rc);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2469 ix.key = lj_ir_kint(J, (int32_t)rc);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2470 /* fallthrough */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2471 case BC_TGETV: case BC_TGETS: case BC_TSETV: case BC_TSETS:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2472 ix.idxchain = LJ_MAX_IDXCHAIN;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2473 rc = lj_record_idx(J, &ix);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2474 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2475 case BC_TGETR: case BC_TSETR:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2476 ix.idxchain = 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2477 rc = lj_record_idx(J, &ix);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2478 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2479
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2480 case BC_TSETM:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2481 rec_tsetm(J, ra, (BCReg)(J->L->top - J->L->base), (int32_t)rcv->u32.lo);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2482 J->maxslot = ra; /* The table slot at ra-1 is the highest used slot. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2483 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2484
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2485 case BC_TNEW:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2486 rc = rec_tnew(J, rc);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2487 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2488 case BC_TDUP:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2489 rc = emitir(IRTG(IR_TDUP, IRT_TAB),
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2490 lj_ir_ktab(J, gco2tab(proto_kgc(J->pt, ~(ptrdiff_t)rc))), 0);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2491 #ifdef LUAJIT_ENABLE_TABLE_BUMP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2492 J->rbchash[(rc & (RBCHASH_SLOTS-1))].ref = tref_ref(rc);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2493 setmref(J->rbchash[(rc & (RBCHASH_SLOTS-1))].pc, pc);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2494 setgcref(J->rbchash[(rc & (RBCHASH_SLOTS-1))].pt, obj2gco(J->pt));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2495 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2496 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2497
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2498 /* -- Calls and vararg handling ----------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2499
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2500 case BC_ITERC:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2501 J->base[ra] = getslot(J, ra-3);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2502 J->base[ra+1+LJ_FR2] = getslot(J, ra-2);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2503 J->base[ra+2+LJ_FR2] = getslot(J, ra-1);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2504 { /* Do the actual copy now because lj_record_call needs the values. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2505 TValue *b = &J->L->base[ra];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2506 copyTV(J->L, b, b-3);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2507 copyTV(J->L, b+1+LJ_FR2, b-2);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2508 copyTV(J->L, b+2+LJ_FR2, b-1);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2509 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2510 lj_record_call(J, ra, (ptrdiff_t)rc-1);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2511 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2512
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2513 /* L->top is set to L->base+ra+rc+NARGS-1+1. See lj_dispatch_ins(). */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2514 case BC_CALLM:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2515 rc = (BCReg)(J->L->top - J->L->base) - ra - LJ_FR2;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2516 /* fallthrough */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2517 case BC_CALL:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2518 lj_record_call(J, ra, (ptrdiff_t)rc-1);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2519 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2520
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2521 case BC_CALLMT:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2522 rc = (BCReg)(J->L->top - J->L->base) - ra - LJ_FR2;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2523 /* fallthrough */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2524 case BC_CALLT:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2525 lj_record_tailcall(J, ra, (ptrdiff_t)rc-1);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2526 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2527
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2528 case BC_VARG:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2529 rec_varg(J, ra, (ptrdiff_t)rb-1);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2530 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2531
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2532 /* -- Returns ----------------------------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2533
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2534 case BC_RETM:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2535 /* L->top is set to L->base+ra+rc+NRESULTS-1, see lj_dispatch_ins(). */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2536 rc = (BCReg)(J->L->top - J->L->base) - ra + 1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2537 /* fallthrough */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2538 case BC_RET: case BC_RET0: case BC_RET1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2539 #if LJ_HASPROFILE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2540 rec_profile_ret(J);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2541 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2542 lj_record_ret(J, ra, (ptrdiff_t)rc-1);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2543 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2544
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2545 /* -- Loops and branches ------------------------------------------------ */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2546
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2547 case BC_FORI:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2548 if (rec_for(J, pc, 0) != LOOPEV_LEAVE)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2549 J->loopref = J->cur.nins;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2550 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2551 case BC_JFORI:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2552 lj_assertJ(bc_op(pc[(ptrdiff_t)rc-BCBIAS_J]) == BC_JFORL,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2553 "JFORI does not point to JFORL");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2554 if (rec_for(J, pc, 0) != LOOPEV_LEAVE) /* Link to existing loop. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2555 lj_record_stop(J, LJ_TRLINK_ROOT, bc_d(pc[(ptrdiff_t)rc-BCBIAS_J]));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2556 /* Continue tracing if the loop is not entered. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2557 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2558
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2559 case BC_FORL:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2560 rec_loop_interp(J, pc, rec_for(J, pc+((ptrdiff_t)rc-BCBIAS_J), 1));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2561 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2562 case BC_ITERL:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2563 rec_loop_interp(J, pc, rec_iterl(J, *pc));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2564 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2565 case BC_ITERN:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2566 rec_loop_interp(J, pc, rec_itern(J, ra, rb));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2567 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2568 case BC_LOOP:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2569 rec_loop_interp(J, pc, rec_loop(J, ra, 1));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2570 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2571
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2572 case BC_JFORL:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2573 rec_loop_jit(J, rc, rec_for(J, pc+bc_j(traceref(J, rc)->startins), 1));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2574 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2575 case BC_JITERL:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2576 rec_loop_jit(J, rc, rec_iterl(J, traceref(J, rc)->startins));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2577 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2578 case BC_JLOOP:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2579 rec_loop_jit(J, rc, rec_loop(J, ra,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2580 !bc_isret(bc_op(traceref(J, rc)->startins)) &&
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2581 bc_op(traceref(J, rc)->startins) != BC_ITERN));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2582 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2583
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2584 case BC_IFORL:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2585 case BC_IITERL:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2586 case BC_ILOOP:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2587 case BC_IFUNCF:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2588 case BC_IFUNCV:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2589 lj_trace_err(J, LJ_TRERR_BLACKL);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2590 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2591
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2592 case BC_JMP:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2593 if (ra < J->maxslot)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2594 J->maxslot = ra; /* Shrink used slots. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2595 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2596
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2597 case BC_ISNEXT:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2598 rec_isnext(J, ra);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2599 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2600
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2601 /* -- Function headers -------------------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2602
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2603 case BC_FUNCF:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2604 rec_func_lua(J);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2605 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2606 case BC_JFUNCF:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2607 rec_func_jit(J, rc);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2608 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2609
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2610 case BC_FUNCV:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2611 rec_func_vararg(J);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2612 rec_func_lua(J);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2613 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2614 case BC_JFUNCV:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2615 /* Cannot happen. No hotcall counting for varag funcs. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2616 lj_assertJ(0, "unsupported vararg hotcall");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2617 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2618
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2619 case BC_FUNCC:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2620 case BC_FUNCCW:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2621 lj_ffrecord_func(J);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2622 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2623
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2624 default:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2625 if (op >= BC__MAX) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2626 lj_ffrecord_func(J);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2627 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2628 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2629 /* fallthrough */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2630 case BC_UCLO:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2631 case BC_FNEW:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2632 setintV(&J->errinfo, (int32_t)op);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2633 lj_trace_err_info(J, LJ_TRERR_NYIBC);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2634 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2635 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2636
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2637 /* rc == 0 if we have no result yet, e.g. pending __index metamethod call. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2638 if (bcmode_a(op) == BCMdst && rc) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2639 J->base[ra] = rc;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2640 if (ra >= J->maxslot) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2641 #if LJ_FR2
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2642 if (ra > J->maxslot) J->base[ra-1] = 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2643 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2644 J->maxslot = ra+1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2645 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2646 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2647
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2648 #undef rav
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2649 #undef rbv
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2650 #undef rcv
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2651
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2652 /* Limit the number of recorded IR instructions and constants. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2653 if (J->cur.nins > REF_FIRST+(IRRef)J->param[JIT_P_maxrecord] \|\|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2654 J->cur.nk < REF_BIAS-(IRRef)J->param[JIT_P_maxirconst])
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2655 lj_trace_err(J, LJ_TRERR_TRACEOV);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2656 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2657
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2658 /* -- Recording setup ----------------------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2659
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2660 /* Setup recording for a root trace started by a hot loop. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2661 static const BCIns rec_setup_root(jit_State J)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2662 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2663 /* Determine the next PC and the bytecode range for the loop. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2664 const BCIns pcj, pc = J->pc;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2665 BCIns ins = *pc;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2666 BCReg ra = bc_a(ins);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2667 switch (bc_op(ins)) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2668 case BC_FORL:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2669 J->bc_extent = (MSize)(-bc_j(ins))*sizeof(BCIns);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2670 pc += 1+bc_j(ins);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2671 J->bc_min = pc;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2672 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2673 case BC_ITERL:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2674 if (bc_op(pc[-1]) == BC_JLOOP)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2675 lj_trace_err(J, LJ_TRERR_LINNER);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2676 lj_assertJ(bc_op(pc[-1]) == BC_ITERC, "no ITERC before ITERL");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2677 J->maxslot = ra + bc_b(pc[-1]) - 1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2678 J->bc_extent = (MSize)(-bc_j(ins))*sizeof(BCIns);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2679 pc += 1+bc_j(ins);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2680 lj_assertJ(bc_op(pc[-1]) == BC_JMP, "ITERL does not point to JMP+1");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2681 J->bc_min = pc;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2682 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2683 case BC_ITERN:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2684 lj_assertJ(bc_op(pc[1]) == BC_ITERL, "no ITERL after ITERN");
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2685 J->maxslot = ra;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2686 J->bc_extent = (MSize)(-bc_j(pc[1]))*sizeof(BCIns);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2687 J->bc_min = pc+2 + bc_j(pc[1]);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2688 J->state = LJ_TRACE_RECORD_1ST; /* Record the first ITERN, too. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2689 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2690 case BC_LOOP:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2691 /* Only check BC range for real loops, but not for "repeat until true". */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2692 pcj = pc + bc_j(ins);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2693 ins = *pcj;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2694 if (bc_op(ins) == BC_JMP && bc_j(ins) < 0) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2695 J->bc_min = pcj+1 + bc_j(ins);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2696 J->bc_extent = (MSize)(-bc_j(ins))*sizeof(BCIns);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2697 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2698 J->maxslot = ra;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2699 pc++;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2700 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2701 case BC_RET:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2702 case BC_RET0:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2703 case BC_RET1:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2704 /* No bytecode range check for down-recursive root traces. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2705 J->maxslot = ra + bc_d(ins) - 1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2706 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2707 case BC_FUNCF:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2708 /* No bytecode range check for root traces started by a hot call. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2709 J->maxslot = J->pt->numparams;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2710 pc++;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2711 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2712 case BC_CALLM:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2713 case BC_CALL:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2714 case BC_ITERC:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2715 /* No bytecode range check for stitched traces. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2716 pc++;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2717 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2718 default:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2719 lj_assertJ(0, "bad root trace start bytecode %d", bc_op(ins));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2720 break;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2721 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2722 return pc;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2723 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2724
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2725 /* Setup for recording a new trace. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2726 void lj_record_setup(jit_State *J)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2727 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2728 uint32_t i;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2729
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2730 /* Initialize state related to current trace. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2731 memset(J->slot, 0, sizeof(J->slot));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2732 memset(J->chain, 0, sizeof(J->chain));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2733 #ifdef LUAJIT_ENABLE_TABLE_BUMP
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2734 memset(J->rbchash, 0, sizeof(J->rbchash));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2735 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2736 memset(J->bpropcache, 0, sizeof(J->bpropcache));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2737 J->scev.idx = REF_NIL;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2738 setmref(J->scev.pc, NULL);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2739
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2740 J->baseslot = 1+LJ_FR2; /* Invoking function is at base[-1-LJ_FR2]. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2741 J->base = J->slot + J->baseslot;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2742 J->maxslot = 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2743 J->framedepth = 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2744 J->retdepth = 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2745
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2746 J->instunroll = J->param[JIT_P_instunroll];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2747 J->loopunroll = J->param[JIT_P_loopunroll];
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2748 J->tailcalled = 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2749 J->loopref = 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2750
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2751 J->bc_min = NULL; /* Means no limit. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2752 J->bc_extent = ~(MSize)0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2753
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2754 /* Emit instructions for fixed references. Also triggers initial IR alloc. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2755 emitir_raw(IRT(IR_BASE, IRT_PGC), J->parent, J->exitno);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2756 for (i = 0; i <= 2; i++) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2757 IRIns *ir = IR(REF_NIL-i);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2758 ir->i = 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2759 ir->t.irt = (uint8_t)(IRT_NIL+i);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2760 ir->o = IR_KPRI;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2761 ir->prev = 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2762 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2763 J->cur.nk = REF_TRUE;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2764
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2765 J->startpc = J->pc;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2766 setmref(J->cur.startpc, J->pc);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2767 if (J->parent) { /* Side trace. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2768 GCtrace *T = traceref(J, J->parent);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2769 TraceNo root = T->root ? T->root : J->parent;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2770 J->cur.root = (uint16_t)root;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2771 J->cur.startins = BCINS_AD(BC_JMP, 0, 0);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2772 /* Check whether we could at least potentially form an extra loop. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2773 if (J->exitno == 0 && T->snap[0].nent == 0) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2774 /* We can narrow a FORL for some side traces, too. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2775 if (J->pc > proto_bc(J->pt) && bc_op(J->pc[-1]) == BC_JFORI &&
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2776 bc_d(J->pc[bc_j(J->pc[-1])-1]) == root) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2777 lj_snap_add(J);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2778 rec_for_loop(J, J->pc-1, &J->scev, 1);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2779 goto sidecheck;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2780 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2781 } else {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2782 J->startpc = NULL; /* Prevent forming an extra loop. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2783 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2784 lj_snap_replay(J, T);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2785 sidecheck:
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2786 if ((traceref(J, J->cur.root)->nchild >= J->param[JIT_P_maxside] \|\|
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2787 T->snap[J->exitno].count >= J->param[JIT_P_hotexit] +
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2788 J->param[JIT_P_tryside])) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2789 if (bc_op(*J->pc) == BC_JLOOP) {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2790 BCIns startins = traceref(J, bc_d(*J->pc))->startins;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2791 if (bc_op(startins) == BC_ITERN)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2792 rec_itern(J, bc_a(startins), bc_b(startins));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2793 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2794 lj_record_stop(J, LJ_TRLINK_INTERP, 0);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2795 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2796 } else { /* Root trace. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2797 J->cur.root = 0;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2798 J->cur.startins = *J->pc;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2799 J->pc = rec_setup_root(J);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2800 /* Note: the loop instruction itself is recorded at the end and not
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2801 ** at the start! So snapshot #0 needs to point to the next instruction.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2802 ** The one exception is BC_ITERN, which sets LJ_TRACE_RECORD_1ST.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2803 */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2804 lj_snap_add(J);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2805 if (bc_op(J->cur.startins) == BC_FORL)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2806 rec_for_loop(J, J->pc-1, &J->scev, 1);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2807 else if (bc_op(J->cur.startins) == BC_ITERC)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2808 J->startpc = NULL;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2809 if (1 + J->pt->framesize >= LJ_MAX_JSLOTS)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2810 lj_trace_err(J, LJ_TRERR_STACKOV);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2811 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2812 #if LJ_HASPROFILE
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2813 J->prev_pt = NULL;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2814 J->prev_line = -1;
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2815 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2816 #ifdef LUAJIT_ENABLE_CHECKHOOK
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2817 /* Regularly check for instruction/line hooks from compiled code and
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2818 ** exit to the interpreter if the hooks are set.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2819 **
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2820 ** This is a compile-time option and disabled by default, since the
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2821 ** hook checks may be quite expensive in tight loops.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2822 **
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2823 ** Note this is only useful if hooks are not set most of the time.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2824 ** Use this only if you want to asynchronously interrupt the execution.
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2825 **
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2826 ** You can set the instruction hook via lua_sethook() with a count of 1
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2827 ** from a signal handler or another native thread. Please have a look
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2828 ** at the first few functions in luajit.c for an example (Ctrl-C handler).
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2829 */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2830 {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2831 TRef tr = emitir(IRT(IR_XLOAD, IRT_U8),
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2832 lj_ir_kptr(J, &J2G(J)->hookmask), IRXLOAD_VOLATILE);
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2833 tr = emitir(IRTI(IR_BAND), tr, lj_ir_kint(J, (LUA_MASKLINE\|LUA_MASKCOUNT)));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2834 emitir(IRTGI(IR_EQ), tr, lj_ir_kint(J, 0));
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2835 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2836 #endif
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2837 }
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2838
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2839 #undef IR
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2840 #undef emitir_raw
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2841 #undef emitir
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2842
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing. MrJuneJune <me@mrjunejune.com> parents: diff changeset	2843 #endif

Mercurial

annotate third_party/luajit/src/lj_record.c @ 186:8cf4ec5e2191 hg-web