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annotate third_party/luajit/src/lj_target_ppc.h @ 198:008ca7780c8a

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S3 upload got it to work.
author MrJuneJune <me@mrjunejune.com>
date Sat, 14 Feb 2026 16:18:14 -0800
parents 94705b5986b3
children
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178
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1 /*
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2 ** Definitions for PPC CPUs.
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3 ** Copyright (C) 2005-2023 Mike Pall. See Copyright Notice in luajit.h
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4 */
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5
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6 #ifndef _LJ_TARGET_PPC_H
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7 #define _LJ_TARGET_PPC_H
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8
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9 /* -- Registers IDs ------------------------------------------------------- */
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10
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11 #define GPRDEF(_) \
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12 _(R0) _(SP) _(SYS1) _(R3) _(R4) _(R5) _(R6) _(R7) \
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13 _(R8) _(R9) _(R10) _(R11) _(R12) _(SYS2) _(R14) _(R15) \
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14 _(R16) _(R17) _(R18) _(R19) _(R20) _(R21) _(R22) _(R23) \
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15 _(R24) _(R25) _(R26) _(R27) _(R28) _(R29) _(R30) _(R31)
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16 #define FPRDEF(_) \
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17 _(F0) _(F1) _(F2) _(F3) _(F4) _(F5) _(F6) _(F7) \
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18 _(F8) _(F9) _(F10) _(F11) _(F12) _(F13) _(F14) _(F15) \
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19 _(F16) _(F17) _(F18) _(F19) _(F20) _(F21) _(F22) _(F23) \
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20 _(F24) _(F25) _(F26) _(F27) _(F28) _(F29) _(F30) _(F31)
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21 #define VRIDDEF(_)
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22
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23 #define RIDENUM(name) RID_##name,
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24
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25 enum {
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26 GPRDEF(RIDENUM) /* General-purpose registers (GPRs). */
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27 FPRDEF(RIDENUM) /* Floating-point registers (FPRs). */
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28 RID_MAX,
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29 RID_TMP = RID_R0,
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30
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31 /* Calling conventions. */
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32 RID_RET = RID_R3,
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33 RID_RETHI = RID_R3,
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34 RID_RETLO = RID_R4,
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35 RID_FPRET = RID_F1,
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36
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37 /* These definitions must match with the *.dasc file(s): */
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38 RID_BASE = RID_R14, /* Interpreter BASE. */
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39 RID_LPC = RID_R16, /* Interpreter PC. */
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40 RID_DISPATCH = RID_R17, /* Interpreter DISPATCH table. */
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41 RID_LREG = RID_R18, /* Interpreter L. */
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42 RID_JGL = RID_R31, /* On-trace: global_State + 32768. */
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43
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44 /* Register ranges [min, max) and number of registers. */
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45 RID_MIN_GPR = RID_R0,
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46 RID_MAX_GPR = RID_R31+1,
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47 RID_MIN_FPR = RID_F0,
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48 RID_MAX_FPR = RID_F31+1,
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49 RID_NUM_GPR = RID_MAX_GPR - RID_MIN_GPR,
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50 RID_NUM_FPR = RID_MAX_FPR - RID_MIN_FPR
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51 };
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52
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53 #define RID_NUM_KREF RID_NUM_GPR
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54 #define RID_MIN_KREF RID_R0
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55
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56 /* -- Register sets ------------------------------------------------------- */
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57
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58 /* Make use of all registers, except TMP, SP, SYS1, SYS2 and JGL. */
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59 #define RSET_FIXED \
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60 (RID2RSET(RID_TMP)|RID2RSET(RID_SP)|RID2RSET(RID_SYS1)|\
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61 RID2RSET(RID_SYS2)|RID2RSET(RID_JGL))
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62 #define RSET_GPR (RSET_RANGE(RID_MIN_GPR, RID_MAX_GPR) - RSET_FIXED)
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63 #define RSET_FPR RSET_RANGE(RID_MIN_FPR, RID_MAX_FPR)
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64 #define RSET_ALL (RSET_GPR|RSET_FPR)
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65 #define RSET_INIT RSET_ALL
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66
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67 #define RSET_SCRATCH_GPR (RSET_RANGE(RID_R3, RID_R12+1))
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68 #define RSET_SCRATCH_FPR (RSET_RANGE(RID_F0, RID_F13+1))
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69 #define RSET_SCRATCH (RSET_SCRATCH_GPR|RSET_SCRATCH_FPR)
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70 #define REGARG_FIRSTGPR RID_R3
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71 #define REGARG_LASTGPR RID_R10
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72 #define REGARG_NUMGPR 8
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73 #define REGARG_FIRSTFPR RID_F1
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74 #define REGARG_LASTFPR RID_F8
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75 #define REGARG_NUMFPR 8
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76
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77 /* -- Spill slots --------------------------------------------------------- */
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78
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79 /* Spill slots are 32 bit wide. An even/odd pair is used for FPRs.
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80 **
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81 ** SPS_FIXED: Available fixed spill slots in interpreter frame.
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82 ** This definition must match with the *.dasc file(s).
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83 **
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84 ** SPS_FIRST: First spill slot for general use.
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85 ** [sp+12] tmplo word \
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86 ** [sp+ 8] tmphi word / tmp dword, parameter area for callee
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87 ** [sp+ 4] tmpw, LR of callee
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88 ** [sp+ 0] stack chain
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89 */
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90 #define SPS_FIXED 7
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91 #define SPS_FIRST 4
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92
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93 /* Stack offsets for temporary slots. Used for FP<->int conversions etc. */
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94 #define SPOFS_TMPW 4
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95 #define SPOFS_TMP 8
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96 #define SPOFS_TMPHI 8
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97 #define SPOFS_TMPLO 12
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98
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99 #define sps_scale(slot) (4 * (int32_t)(slot))
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100 #define sps_align(slot) (((slot) - SPS_FIXED + 3) & ~3)
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101
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102 /* -- Exit state ---------------------------------------------------------- */
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103
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104 /* This definition must match with the *.dasc file(s). */
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105 typedef struct {
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106 lua_Number fpr[RID_NUM_FPR]; /* Floating-point registers. */
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107 intptr_t gpr[RID_NUM_GPR]; /* General-purpose registers. */
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108 int32_t spill[256]; /* Spill slots. */
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109 } ExitState;
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110
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111 /* Highest exit + 1 indicates stack check. */
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112 #define EXITSTATE_CHECKEXIT 1
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113
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114 /* Return the address of a per-trace exit stub. */
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115 static LJ_AINLINE uint32_t *exitstub_trace_addr_(uint32_t *p, uint32_t exitno)
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116 {
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117 while (*p == 0x60000000) p++; /* Skip PPCI_NOP. */
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118 return p + 3 + exitno;
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119 }
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120 /* Avoid dependence on lj_jit.h if only including lj_target.h. */
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121 #define exitstub_trace_addr(T, exitno) \
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122 exitstub_trace_addr_((MCode *)((char *)(T)->mcode + (T)->szmcode), (exitno))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
123
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
124 /* -- Instructions -------------------------------------------------------- */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
125
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
126 /* Instruction fields. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
127 #define PPCF_CC(cc) ((((cc) & 3) << 16) | (((cc) & 4) << 22))
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
128 #define PPCF_T(r) ((r) << 21)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
129 #define PPCF_A(r) ((r) << 16)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
130 #define PPCF_B(r) ((r) << 11)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
131 #define PPCF_C(r) ((r) << 6)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
132 #define PPCF_MB(n) ((n) << 6)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
133 #define PPCF_ME(n) ((n) << 1)
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
134 #define PPCF_Y 0x00200000
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
135 #define PPCF_DOT 0x00000001
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
136
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
137 typedef enum PPCIns {
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
138 /* Integer instructions. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
139 PPCI_MR = 0x7c000378,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
140 PPCI_NOP = 0x60000000,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
141
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
142 PPCI_LI = 0x38000000,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
143 PPCI_LIS = 0x3c000000,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
144
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
145 PPCI_ADD = 0x7c000214,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
146 PPCI_ADDC = 0x7c000014,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
147 PPCI_ADDO = 0x7c000614,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
148 PPCI_ADDE = 0x7c000114,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
149 PPCI_ADDZE = 0x7c000194,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
150 PPCI_ADDME = 0x7c0001d4,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
151 PPCI_ADDI = 0x38000000,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
152 PPCI_ADDIS = 0x3c000000,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
153 PPCI_ADDIC = 0x30000000,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
154 PPCI_ADDICDOT = 0x34000000,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
155
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
156 PPCI_SUBF = 0x7c000050,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
157 PPCI_SUBFC = 0x7c000010,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
158 PPCI_SUBFO = 0x7c000450,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
159 PPCI_SUBFE = 0x7c000110,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
160 PPCI_SUBFZE = 0x7c000190,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
161 PPCI_SUBFME = 0x7c0001d0,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
162 PPCI_SUBFIC = 0x20000000,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
163
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
164 PPCI_NEG = 0x7c0000d0,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
165
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
166 PPCI_AND = 0x7c000038,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
167 PPCI_ANDC = 0x7c000078,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
168 PPCI_NAND = 0x7c0003b8,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
169 PPCI_ANDIDOT = 0x70000000,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
170 PPCI_ANDISDOT = 0x74000000,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
171
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
172 PPCI_OR = 0x7c000378,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
173 PPCI_NOR = 0x7c0000f8,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
174 PPCI_ORI = 0x60000000,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
175 PPCI_ORIS = 0x64000000,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
176
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
177 PPCI_XOR = 0x7c000278,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
178 PPCI_EQV = 0x7c000238,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
179 PPCI_XORI = 0x68000000,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
180 PPCI_XORIS = 0x6c000000,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
181
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
182 PPCI_CMPW = 0x7c000000,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
183 PPCI_CMPLW = 0x7c000040,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
184 PPCI_CMPWI = 0x2c000000,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
185 PPCI_CMPLWI = 0x28000000,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
186
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
187 PPCI_MULLW = 0x7c0001d6,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
188 PPCI_MULLI = 0x1c000000,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
189 PPCI_MULLWO = 0x7c0005d6,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
190
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
191 PPCI_EXTSB = 0x7c000774,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
192 PPCI_EXTSH = 0x7c000734,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
193
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
194 PPCI_SLW = 0x7c000030,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
195 PPCI_SRW = 0x7c000430,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
196 PPCI_SRAW = 0x7c000630,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
197 PPCI_SRAWI = 0x7c000670,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
198
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
199 PPCI_RLWNM = 0x5c000000,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
200 PPCI_RLWINM = 0x54000000,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
201 PPCI_RLWIMI = 0x50000000,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
202
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
203 PPCI_B = 0x48000000,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
204 PPCI_BL = 0x48000001,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
205 PPCI_BC = 0x40800000,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
206 PPCI_BCL = 0x40800001,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
207 PPCI_BCTR = 0x4e800420,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
208 PPCI_BCTRL = 0x4e800421,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
209
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
210 PPCI_CRANDC = 0x4c000102,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
211 PPCI_CRXOR = 0x4c000182,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
212 PPCI_CRAND = 0x4c000202,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
213 PPCI_CREQV = 0x4c000242,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
214 PPCI_CRORC = 0x4c000342,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
215 PPCI_CROR = 0x4c000382,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
216
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
217 PPCI_MFLR = 0x7c0802a6,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
218 PPCI_MTCTR = 0x7c0903a6,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
219
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
220 PPCI_MCRXR = 0x7c000400,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
221
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
222 /* Load/store instructions. */
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
223 PPCI_LWZ = 0x80000000,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
224 PPCI_LBZ = 0x88000000,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
225 PPCI_STW = 0x90000000,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
226 PPCI_STB = 0x98000000,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
227 PPCI_LHZ = 0xa0000000,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
228 PPCI_LHA = 0xa8000000,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
229 PPCI_STH = 0xb0000000,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
230
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
231 PPCI_STWU = 0x94000000,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
232
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
233 PPCI_LFS = 0xc0000000,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
234 PPCI_LFD = 0xc8000000,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
235 PPCI_STFS = 0xd0000000,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
236 PPCI_STFD = 0xd8000000,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
237
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
238 PPCI_LWZX = 0x7c00002e,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
239 PPCI_LBZX = 0x7c0000ae,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
240 PPCI_STWX = 0x7c00012e,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
241 PPCI_STBX = 0x7c0001ae,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
242 PPCI_LHZX = 0x7c00022e,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
243 PPCI_LHAX = 0x7c0002ae,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
244 PPCI_STHX = 0x7c00032e,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
245
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
246 PPCI_LWBRX = 0x7c00042c,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
247 PPCI_STWBRX = 0x7c00052c,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
248
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
249 PPCI_LFSX = 0x7c00042e,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
parents:
diff changeset
250 PPCI_LFDX = 0x7c0004ae,
94705b5986b3 [ThirdParty] Added WRK and luajit for load testing.
MrJuneJune <me@mrjunejune.com>
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251 PPCI_STFSX = 0x7c00052e,
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252 PPCI_STFDX = 0x7c0005ae,
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253
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254 /* FP instructions. */
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255 PPCI_FMR = 0xfc000090,
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256 PPCI_FNEG = 0xfc000050,
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257 PPCI_FABS = 0xfc000210,
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258
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259 PPCI_FRSP = 0xfc000018,
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260 PPCI_FCTIWZ = 0xfc00001e,
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261
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262 PPCI_FADD = 0xfc00002a,
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263 PPCI_FSUB = 0xfc000028,
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264 PPCI_FMUL = 0xfc000032,
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265 PPCI_FDIV = 0xfc000024,
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266 PPCI_FSQRT = 0xfc00002c,
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267
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268 PPCI_FMADD = 0xfc00003a,
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269 PPCI_FMSUB = 0xfc000038,
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270 PPCI_FNMSUB = 0xfc00003c,
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271
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272 PPCI_FCMPU = 0xfc000000,
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273 PPCI_FSEL = 0xfc00002e,
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274 } PPCIns;
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275
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276 typedef enum PPCCC {
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277 CC_GE, CC_LE, CC_NE, CC_NS, CC_LT, CC_GT, CC_EQ, CC_SO
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278 } PPCCC;
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279
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280 #endif